Patent application number | Description | Published |
20080252343 | DLL CIRCUIT - A DLL circuit has an input circuit configured to generate a synchronization reference signal on the basis of an input signal, a first delay unit configured to delay the synchronization reference signal, a timing offset circuit configured to adjust a synchronization position of the synchronization reference signal delayed by the first delay unit to generate a signal to be synchronized, a phase comparison circuit configured to compare phase of the synchronization reference signal with that of the signal to be synchronized, a first control circuit configured to select an output signal of the first delay unit on the basis of a comparison result of the phase comparison circuit, a second delay unit configured to delay the synchronization reference signal or the signal to be synchronized and a second control circuit configured to select an output signal of the second delay unit in the case where the comparison result of the phase comparison circuit is within a predetermined range. The phase comparison circuit compares the phase of the signal, which is either the synchronization reference signal or the signal to be synchronized, delayed by the second delay unit with the phase of the other signal. | 10-16-2008 |
20080309387 | DLL CIRCUIT - A DLL circuit according to an embodiment of the present invention includes: a delay line configured to output a plurality of delayed signals of a reference signal, the delay line including, a plurality of first delay units connected in series with each other, each of the first delay units being configured to output a delayed signal of the reference signal, a blocking circuit inserted between the first delay units, the blocking circuit being capable of switching between passing and blocking an input delayed signal of the reference signal, and the delay time of the blocking circuit being integer times as large as each of the delay time of the first delay units, and one or more second delay units connected in parallel with the blocking circuit, the same signal as the delayed signal that is input in the blocking circuit being input in the second delay units, each of the second delay units being configured to output a delayed signal of the reference signal, and the delay time of each of the second delay units being equal to the delay time of each of the first delay units; and a blocking control circuit configured to control the blocking circuit whether to pass or block the delayed signal that is input in the blocking circuit. | 12-18-2008 |
20090140788 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit has a plurality of clock tree cells arranged in a tree structure on clock signal lines transmitting a clock signal, the plurality of clock tree cells forming a clock tree. The clock tree cells include first power supply lines connected to the clock tree cells, second power supply lines connected to logic circuits receiving a clock signal supplied from the clock tree, and a plurality of power supply pads connected to the first power supply lines and the second power supply lines. | 06-04-2009 |
20100052750 | DLL CIRCUIT - A DLL circuit includes an input circuit generating a synchronization reference signal, a first delay unit delaying the synchronization reference signal to generate a plurality of delayed synchronization reference signals and selecting one of the delayed synchronization reference signals, a timing offset circuit adjusting a synchronization position of the delayed synchronization reference signal to generate a signal to be synchronized, a phase comparison circuit comparing phase of the synchronization reference signal with that of the signal to be synchronized, a first control circuit selecting an output signal of the first delay unit, a second delay unit delaying the synchronization reference signal or the signal to be synchronized to generate a plurality of delayed signals, a configuration information memory storing configuration information, and a second control circuit selecting an output signal of the second delay unit if the comparison result of the phase comparison circuit is within a predetermined range. | 03-04-2010 |
20100269076 | TEST PATTERN GENERATION APPARATUS, TEST PATTERN GENERATION METHOD, AND MEDIUM STORING TEST PATTERN GENERATION PROGRAM - A test pattern generation apparatus includes an activation rate setting unit configured to set an activation rate of a cell, a test pattern generator configured to generate a test pattern based on the activation rate set by the activation rate setting unit, a supply voltage calculator configured to calculate a supply voltage of a semiconductor integrated circuit using the test pattern generated by the test pattern generator, and an output unit configured to output the test pattern generated by the test pattern generator when the supply voltage calculated by the supply voltage calculator fulfills the target supply voltage. | 10-21-2010 |
20110050169 | SECONDARY BATTERY DEVICE AND VEHICLE - According to one embodiment, the power supply management portion includes a timer configured to output an ON signal every time set by the control circuit, an OR circuit configured to receive supply of an output signal from the timer, an external signal supplied from outside, and a switch control signal output from the control circuit, and a switch circuit configured to switch output of the power source voltage from an external power source according to an output signal from the OR circuit, and the control circuit turns on a switch control signal after confirming which of the output signal from the timer or the external signal has turned on the switch circuit and turns off the switch control signal when both of the output signal from the timer and the signal supplied from outside are turned off. | 03-03-2011 |
20130054071 | ASSEMBLED BATTERY MONITORING DEVICE, SECONDARY BATTERY APPARATUS, AND VEHICLE - According to one embodiment, a monitoring device includes a power supply circuit which powered by an assembled battery including secondary battery cells, and a monitoring IC powered by the supply circuit. The monitoring IC comprises a coulomb counter circuit configured to measure internal amperage consumption, an IC internal power supply circuit powered by the power supply circuit to generate a power supply voltage for use for an internal operation, and a calculation module configured to calculate a set value for a power supply voltage generated by the IC internal power supply circuit so as to determine a first amperage consumption target value to be a first amperage consumption measured value measured at the first time interval by the coulomb counter circuit. | 02-28-2013 |
Patent application number | Description | Published |
20100002340 | HEAD, HEAD SUSPENSION ASSEMBLY, AND DISK DRIVE DEVICE PROVIDED WITH THE SAME - According to an embodiment, a slider of a head includes a negative-pressure cavity defined by a recess formed in a disk-facing surface, a leading step portion which is situated on an upstream side of the negative-pressure cavity with respect to an airflow and projects from a bottom surface of the negative-pressure cavity, a trailing step portion which is provided on an outflow-side end portion of the facing surface on the downstream side of the negative-pressure cavity with respect to the airflow, projects from the bottom surface of the negative-pressure cavity, and constitutes a part of the facing surface, and a maximum-positive-pressure producing step portion which is spaced upstream from the trailing step portion with respect to the airflow, projects from the bottom surface of the negative-pressure cavity, and produces a maximum positive pressure. A head portion is provided on the trailing step portion. | 01-07-2010 |
20130003216 | HEAD CONTROLLER, MEMORY DEVICE AND HEAD CONTROL METHOD - In one embodiment, there is provided a head controller for controlling a head of a read/write device which reads/writes data from/into a recording medium. The head controller includes: a controller configured to adjust a gap between the head of the read/write device and a surface of the recording medium by increasing/decreasing a power supplied to a heater, wherein the heater is configured to heat and expand the read/write device; and an acquisition unit configured to acquire output differences of the read/write devices for two or more rotation speeds of the recording medium, wherein the controller is configured to increase or decrease the power supplied to the heater based on the output differences of the read/write device. | 01-03-2013 |
Patent application number | Description | Published |
20110077792 | METHOD FOR CONTROLLING DISTRIBUTED POWER SOURCES - A control method of the present invention is a control method for distributed power sources which systematically controls a plurality of distributed power sources having different responsive capabilities for a load disturbance. The distributed power sources include an electricity storage device. The control method of the present invention includes: obtaining a component to be compensated for using a power source having a responsive capability equal to or lower than that of the electricity storage device based on a difference value between a remaining capacity of the electricity storage device and a target remaining capacity; and compensating for the component to be compensated for using the power source having a responsive capability equal to or lower than that of the electricity storage device. | 03-31-2011 |
20110170219 | Islanded Power System with Distributed Power Supply - An islanded power system with a distributed power supply includes a system abnormality detection unit, which outputs an abnormality detection signal when an abnormality in a commercial system is detected; a breaker, which interrupts a supply of power from the commercial system when the abnormality detection signal is input from the system abnormality detection unit; a status detection unit, which outputs a breaker status signal when the breaker's open state is detected; and an electrical storage device, which compensates a fluctuation in load until a rotating machine generator switches to an islanded operation after the supply of power from the commercial system is interrupted by the breaker by starting the supply of power when the breaker status signal is input. | 07-14-2011 |
20120083927 | Operation Management Apparatus, Operation Management Method, and Operation Management Program - An operation management apparatus includes an air conditioning thermal load prediction unit configured to calculate an air conditioning thermal load predicted value indicating a predicted amount of heat required to adjust temperature to a pre-set temperature on a day-of-prediction, a power generation output prediction processing unit configured to calculate power generation output prediction data indicating a generated power obtained by a generator within the day-of-prediction, and an operation planning unit configured to prepare an air conditioning heat source operation plan, and determines a purchased power and the generated power using the power generation output prediction data to thereby prepare a power facility operation plan indicating a schedule of a power output from the purchased power source and the generator, so that the purchased power per predetermined time supplied from a purchased power source of a commercial power system becomes a target value. | 04-05-2012 |