Patent application number | Description | Published |
20100001257 | Stress-Alleviation Layer for LED Structures - A light emitting diodes (LEDs) is presented. The LED includes a stress-alleviation layer on a substrate. Open regions and stress-alleviation layer regions are formed on the substrate. Epitaxial layers are disposed on the substrate, at least in the open regions therein, thereby forming an LED structure. The substrate is diced through at least a first portion of the stress-alleviation regions, thereby forming the plurality of LEDs. | 01-07-2010 |
20100012954 | Vertical III-Nitride Light Emitting Diodes on Patterned Substrates with Embedded Bottom Electrodes - A light emitting diode (LED) device is presented. The LED device includes a substrate, a layered LED structure, and an embedded bottom electrode. The layered LED structure includes a buffer/nucleation layer disposed on the substrate, an active layer, and a top-side contact. A first-contact III-nitride layer is interposed between the buffer/nucleation layer and the active layer. A second-contact III-nitride layer is interposed between the active well layer and the top-side contact. A bottom electrode extends through the substrate, through the buffer/nucleation layer and terminates within the first-contact III-nitride layer. | 01-21-2010 |
20100032696 | Light-Emitting Diode with Textured Substrate - A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions. | 02-11-2010 |
20100032700 | Light-Emitting Diodes on Concave Texture Substrate - A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency. | 02-11-2010 |
20100044719 | III-V Compound Semiconductor Epitaxy Using Lateral Overgrowth - A circuit structure includes a substrate; a patterned mask layer over the substrate, wherein the patterned mask layer includes a plurality of gaps; and a group-III group-V (III-V) compound semiconductor layer. The III-V compound semiconductor layer includes a first portion over the mask layer and second portions in the gaps, wherein the III-V compound semiconductor layer overlies a buffer/nucleation layer. | 02-25-2010 |
20100051965 | Carbon-Containing Semiconductor Substrate - A light-emitting diode (LED) device is provided. The LED device is formed on a substrate having a carbon-containing layer. Carbon atoms are introduced into the substrate to prevent or reduce atoms from an overlying metal/metal alloy transition layer from inter-mixing with atoms of the substrate. In this manner, a crystalline structure is maintained upon which the LED structure may be formed. | 03-04-2010 |
20100062551 | Method of Separating Light-Emitting Diode from a Growth Substrate - A method of forming a light-emitting diode (LED) device and separating the LED device from a growth substrate is provided. The LED device is formed by forming an LED structure over a growth substrate. The method includes forming and patterning a mask layer on the growth substrate. A first contact layer is formed over the patterned mask layer with an air bridge between the first contact layer and the patterned mask layer. The first contact layer may be a contact layer of the LED structure. After the formation of the LED structure, the growth substrate is detached from the LED structure along the air bridge. | 03-11-2010 |
20120025234 | Light-Emitting Diode with Textured Substrate - A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions. | 02-02-2012 |
20120119236 | Light-Emitting Diodes on Concave Texture Substrate - A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency. | 05-17-2012 |
20120298956 | Method of Separating Light-Emitting Diode from a Growth Substrate - A method of forming a light-emitting diode (LED) device and separating the LED device from a growth substrate is provided. The LED device is formed by forming an LED structure over a growth substrate. The method includes forming and patterning a mask layer on the growth substrate. A first contact layer is formed over the patterned mask layer with an air bridge between the first contact layer and the patterned mask layer. The first contact layer may be a contact layer of the LED structure. After the formation of the LED structure, the growth substrate is detached from the LED structure along the air bridge. | 11-29-2012 |
20130099283 | III-V Multi-Channel FinFETs - A device includes insulation regions over portions of a semiconductor substrate, and a III-V compound semiconductor region over top surfaces of the insulation regions, wherein the III-V compound semiconductor region overlaps a region between opposite sidewalls of the insulation regions. The III-V compound semiconductor region includes a first and a second III-V compound semiconductor layer formed of a first III-V compound semiconductor material having a first band gap, and a third III-V compound semiconductor layer formed of a second III-V compound semiconductor material between the first and the second III-V compound semiconductor layers. The second III-V compound semiconductor material has a second band gap lower than the first band gap. A gate dielectric is formed on a sidewall and a top surface of the III-V compound semiconductor region. A gate electrode is formed over the gate dielectric. | 04-25-2013 |
20140087505 | Light-Emitting Diodes on Concave Texture Substrate - A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency. | 03-27-2014 |
20140166979 | Light-Emitting Diode with Textured Substrate - A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions. | 06-19-2014 |
20140213031 | FinFETs and Methods for Forming the Same - A method includes recessing isolation regions, wherein a portion of a semiconductor strip between the isolation regions is over top surfaces of the recessed isolation regions, and forms a semiconductor fin. A dummy gate is formed to cover a middle portion of the semiconductor fin. An Inter-Layer Dielectric (ILD) is formed to cover end portions of the semiconductor fin. The dummy gate is then removed to form a first recess, wherein the middle portion is exposed to the first recess. The middle portion of the semiconductor fin is removed to form a second recess. An epitaxy is performed to grow a semiconductor material in the second recess, wherein the semiconductor material is between the end portions. A gate dielectric and a gate electrode are formed in the first recess. The gate dielectric and the gate electrode are over the semiconductor material. | 07-31-2014 |
20150035113 | Epitaxial Structures and Methods of Forming the Same - An embodiment is a method. A first III-V compound semiconductor is epitaxially grown in a trench on a substrate, and the epitaxial growth is performed in a chamber. The first III-V compound semiconductor has a first surface comprising a facet. After the epitaxial growth, the first surface of the first III-V compound semiconductor is etched to form an altered surface of the first III-V compound semiconductor. Etching the first surface is performed in the chamber in situ. A second III-V compound semiconductor is epitaxially grown on the altered surface of the first III-V compound semiconductor. The epitaxial growth of the first III-V compound semiconductor may be performed in a MOCVD chamber, and the etch may use an HCl gas. Structures resulting from methods are also disclosed. | 02-05-2015 |
Patent application number | Description | Published |
20120091538 | FINFET AND METHOD OF FABRICATING THE SAME - The disclosure relates to a fin field effect transistor (FinFET). An exemplary structure for a FinFET comprises a substrate comprising a top surface; a first insulation region and a second insulation region over the substrate top surface comprising tapered top surfaces; a fin of the substrate extending above the substrate top surface between the first and second insulation regions, wherein the fin comprises a recessed portion having a top surface lower than the tapered top surfaces of the first and second insulation regions, wherein the fin comprises a non-recessed portion having a top surface higher than the tapered top surfaces; and a gate stack over the non-recessed portion of the fin. | 04-19-2012 |
20130078783 | FORMING A PROTECTIVE FILM ON A BACK SIDE OF A SILICON WAFER IN A III-V FAMILY FABRICATION PROCESS - Provided is a method of fabricating a semiconductor device. The method includes forming a first dielectric layer over a first surface and a second surface of a silicon substrate. the first and second surfaces being opposite surfaces. A first portion of the first dielectric layer covers the first surface of the substrate, and a second portion of the first dielectric layer covers the second surface of the substrate. The method includes forming openings that extend into the substrate from the first surface. The method includes filling the openings with a second dielectric layer. The method includes removing the first portion of the first dielectric layer without removing the second portion of the first dielectric layer. | 03-28-2013 |
20130095642 | JUNCTION LEAKAGE REDUCTION THROUGH IMPLANTATION - Provided is a method of fabricating a semiconductor device. The method includes forming a first III-V family layer over a substrate. The first III-V family layer includes a surface having a first surface morphology. The method includes performing an ion implantation process to the first III-V family layer through the surface. The ion implantation process changes the first surface morphology into a second surface morphology. After the ion implantation process is performed, the method includes forming a second III-V family layer over the first III-V family layer. The second III-V family layer has a material composition different from that of the first III-V family layer. | 04-18-2013 |
20130099243 | SUBSTRATE BREAKDOWN VOLTAGE IMPROVEMENT FOR GROUP III-NITRIDE ON A SILICON SUBSTRATE - A circuit structure includes a substrate, a nucleation layer of undoped aluminum nitride, a graded buffer layer comprising aluminum, gallium, nitrogen, one of silicon and oxygen, and a p-type conductivity dopant, a ungraded buffer layer comprising gallium, nitrogen, one of silicon and oxygen, and a p-type conductivity dopant without aluminum, and a bulk layer of undoped gallium nitride over the ungraded buffer layer. The various dopants in the graded buffer layer and the ungraded buffer layer increases resistivity and results in layers having an intrinsically balanced conductivity. | 04-25-2013 |
20130112939 | NEW III-NITRIDE GROWTH METHOD ON SILICON SUBSTRATE - A circuit structure includes a substrate and a patterned dielectric layer over the substrate. The patterned dielectric layer includes a plurality of vias; and a number of group-III group-V (III-V) compound semiconductor layer. The III-V compound semiconductor layers include a first layer in the vias, a second layer over the first layer and the dielectric layer, and a bulk layer over the second layer. | 05-09-2013 |
20130137238 | METHOD FOR FORMING HIGH MOBILITY CHANNELS IN III-V FAMILY CHANNEL DEVICES - Provided is a method of fabricating a semiconductor device. The method includes forming a buffer layer over a surface of a silicon substrate. The method further includes forming openings that extend into the buffer layer. The method includes forming a shallow trench isolation (STI) structures in each of the openings. The method includes removing a predetermined amount of a top surface of the buffer layer relative to a top surface of the STI structures. The method includes forming an insulator layer over the top surface of the buffer layer and forming a channel layer over the insulator layer. | 05-30-2013 |
20130140525 | GALLIUM NITRIDE GROWTH METHOD ON SILICON SUBSTRATE - A semiconductor structure includes a silicon substrate; more than one bulk layer of group-III/group-V (III-V) compound semiconductor atop the silicon substrate; and each bulk layer of the group III-V compound is separated by an interlayer. | 06-06-2013 |
20130228865 | FIN FIELD EFFECT TRANSISTOR - A FinFET is described, the FinFET includes a substrate including a top surface and a first insulation region and a second insulation region over the substrate top surface comprising tapered top surfaces. The FinFET further includes a fin of the substrate extending above the substrate top surface between the first and second insulation regions, wherein the fin includes a recessed portion having a top surface lower than the tapered top surfaces of the first and second insulation regions, wherein the fin includes a non-recessed portion having a top surface higher than the tapered top surfaces. The FinFET further includes a gate stack over the non-recessed portion of the fin. | 09-05-2013 |
20140209974 | Double Stepped Semiconductor Substrate - A method for forming a double step surface on a semiconductor substrate includes, with an etching process used in a Metal-Organic Chemical Vapor Deposition (MOCVD) process, forming a rough surface on a region of a semiconductor substrate. The method further includes, with an annealing process used in the MOCVD process, forming double stepped surface on the region of the semiconductor substrate. | 07-31-2014 |
20140327091 | FIN FIELD EFFECT TRANSISTOR - A fin field effect transistor including a first insulation region and a second insulation region over a top surface of a substrate. The first insulation region includes tapered top surfaces, and the second insulation region includes tapered top surfaces. The fin field effect transistor further includes a fin extending above the top surface between the first insulation region and the second insulation region. The fin includes a first portion having a top surface below the tapered top surfaces of the first insulation region. The fin includes a second portion having a top surface above the tapered top surfaces of the first insulation region. | 11-06-2014 |
20150129938 | SEMICONDUCTOR DEVICE AND FORMATION THEREOF - A semiconductor devices and method of formation are provided herein. A semiconductor device includes a gate structure over a channel and an active region adjacent the channel. The active region includes a repaired doped region and a growth region over the repaired doped region. The repaired doped region includes a first dopant and a second dopant, where the second dopant is from the growth region. A method of forming a semiconductor device includes increasing a temperature during exposure to at least one of dopant(s) or agent(s) to form an active region adjacent a channel, where the active region includes a repaired doped region and a growth region over the repaired doped region. | 05-14-2015 |