Sachdev
Amit Sachdev, Mexico MX
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20140201930 | METHOD FOR PROVIDING FAST DRY TO FABRIC - A method for reducing time needed for drying fabric comprising laundering the fabric at least 3 times with a composition comprising a linear polyether having a weight average molecular weight less than 5000 that is terminated with —N—(—CH | 07-24-2014 |
20140208525 | METHOD FOR EASE OF IRONING - A method for reducing force needed for ironing a fabric comprising laundering the fabric with a composition comprising a linear polyether having a weight average molecular weight less than 5000 that is terminated with —N—(—CH | 07-31-2014 |
Amit Sachdev, Mexico D.f. MX
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20120246838 | METHOD FOR REDUCING WRINKLES USING A FABRIC CARE COMPOSITION - There is provided a fabric conditioner that reduces wrinkle formation in laundered garments. There is further provided a method for reducing the occurrence of wrinkles in laundered garments. | 10-04-2012 |
Aviruth Sachdev, Bangkok TH
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20130306647 | ATTACHABLE UTENSIL FOR A FLEXIBLE POUCH CONTAINING EDIBLE MATERIAL - The present invention relates to an attachable utensil that removably attaches to a flexible pouch containing edible material in order to facilitate convenient feeding from the pouch. The utensil contains a fitment end for attaching to a valve of the pouch, a neck portion that connects the fitment end to a serving end, and a serving end that receives the edible material and allows the user to eat or feed the edible material in a convenient and comfortable manner. | 11-21-2013 |
Birpal Singh Sachdev, Eindhoven NL
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20130116942 | LEAK ESTIMATION IN A GAS DELIVERY SYSTEM USING BLOCK LEAST-MEAN-SQUARES TECHNIQUE - A method of estimating leak flow in a gas delivery system is provided that includes determining an average total flow Q | 05-09-2013 |
Ekta Anil Pradeep Sachdev, Mumbai IN
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20160080921 | METHOD AND SYSTEM FOR TRACKING LOCATION OF AN ELECTRONIC DEVICE - A method of tracking location of an electronic device includes broadcasting a communication signal in a first short range wireless communication mode; and receiving location information of a second electronic device in a second short range wireless communication mode switched to, from the first short range wireless communication mode, the location information of the second electronic device being detected by using the broadcasted communication signal. | 03-17-2016 |
Goldy Sachdev, Karnataka IN
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20110020871 | Process for the Preparation of Insulin Conjugates - The invention claims a process for making an insulin-oligomer conjugate IN-105. IN-105 precursor having formula G-A-V-R-[B-Chain]-R-D-A-D-D-R-[A-Chain] is cloned and expressed in | 01-27-2011 |
20110236925 | Method of Obtaining a Purified, Biologically Active Heterologous Protein - The invention relates to methods of separation and/or purification of impurities yielding a purified heterologous protein product devoid of related impurities or with substantially minimal quantities of such glycosylated impurities. More specifically, the invention relates to the identification of glycosylated forms of insulin analogues such as glargine impurities characterized post expression in yeast based systems such as | 09-29-2011 |
Manoj Sachdev, Waterloo ON
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20150084538 | APPARATUS AND METHOD FOR ELECTRICAL STABILITY COMPENSATION - Provided is an apparatus and method for electrical stability compensation. The apparatus includes a drive transistor connecting a power supply to a load, a first variable capacitor having a gate and a source, and a switch transistor for controlling a connection between a programming signal source and a gate of the drive transistor. The gate of the first variable capacitor is connected to the gate of the drive transistor. The first variable capacitor is configured to draw a charge from the gate of the drive transistor during a driving phase for the load. | 03-26-2015 |
Manoj Sachdev, Waterloo CA
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20090316505 | Soft Error Robust Static Random Access Memory Cell Storage Configuration - A Static Random Access Memory (SRAM) cell storage configuration is provided with an improved robustness to radiation induced soft errors. The SRAM cell storage configuration comprises the following elements. First and second storage nodes are configured to store complementary voltages. Drive transistors are configured to selectively couple one of the first and second storage nodes to ground. Load transistors are configured to selectively couple the other one of the first and second storage nodes to a power supply. At least one stabilizer transistor is configured to provide a corresponding redundant storage node and limit feedback between the first and second storage nodes, the redundant storage node being capable of restoring the first or second storage nodes in case of a soft error. | 12-24-2009 |
20100110773 | SRAM CELL WITHOUT DEDICATED ACCESS TRANSISTORS - A Static Random Access Memory (SRAM) cell without dedicated access transistors is described. The SRAM cell comprises a plurality of transistors configured to provide at least a pair of storage nodes for storing complementary logic values represented by corresponding voltages. The transistors comprise at least one bitline transistor, at least on wordline transistor and at least two supply transistors. The bitline transistor is configured to selectively couple one of the storage nodes to at least one corresponding bitline, the bitline for being shared by SRAM cells in one of a common row or column. The wordline transistor is configured to selectively couple another of the storage nodes to at least one corresponding wordline, the wordline for being shared by SRAM cells in the other of the common row or column. The supply transistors are configured to selectively couple corresponding ones of the storage nodes to a supply voltage. | 05-06-2010 |
20100195374 | Eight Transistor Soft Error Robust Storage Cell - A storage cell is provided with improved robustness to soft errors. The storage cell comprises complementary core storage nodes and complementary outer storage nodes. The outer storage nodes act to limit feedback between the core storage nodes and are capable of restoring the logical state of the core storage nodes in the event of a soft error. Similarly the core storage nodes act to limit feedback between the outer storage nodes with the same effect. This cell has advantages compared with other robust storage cells in that there are only two paths between the supply voltage and ground which limits the leakage power. An SRAM cell utilizing the proposed storage cell can be realized with two access transistors configured to selectively couple complementary storage nodes to a corresponding bitline. A flip-flop can be realized with a variety of transfer gates which selectively couple data into the proposed storage cell. | 08-05-2010 |
20100246242 | Soft Error Robust Storage SRAM Cells and Flip-Flops - A storage cell is provided with improved robustness to soft errors. The storage cell comprises complementary lower storage nodes and complementary upper storage nodes. The upper storage nodes act to limit feedback between the lower storage nodes and are capable of restoring the logical state of the core storage nodes in the event of a soft error. Similarly the lower storage nodes act to limit feedback between the upper storage nodes with the same effect. An SRAM cell utilizing the proposed storage cell can be realized with two access transistors configured to selectively couple complementary storage nodes to a corresponding bitline. A flip-flop can be realized with a variety of transfer gates which selectively couple data into the proposed storage cell. | 09-30-2010 |
20110133247 | Zener-Triggered SCR-Based Electrostatic Discharge Protection Devices For CDM And HBM Stress Conditions - SCR device is modified to improve turn-on speed for CDM stress conditions. A zener diode is integrated inside SCR device to create an internal feedback and improve turn-on speed. The zener diode is designed as a p | 06-09-2011 |
20110255359 | Sense-Amplification With Offset Cancellation For Static Random Access Memories - An offset cancellation scheme for sense amplification is described. The scheme consists of group of transistors which are selectively coupled to high and low voltage levels via multi-phase timing. This results in a voltage level on nodes of interest which are a function of transistor mismatch. The resulting voltage levels act to compensates for the transistor mismatch, thereby improving the reliability of the sense amplifier in the presence of process non-idealities. The offset cancellation scheme is applicable to numerous types of sense amplifiers. | 10-20-2011 |
20110298496 | SRAM SENSE AMPLIIFER - A sense amplifier for use in a memory array having a plurality of memory cells is provided. The sense amplifier provides low power dissipation, rapid sensing and high yield sensing operation. The inputs to the sense amplifier are the differential bitlines of an SRAM column, which are coupled to the sense amplifier via the sources of two PMOS transistors. A CMOS latching element comprised of two NMOS transistors and the aforementioned PMOS transistors act to amplify any difference between the differential bitline voltages and resolve the output nodes of the sense amplifier to a full swing value. The latching element is gated with two additional PMOS transistors which act to block the latching operation until the sense amplifier is enabled. One or more equalization transistors ensure the latch remains in the metastable state until it is enabled. Once the latch has resolved it consumes no DC power, aside from leakage. | 12-08-2011 |
20130265819 | EIGHT TRANSISTOR SOFT ERROR ROBUST STORAGE CELL - A storage cell is provided with improved robustness to soft errors. The storage cell comprises complementary core storage nodes and complementary outer storage nodes. The outer storage nodes act to limit feedback between the core storage nodes and are capable of restoring the logical state of the core storage nodes in the event of a soft error. Similarly the core storage nodes act to limit feedback between the outer storage nodes with the same effect. This cell has advantages compared with other robust storage cells in that there are only two paths between the supply voltage and ground which limits the leakage power. An SRAM cell utilizing the proposed storage cell can be realized with two access transistors configured to selectively couple complementary storage nodes to a corresponding bitline. A flip-flop can be realized with a variety of transfer gates which selectively couple data into the proposed storage cell. | 10-10-2013 |
20140307503 | EIGHT TRANSISTOR SOFT ERROR ROBUST STORAGE CELL - A storage cell is provided with improved robustness to soft errors. The storage cell comprises complementary core storage nodes and complementary outer storage nodes. The outer storage nodes act to limit feedback between the core storage nodes and are capable of restoring the logical state of the core storage nodes in the event of a soft error. Similarly the core storage nodes act to limit feedback between the outer storage nodes with the same effect. This cell has advantages compared with other robust storage cells in that there are only two paths between the supply voltage and ground which limits the leakage power. An SRAM cell utilizing the proposed storage cell can be realized with two access transistors configured to selectively couple complementary storage nodes to a corresponding bitline. A flip-flop can be realized with a variety of transfer gates which selectively couple data into the proposed storage cell. | 10-16-2014 |
Puneet Sachdev, New Delhi IN
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20160117693 | DIGITAL MATURITY ASSESSMENT FOR TRANSPORTATION PROVIDERS - An aspect of the present disclosure facilitates the assessment of the digital maturity of a transport provider. In one embodiment, data indicating availability of engagement capabilities on respective digital channels of the transport provider is received, and scores representing digital maturity of the transport provider are computed based on the availability. The engagement capabilities may be categorized according to functional areas qualifying an industry of the transport provider, and as such the scores may correspond to respective functional areas. Thus, the transport provider is enabled to compare the engagement capabilities of his/her organization with those of other providers or with pre-defined standards. | 04-28-2016 |
Puneet Sachdev, Bangalore IN
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20150100510 | FINDING SUITABLE JOBS USING A JOB WEBSITE - A repository of job postings organized with multiple dimensions is maintained, with each job posting being associated with values for one or more dimensions. A corresponding group of values for each of a set of dimensions are identified such that each value has at least one available job posting in the repository. A user interface definition is then sent to an end user system, the user interface definition when rendered on a display unit of the end user system provides an input user interface to a job seeker, the input user interface containing a set of viewports, each viewport corresponding to a dimension of the set of dimensions and showing the group of values for the dimension. The display of the “job universe” reflecting the currently available jobs in the repository facilitates the job seeker to find suitable jobs more effectively when interacting with job websites. | 04-09-2015 |
Rajan Sachdev, Delhi IN
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20100275775 | METHOD AND SYSTEM FOR CONTROL OF DESICCANT DEHUMIDIFIER - An active wheel desiccant dehumidifier is controlled for improved energy savings by modulating operation characteristics including process air flow, reactivation air flow, temperatures, and wheel rotation in response to changing conditions. | 11-04-2010 |
20130160644 | SYSTEM AND METHOD FOR IMPROVING THE PERFORMANCE OF DESICCANT DEHUMIDIFICATION EQUIPMENT FOR LOW-HUMIDITY APPLICATIONS - A method and apparatus for energy-efficient desiccant dehumidification of air or other gases to low humidity levels is disclosed. The method and apparatus includes a desiccant rotor (wheel) having more than one dehumidification zone or sector. Separate dehumidification sectors may be used to dehumidify separate air or gas streams, or they may be used to dehumidify a single air or gas stream by passing it through more than one sector. All or a portion of the discharge air or gas from a dehumidification sector is used for all or a portion of reactivation inlet air or gas prior to heating. The desiccant wheel may include more than one reactivation sector, with separate air or gas sources for each sector. The desiccant wheel may include a purge sector between the reactivation and dehumidification sectors to improve the thermal efficiency of the dehumidification process. | 06-27-2013 |
20140345153 | METHOD AND DEVICE FOR MOISTURE DETERMINATION AND CONTROL - The present invention relates to a method for moisture determination and control using real time measurement of the moisture content of the material being processed. The present invention also provides a device that is used for moisture determination and control based on real time measurement of moisture content of a material being processed. The present invention is particularly suitable for controlling the moisture content of a material in a drying process, such as in a drying hopper, where the material moisture content is measured at an inlet and an outlet of the drying process. The drying process is further controlled by anticipating the drying load by measuring the moisture content of the incoming material to be dried. | 11-27-2014 |
20150153051 | APPARATUS AND METHOD FOR CONTROL OF SOLID DESICCANT DEHUMIDIFIERS - The present invention generally discloses desiccant dehumidifiers control systems. In particular, the present invention relates to solid desiccant dehumidifiers which use a rotor (commonly called a wheel) to dehumidify a process airstream. The invention provides a novel apparatus for control of desiccant dehumidifiers and to an improved method of control of such dehumidifiers, and also to dehumidifiers provided with such control systems. | 06-04-2015 |
Rajinder Sachdev, New Delhi IN
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20120137867 | Vehicle Capable of Dissipating Explosion Force and Energy - A vehicle capable of dissipating explosion force and energy caused due to explosion of an explosive including but not limiting to mine and/or grenade under the vehicle, below the wheels, and/or on side of the vehicle with minimal effect on the personnel and material inside the vehicle, and thereby, capable of providing safety and stability to the personnel and material inside the vehicle even if vehicle is made from armor of low thickness is provided, wherein blast air force and energy is directed through one or more passages ( | 06-07-2012 |
20140157976 | Vehicle Capable of Dissipating Explosion Force and Energy - A vehicle capable of dissipating explosion force and energy caused due to explosion of an explosive including but not limiting to mine and/or grenade under the vehicle, below the wheels, and/or on side of the vehicle with minimal effect on the personnel and material inside the vehicle, and thereby, capable of providing safety and stability to the personnel and material inside the vehicle even if vehicle is made from armor of low thickness is provided, wherein blast air force and energy is directed through one or more passages ( | 06-12-2014 |
Rajiv Sachdev, New Delhi IN
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20100185823 | ENABLING HIGH-PERFORMANCE COMPUTING ON NON-DEDICATED CLUSTERS - Techniques for enabling high-performance computing are provided. The techniques include resizing a logical partition in a non-dedicated compute cluster server to enable high-performance computing, wherein a high performance computing application is executed such that the high performance computing application is configured to complete execution of each of one or more application threads at a similar instance as a slowest thread in the cluster, and wherein the non-dedicated compute cluster comprises one or more servers and the logical partition is created by partitioning one or more server resources. | 07-22-2010 |
Rajiv Rai Sachdev, New Delhi IN
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20090307852 | PROCESS OF PREPARING A GARMENT INFUSING COLOR ENERGY AND CRYSTAL POWER - The present invention relates to a process of preparing a garment, including: (i) selecting a suitable natural fiber/yarn/fabric, (ii) infusing color energy by dyeing the natural fiber/yarn/fabric using natural dyes, (iii) infusing the crystals power in the fabric, (iv) treating the garment with a natural antimicrobial so as to obtain the desired fabric with infused color energy and crystal power. | 12-17-2009 |
20120309077 | NOVEL PROCESS OF DYEING AND PROCESSING A NATURAL TEXTILE PRODUCT USING NATURAL DYES ALONGSIDE NEEM AND TULSI - A process of preparing garments and natural textile products using natural fiber, yarns and fabric is provided. The process involves treating the natural textile products with natural dyes converted into micro-sized and nano-sized particles. The textile product is also treated with bio-enzymes and natural ingredients at all stages. A process of preparing garments using Neem ( | 12-06-2012 |
Rittu Kulwant Sachdev, Bangalore IN
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20100027568 | TECHNIQUE FOR SHARING TRANSMIT AND RECEIVE PORTS OF A CMOS BASED TRANSCEIVER - A circuit for sharing Tx/Rx ports of a CMOS based time multiplexed transceiver includes a Low Noise Amplifier (LNA) and a Power amplifier (PA), and deploys a single RF choke shared between the LNA and PA. The circuit selectively functions as a PA cascode or a LNA input device. In one form the circuit uses MOS transistors configured for use in one of Blue tooth, WLAN and TDMA applications, taking advantage of source-drain symmetry of the MOS transistors. The circuit may include a DC path and be used in WLAN applications, wherein the sharing of the single choke is enabled by one switch in the DC path. As described, the single RF choke is disposed outside of the LNA and the PA. The circuit supports high out powers and causes reduced signal loss due to just one LC tank as opposed to two LC tanks present in the prior art. | 02-04-2010 |
20110039511 | RECEIVER FRONT END - A low-power receiver front-end includes a transconductance amplifier that produces a single-ended current signal in response to a single-ended voltage signal. An output of the transconductance amplifier is provided to an LC tuned circuit. At resonance, the LC tuned circuit generates a differential current signal in response to the single-ended current signal. Single-ended current signals corresponding to the resonant frequency of the LC tuned circuit are converted into differential signals. Further, the LC tuned circuit amplifies the differential current signals by an associated quality factor. Further, a mixer is coupled to an output of the LC tuned circuit. The mixer generates IF signals in response to the differential current signals. | 02-17-2011 |
Shruti Amar Sachdev, Spring Grove SG
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20140121147 | CLEANING AND DISINFECTING LIQUID HAND DISHWASHING DETERGENT COMPOSITIONS - The invention relates to a liquid cleaning and disinfecting hand dishwashing detergent composition comprising at least one surfactant selected from the group consisting of anionic, nonionic, cationic, zwitterionic, amphoteric surfactants, and mixtures thereof, at least one organic solvent and/or at least one hydrotrope, and a single antibacterial active and/or at least one sequestering agent. The cleaning and disinfecting hand dishwashing detergent composition eliminates 99.999% of | 05-01-2014 |
20140323380 | CLEANING AND DISINFECTING LIQUID HAND DISHWASHING DETERGENT COMPOSITIONS - The invention relates to a liquid cleaning and disinfecting hand dishwashing detergent composition comprising at least one surfactant selected from the group consisting of anionic, nonionic, cationic, zwitterionic, amphoteric surfactants, and mixtures thereof, at least one organic solvent and/or at least one hydrotrope, and a single antibacterial active and/or at least one sequestering agent. The cleaning and disinfecting hand dishwashing detergent composition eliminates 99.999% of | 10-30-2014 |
Tej Singh Sachdev, Milton CA
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20150329224 | PAYLOAD EJECTION SYSTEM - There is disclosed a Payload Ejection System (PES) able to store any set of payloads for launch and eject that set of payloads at a controlled speed with a low tumble rate while accommodating any offset centre of mass within a restricted volume. The need for ballasting or balancing is eliminated thus freeing up the design space for these payloads. Insensitivity to centre of mass location is enabled by the use of a deployment hinge assembly arrangement which uses two or more non-parallel folding hinge arrangements that allow for linear motion of the output link in one direction while restricting the motion all other directions. One embodiment of the current PES concept uses four (4) hinge panel assemblies, selected to provide optimal stiffness around the entire mechanism. The stiffness of the PES is integral to managing offset centre-of-mass locations by allowing the mechanism to translate the effective force vector to the center of mass location. | 11-19-2015 |