Magruder, US
Andrew Magruder, Loveland, OH US
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20080222048 | Distributed Payment System and Method - The present invention provides a payment system that allows a mobile communications device (MCD) to interact with a merchant processing device (MPD) and a payment engine. A communications component associated with the payment engine can send requested barcodes to the MPD, receive barcodes or alphanumeric Universal Product Codes from customer MCDs, and handle payment authorizations and settlements. A barcode management component can generate and interpret barcodes based upon merchant offerings and client requests. A security algorithms component can employ an offset pair algorithm to convert each digit from a payment card information into an offset pair of digits to facilitate security in accordance with one embodiment of the present invention. | 09-11-2008 |
20150088673 | DISTRIBUTED PAYMENT SYSTEM AND METHOD - The present invention provides a payment system that allows a mobile communications device (MCD) to interact with a merchant processing device (MPD) and a payment engine. A communications component associated with the payment engine can send requested barcodes to the MPD, receive barcodes or alphanumeric Universal Product Codes from customer MCDs, and handle payment authorizations and settlements. A barcode management component can generate and interpret barcodes based upon merchant offerings and client requests. A security algorithms component can employ an offset pair algorithm to convert each digit from a payment card information into an offset pair of digits to facilitate security in accordance with one embodiment of the present invention. | 03-26-2015 |
Andrew M. Magruder, Loveland, OH US
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20120239556 | LATENCY PAYMENT SETTLEMENT APPARATUSES, METHODS AND SYSTEMS - The LATENCY PAYMENT SETTLEMENT APPARATUSES, METHODS AND SYSTEMS (“LPS”) transforms latency payment request inputs via LPS components into latency payment requests. In one embodiment, a method is disclosed comprising obtaining a latency payment method request and determining a latency payment period associated with the latency payment method request. The method includes determining a consumer item currency amount by applying a currency conversion factor to the merchant item currency amount. The method also determines a latency buffer amount based on the latency payment method request, generates a latency payment request by summing the latency buffer amount to the consumer item currency amount and structuring the summed amounts according to the patency payment period, and provides the latency payment request. In some embodiments LPS may determine the latency payment request according to maximized remittance aspects associated with a consumer specified payment method so as to optimize system wide remittance results. | 09-20-2012 |
David C. Magruder, Tequesta, FL US
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20110224745 | Emergency Medical Station And Advertisement Display - A medical emergency station having a housing, an automated external defibrillator in the housing, and a video screen incorporated into a single unit. The medical emergency station includes a video regarding the proper use of the automated external defibrillator. The video is activated whenever the automated external defibrillator is removed from the housing. A commercial advertisement and other media appears on the video screen whenever the video regarding the use of the automated external defibrillator is not in use. The commercial advertisements help to offset the cost of the medical emergency station. | 09-15-2011 |
Judy A, Magruder, Mountain View, CA US
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20100114074 | Sustained delivery of an active agent using an implantable system - The invention is directed to a device for delivering an active agent formulation for a predetermined administration period. An impermeable reservoir is divided into a water-swellable agent chamber and an active agent formulation chamber. Fluid from the environment is imbibed through a semipermeable plug into the water-swellable agent chamber and the active agent formulation is released through a back-diffusion regulating outlet. Delivery periods of up to 2 years are achieved. | 05-06-2010 |
20110230865 | SUSTAINED DELIVERY OF AN ACTIVE AGENT USING AN IMPLANTABLE SYSTEM - The invention is directed to a device for delivering an active agent formulation for a predetermined administration period. An impermeable reservoir is divided into a water-swellable agent chamber and an active agent formulation chamber. Fluid from the environment is imbibed through a semipermeable plug into the water-swellable agent chamber and the active agent formulation is released through a back-diffusion regulating outlet. Delivery periods of up to 2 years are achieved. | 09-22-2011 |
20130035669 | SUSTAINED DELIVERY OF AN ACTIVE AGENT USING AN IMPLANTABLE SYSTEM - The invention is directed to a device for delivering an active agent formulation for a predetermined administration period. An impermeable reservoir is divided into a water-swellable agent chamber and an active agent formulation chamber. Fluid from the environment is imbibed through a semipermeable plug into the water-swellable agent chamber and the active agent formulation is released through a back-diffusion regulating outlet. Delivery periods of up to 2 years are achieved. | 02-07-2013 |
Michael Magruder, Camation, WA US
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20130238579 | EFFICIENT GARBAGE COLLECTION AND EXCEPTION HANDLING IN A HARDWARE ACCELERATED TRANSACTIONAL MEMORY SYSTEM - Handling garbage collection and exceptions in hardware assisted transactions. Embodiments are practiced in a computing environment including a hardware assisted transaction system. A method includes beginning a hardware assisted transaction, raising an exception while in the hardware assisted transaction, including creating an exception object, determining that the transaction should be rolled back, and as a result of determining that the transaction should be rolled back, marshaling the exception object out of the hardware assisted transaction. | 09-12-2013 |
Michael Magruder, Carnation, WA US
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20100332538 | HARDWARE ACCELERATED TRANSACTIONAL MEMORY SYSTEM WITH OPEN NESTED TRANSACTIONS - Hardware assisted transactional memory system with open nested transactions. Some embodiments described herein implement a system whereby hardware acceleration of transactions can be accomplished by implementing open nested transaction in hardware which respect software locks such that a top level transaction can be implemented in software, and thus not be limited by hardware constraints typical when using hardware transactional memory systems. | 12-30-2010 |
20110145304 | EFFICIENT GARBAGE COLLECTION AND EXCEPTION HANDLING IN A HARDWARE ACCELERATED TRANSACTIONAL MEMORY SYSTEM - Handling garbage collection and exceptions in hardware assisted transactions. Embodiments are practiced in a computing environment including a hardware assisted transaction system. Embodiments includes acts for writing to a card table outside of a transaction; handling garbage collection compaction occurring when a hardware transaction is active by using a common global variable and instructing one or more agents to write to the common global variable any time an operation is performed which may change an object's virtual address; acts for managing a thread-local allocation context; acts for handling exceptions while in a hardware assisted transaction. A method includes beginning a hardware assisted transaction, raising an exception while in the hardware assisted transaction, including creating an exception object, determining that the transaction should be rolled back, and as a result of determining that the transaction should be rolled back, marshaling the exception object out of the hardware assisted transaction. | 06-16-2011 |
Michael M. Magruder, Camation, WA US
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20100211931 | STM WITH GLOBAL VERSION OVERFLOW HANDLING - A software transactional memory system is provided with overflow handling. The system includes a global version counter with an epoch number and a version number. The system accesses the global version counter prior to and subsequent to memory accesses of transactions to validate read accesses of the transaction. The system includes mechanisms to detect global version number overflow and may allow some or all transactions to execute to completion subsequent to the global version number overflowing. The system also provides publication, privatization, and granular safety properties. | 08-19-2010 |
Michael Mckenzie Magruder, Carnation, WA US
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20100191930 | TRANSACTIONAL MEMORY COMPATIBILITY MANAGEMENT - Transactional memory compatibility type attributes are associated with intermediate language code to specify, for example, that intermediate language code must be run within a transaction, or must not be run within a transaction, or may be run within a transaction. Attributes are automatically produced while generating intermediate language code from annotated source code. Default rules also generate attributes. Tools use attributes to statically or dynamically check for incompatibility between intermediate language code and a transactional memory implementation. | 07-29-2010 |
20110225213 | LOOP CONTROL FLOW DIVERSION - Loop control flow diversion supports thread synchronization, garbage collection, and other situations involving suspension of long-running loops. Divertible loops have a loop body, a loop top, an indirection cell containing a loop top address, and a loop jump instruction sequence which references the indirection cell. In normal execution, control flows through the indirection cell to the loop top. After the indirection cell is altered, however, execution flow is diverted to a point away from the loop top. Operations such as garbage collection are performed while the loop (and hence the thread(s) using the loop) is thus diverted. The kernel or another thread then restores the loop top address into the indirection cell, and execution flow again continues through the restored indirection cell to the loop top. | 09-15-2011 |
Micheal M. Magruder, Sammamish, WA US
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20090077083 | Parallel nested transactions in transactional memory - Various technologies and techniques are disclosed for supporting parallel nested transactions in a transactional memory system. Multiple closed nested transactions are created for a single parent transaction, and the closed nested transactions are executed concurrently as parallel nested transactions. Various techniques are used to ensure effects of the parallel nested transactions are hidden from other transactions outside the parent transaction until the parent transaction commits. For example, versioned write locks are used with parallel nested transactions. When a transactional memory word changes from a write lock to a versioned write lock, an entry is made in a global versioned write lock map to store a pointer to a write log entry that the versioned write lock replaced. When the versioned write lock is encountered during transaction processing, the global versioned write lock map is consulted to translate the versioned write lock to the pointer to the write log entry. | 03-19-2009 |
Mike Magruder, Sammamish, WA US
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20110145637 | Performing Mode Switching In An Unbounded Transactional Memory (UTM) System - In one embodiment, the present invention includes a method for selecting a first transaction execution mode to begin a first transaction in a unbounded transactional memory (UTM) system having a plurality of transaction execution modes. These transaction execution modes include hardware modes to execute within a cache memory of a processor, a hardware assisted mode to execute using transactional hardware of the processor and a software buffer, and a software transactional memory (STM) mode to execute without the transactional hardware. The first transaction execution mode can be selected to be a highest performant of the hardware modes if no pending transaction is executing in the STM mode, otherwise a lower performant mode can be selected. Other embodiments are described and claimed. | 06-16-2011 |
20120079215 | Performing Mode Switching In An Unbounded Transactional Memory (UTM) System - In one embodiment, the present invention includes a method for selecting a first transaction execution mode to begin a first transaction in a unbounded transactional memory (UTM) system having a plurality of transaction execution modes. These transaction execution modes include hardware modes to execute within a cache memory of a processor, a hardware assisted mode to execute using transactional hardware of the processor and a software buffer, and a software transactional memory (STM) mode to execute without the transactional hardware. The first transaction execution mode can be selected to be a highest performant of the hardware modes if no pending transaction is executing in the STM mode, otherwise a lower performant mode can be selected. Other embodiments are described and claimed. | 03-29-2012 |
Thomas D. Magruder, Austin, TX US
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20130218509 | Customizing Operation of a Test Instrument Based on Information from a System Under Test - Customizing a test instrument. A plurality of pairs of code modules may be provided. Each pair of code modules may include a first code module having program instructions for execution by a processor of the test instrument and a second code module for implementation on a programmable hardware element of the test instrument. For each pair of code modules, the first code module and the second code module may collectively implement a function in the test instrument. User input may be received specifying modification of a second code module of at least one of the plurality of pairs of code modules. Accordingly, a hardware description may be generated for the programmable hardware element of the test instrument based on the modified second code module. | 08-22-2013 |
20130219219 | Customizing Code Modules of Software and Programmable Hardware for a Test Instrument - Customizing a test instrument. A plurality of pairs of code modules may be provided. Each pair of code modules may include a first code module having program instructions for execution by a processor of the test instrument and a second code module for implementation on a programmable hardware element of the test instrument. For each pair of code modules, the first code module and the second code module may collectively implement a function in the test instrument. User input may be received specifying modification of a second code module of at least one of the plurality of pairs of code modules. Accordingly, a hardware description may be generated for the programmable hardware element of the test instrument based on the modified second code module. | 08-22-2013 |
William R. Magruder, Western Springs, IL US
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20090314832 | SYSTEM AND METHOD FOR COMPARING DRUG PRODUCT INFORMATION - A system and method for comparing vast amounts of drug product information at granular levels is provided. This comparison is facilitated by the creation of a unique key that maintains the integrity of the comparison system. The unique key may contain a therapeutic class identifier, a clinical formulation identifier, an additional detail identifier, a package equivalent size identifier, a unit dose identifier, and a package quantity identifier. | 12-24-2009 |
20110036905 | SYSTEM AND METHOD FOR COMPARING DRUG PRODUCT INFORMATION - A system and method for analyzing vast amounts of drug product information at granular levels is provided. This analysis enables determining a relationship which is associated with at least one of a cost effectiveness of purchasing a drug product from different suppliers, a determination of a lowest cost per unit of the drug product, a manufacturer market share for the drug product, and a strategy for submitting a contract bid for the drug product. | 02-17-2011 |