Patent application number | Description | Published |
20080231335 | CIRCUIT TO REDUCE DUTY CYCLE DISTORTION - A method and a circuit for correcting duty cycle distortion. A delay insertion gate corrects data dependent delay distortion that is generated by CMOS flip-flop circuits. The delay insertion gate includes two field effect transistors and a current mirror. The two transistors each respectively receive an input signal from an upstream circuit. At least one of the transistors is coupled to an output node. The output node temporarily holds a voltage state within the delay insertion gate, correcting any distortion in the duty cycle of the input signals. | 09-25-2008 |
20090058469 | METHODS AND SYSTEMS FOR COMPARING CURRENTS USING CURRENT CONVEYOR CIRCUITRY - Methods and systems are provided for comparing currents. The method includes driving a first current through a first X leg of a first current conveyor circuit and a second current through a second X leg of a second current conveyor circuit. The method further includes draining a third current from a first X terminal of the first current conveyor circuit to produce a first positive transistor current and a first negative transistor current, and draining a fourth current from a second X terminal of the second current conveyor circuit to produce a second positive transistor current and a second negative transistor current. The method further includes summing the first positive transistor current and the second negative transistor current to produce a first current output, the first negative transistor current and the second positive transistor current to produce a second current output, and the first current output and the second current output to produce a summed current output. | 03-05-2009 |
20090102690 | Methods and Systems for Reducing a Sign-Bit Pulse at a Voltage Output of a Sigma-Delta Digital-to-Analog Converter - For a sigma-delta digital-to-analog converter (SD DAC) that includes a voltage output and a low-pass filter having a given order, methods and systems for reducing a sign-bit pulse at the voltage output of the SD DAC without requiring use of a higher order low-pass filter are disclosed. A method includes receiving a first waveform and a second waveform, the first and second waveforms having a first phase relationship; setting the first phase relationship between the first and second waveforms to a second phase relationship by aligning at least one of the first and second waveforms such that a transition of the second waveform is approximately half way between a rising edge and adjacent falling edge of the first waveform; upon setting the second phase relationship, multiplying the first and second waveforms to produce a digital input; and providing the digital input to the SD DAC. | 04-23-2009 |
20090135036 | Differential current-mode translator in a sigma-delta digital-to-analog converter - A differential current-mode sigma-delta digital-to-analog converter (SD DAC) and a method for generating positive and negative reference voltages in a sigma-delta digital analog converter are described. The SD DAC includes a low pass filter (LPF) having a first and second input. The SD DAC further includes a first resistance and a second resistance coupled together at a common node. The first resistance may be coupled to the first input of the LPF and the second resistance may be coupled to the second input of the LPF. Additionally, the SD DAC includes a current supply and a switching network for supplying current from the current supply to the first and second resistances. The current supply and the resistances operate to generate a first voltage and a second voltage at the first and second inputs of the LPF. | 05-28-2009 |
20090322396 | CIRCUIT TO REDUCE DUTY CYCLE DISTORTION - A method and a circuit for correcting duty cycle distortion. A delay insertion gate corrects data dependent delay distortion that is generated by CMOS flip-flop circuits. The delay insertion gate includes two field effect transistors and a current mirror. The two transistors each respectively receive an input signal from an upstream circuit. At least one of the transistors is coupled to an output node. The output node temporarily holds a voltage state within the delay insertion gate, correcting any distortion in the duty cycle of the input signals. | 12-31-2009 |
20100156385 | Multi-Mode Amplifier - An amplifier capable of operating in multiple modes may include (a) first and second voltage inputs and (b) first and second current outputs that have substantially the same amplitude and polarity. Preferably, the inputs and outputs of the amplifier will have high impedances. The amplifier may operate in a first mode—and function as an operational amplifier—when the first and second current outputs are coupled together. The amplifier may operate in a second mode—and function as a type-2 current conveyor—when the second current output is coupled to the second voltage input. The amplifier may additionally include a third current output that has an amplitude that is substantially the same as the amplitudes of the first and second outputs and a polarity that is substantially opposite to the polarities of the first and second outputs. In this configuration the amplifier may function as a four-terminal floating nullor. | 06-24-2010 |
20100315274 | Current- mode sigma-delta digital-to-analog converter - In general, this disclosure is directed to a differential current-mode sigma-delta digital-to-analog converter (SD DAC) with improved accuracy and reduced offset and gain errors. In one example, the SD DAC may include a current source configured to provide a differential current. The SD DAC may further include a switching network configured to adjust a polarity of the differential current according to a bit within the bit-stream to produce a differential current signal. The SD DAC may further include a current-to-voltage converter configured to convert the differential current signal to a differential voltage signal. In additional examples, the differential current source may include one or more source degeneration resistances. In further examples, the current-to-voltage converter may include a fully-differential operational amplifier. A low pass filter may be included within the current-to-voltage converter and/or coupled to the output of the current-to-voltage converter. | 12-16-2010 |
20110062937 | Low Voltage Bandgap Voltage Reference Circuit - A temperature compensated low voltage reference circuit can be realized with a reduced operating voltage overhead and reduced spatial requirements This is accomplished in several ways including integrating one or more bipolar junction transistors into a current differencing amplifier and reducing the number of components required to implement various voltage reference circuits. All of the reference circuits may be constructed with various types of transistors including DTMOS transistors. | 03-17-2011 |
20130181697 | MEMS-BASED VOLTMETER - An electromechanical system (MEMS) voltmeter. An exemplary MEMS voltmeter includes a proof mass mounted to a substrate in a teeter-totter manner. The MEMS voltmeter also includes an input voltage plate located on the substrate under a first end of the proof mass. The first input voltage plate receives a voltage from a device under test. A drive voltage plate is located on the substrate under a second end of the proof mass. A first sense input voltage plate is located on the substrate under the first end of the proof mass. A second sense voltage plate is located on the substrate under the second end of the proof mass. A rebalancing circuit receives signals from the proof mass and the first and second sense voltage plates and generates a voltage value that is equal to the root mean square (RMS) voltage of the device under test. | 07-18-2013 |
20130293401 | SIGMA-DELTA DIGITAL-TO-ANALOG CONVERTER - A sigma-delta digital-to-analog converter (SD DAC) exhibits undesirable distortion when implemented in an integrated circuit due to the non-linearity of polysilicon resistors used in the filtering stages of the SD DAC. By using resistors other than polysilicon for the output resistor of an SD DAC, distortion can be reduced or eliminated. Additionally or alternatively, by generating an error correction signal, the distortion can be corrected. | 11-07-2013 |
20140022015 | MULTIPLE-OUTPUT TRANSCONDUCTANCE AMPLIFIER BASED INSTRUMENTATION AMPLIFIER - This disclosure is directed to devices and integrated circuits for instrumentation amplifiers. In one example, an instrumentation amplifier device uses two non-inverted outputs of a first multiple-output transconductance amplifier, and a non-inverted output and an inverted output of a second multiple-output transconductance amplifier. Both multiple-output transconductance amplifiers have a non-inverted output connected to an inverting input, and a non-inverting input connected to a respective input voltage terminal. A first resistor is connected between the inverting inputs of both multiple-output transconductance amplifiers. The outputs of both multiple-output transconductance amplifiers are connected together, connected through a second resistor to ground, and connected to an output voltage terminal. In other examples, two pairs of outputs from triple-output transconductance amplifiers are connected to provide two voltage output terminals, and may also be connected to buffers or a differential amplifier. These provide various advantages over traditional instrumentation amplifiers. | 01-23-2014 |
20140340146 | VARIABLE-GAIN DUAL-OUTPUT TRANSCONDUCTANCE AMPLIFIER-BASED INSTRUMENTATION AMPLIFIERS - A variable-gain current conveyor-based instrumentation amplifier without introducing distortion. An exemplary variable-gain instrumentation amplifier includes a first dual-output transconductance amplifier (DOTA) (i.e., current conveyor) that receives a first input voltage, a second DOTA that receives a second input voltage, a first resistive element connected between the first and second DOTA, an amplifier connected to the second DOTA at an inverting input, and a second resistive element that connects the second DOTA and the inverting input to an output of the amplifier. At least one of the resistive elements is a variable resistive element. | 11-20-2014 |