Patent application number | Description | Published |
20100033059 | APPARATUS FOR GENERATING ELECTRICAL ENERGY AND METHOD FOR MANUFACTURING THE SAME - An apparatus for generating electrical energy including a first electrode, a second electrode and one or more nanowires, and a method for manufacturing the apparatus for generating electrical energy. The second electrode may have a concave portion and a convex portion. The first electrode and the nanowire are formed of different materials. The nanowire is formed on the first electrode and is positioned between the first electrode and the second electrode. Because the nanowire is formed on the first electrode, the nanowire may be grown vertically and the uniformity and conductivity of the nanowires may be improved. When a stress is applied to the first electrode or the second electrode, the nanowire is deformed and an electric current is generated from the nanowire due to a piezoelectric effect of the nanowire and a Schottky contact between the nanowire and the electrode which makes contact with the nanowire. Accordingly, when the apparatus for generating electrical energy is bent or pressed in part, electrical energy is generated in response to the applied stress. | 02-11-2010 |
20100136414 | APPARATUS FOR STORING ENERGY AND METHOD FOR MANUFACTURING THE SAME - An apparatus for storing energy may include: a plurality of nanowire cells electrically connected to each other; and a storage for storing electrical energy generated from the nanowire cells. Each of the plurality of nanowire cells may include: first and second electrodes disposed at an interval; and a nanowire, which is disposed between the first and the second electrodes and made of a piezoelectric material. The plurality of nanowire cells may be electrically connected, so that voltage or current may be increased. Therefore, wireless recharging of the storage connected to the nanowire cells with electrical energy may be enabled. | 06-03-2010 |
20100156249 | APPARATUS FOR GENERATING ELECTRICAL ENERGY AND METHOD FOR MANUFACTURING THE SAME - An apparatus for generating electrical energy may include; a first electrode, a second electrode spaced apart from the first electrode, the second electrode having a substantially planar flat plate shape, a conductor which electrically connects the first and second electrodes, and a nanowire disposed on the first electrode, the nanowire including a deformable piezoelectric material, wherein a Schottky contact is formed between the nanowire and the second electrode as the nanowires is deformed. | 06-24-2010 |
20100253184 | APPARATUS FOR GENERATING ELECTRICAL ENERGY AND METHOD FOR MANUFACTURING THE SAME - An apparatus for generating electrical energy may include; a first electrode, a second electrode spaced apart from the first electrode, a nanowire which includes a piezoelectric material and is disposed on the first electrode, an active layer disposed on the first electrode, a conductive layer disposed on the active layer, and an insulating film disposed between the conductive layer and the nanowire, wherein the nanowire and the active layer are electrically connected to each other. A method for manufacturing an apparatus for generating electrical energy may include; disposing a nanowire including a piezoelectric material on a first electrode, disposing an active layer, which is electrically connected to the nanowire, on the first electrode, disposing an insulating film on the nanowire, disposing a conductive layer on the active layer, and disposing a second electrode in proximity to the nanowire and substantially opposite to the first electrode. | 10-07-2010 |
20110138610 | APPARATUS FOR GENERATING ELECTRICAL ENERGY AND METHOD FOR MANUFACTURING THE SAME - An apparatus for generating electrical energy including a first electrode, a second electrode and one or more nanowires, and a method for manufacturing the apparatus for generating electrical energy. The second electrode may have a concave portion and a convex portion. The first electrode and the nanowire are formed of different materials. The nanowire is formed on the first electrode and is positioned between the first electrode and the second electrode. Because the nanowire is formed on the first electrode, the nanowire may be grown vertically and the uniformity and conductivity of the nanowires may be improved. When a stress is applied to the first electrode or the second electrode, the nanowire is deformed and an electric current is generated from the nanowire due to a piezoelectric effect of the nanowire and a Schottky contact between the nanowire and the electrode which makes contact with the nanowire. Accordingly, when the apparatus for generating electrical energy is bent or pressed in part, electrical energy is generated in response to the applied stress. | 06-16-2011 |
20120210565 | APPARATUS FOR GENERATING ELECTRICAL ENERGY AND METHOD FOR MANUFACTURING THE SAME - An apparatus for generating electrical energy may include; a first electrode, a second electrode spaced apart from the first electrode, a nanowire which includes a piezoelectric material and is disposed on the first electrode, an active layer disposed on the first electrode, a conductive layer disposed on the active layer, and an insulating film disposed between the conductive layer and the nanowire, wherein the nanowire and the active layer are electrically connected to each other. A method for manufacturing an apparatus for generating electrical energy may include; disposing a nanowire including a piezoelectric material on a first electrode, disposing an active layer, which is electrically connected to the nanowire, on the first electrode, disposing an insulating film on the nanowire, disposing a conductive layer on the active layer, and disposing a second electrode in proximity to the nanowire and substantially opposite to the first electrode. | 08-23-2012 |
Patent application number | Description | Published |
20100103121 | TOUCH SCREEN PANEL INTEGRATED INTO LIQUID CRYSTAL DISPLAY, METHOD OF MANUFACTURING THE SAME, AND TOUCH SENSING METHOD - A touch screen panel includes: a first substrate and a second substrate, which face each other with respect to a liquid crystal interposed therebetween; and a touch sensor interposed between the first substrate and the second substrate. The touch sensor includes: a plurality of first touch signal lines disposed on the first substrate and extending in a first direction; a protective layer disposed on the first substrate, the protective layer including a dielectric material and substantially the plurality of first touch signal lines; a plurality of contact pads disposed on the protective layer; a plurality of second touch signal lines disposed on the second substrate and extending in a second direction perpendicular to the first direction; and a plurality of touch sensor spacers electrically connected to the plurality of second touch signal lines. A gap between the touch sensor spacers and the plurality of contact pads is defined, and the spacers are disposed to face the plurality of contact pads. | 04-29-2010 |
20110050042 | APPARATUS FOR GENERATING ELECTRICAL ENERGY AND METHOD FOR MANUFACTURING THE SAME - Disclosed is an apparatus for generating electrical energy that includes; a first electrode, and a second electrode spaced apart from the first electrode, and an energy generation layer disposed between the first electrode and the second electrode, wherein the energy generation layer comprises a photoelectric conversion layer and a plurality of piezoelectric nanowires, and wherein when an external force is applied to at least one of the first electrode and the second electrode, the plurality of piezoelectric nanowires are transformed to generate electrical energy. | 03-03-2011 |
20110101315 | PIEZOELECTRIC NANOWIRE STRUCTURE AND ELECTRONIC DEVICE INCLUDING THE SAME - A piezoelectric nanowire structure includes a base substrate, a plurality of piezoelectric nanowires disposed on the base substrate, and a piezoelectric organic material layer disposed on the base substrate and covering the plurality of piezoelectric nanowires. | 05-05-2011 |
20110129675 | MATERIAL INCLUDING GRAPHENE AND AN INORGANIC MATERIAL AND METHOD OF MANUFACTURING THE MATERIAL - A material including: graphene; and an inorganic material having a crystal system, wherein a crystal plane of the inorganic material is oriented parallel to the (0001) plane of the graphene. The crystal plane of the inorganic material has an atomic arrangement of a hexagon, a tetragon, or a pentagon. | 06-02-2011 |
20110155478 | THERMOELECTRIC TOUCH SENSOR - A thermoelectric touch sensor includes a first electrode, a thin film layer provided on the first electrode and including a thermoelectric material, a second electrode provided on the thin film layer, a sensing unit which senses at least one of a current flowing between the first electrode and the second electrode and a voltage applied between the first electrode and the second electrode. | 06-30-2011 |
20120225196 | APPARATUS FOR GENERATING ELECTRICAL ENERGY AND METHOD FOR MANUFACTURING THE SAME - Disclosed is an apparatus for generating electrical energy that includes; a first electrode, and a second electrode spaced apart from the first electrode, and an energy generation layer disposed between the first electrode and the second electrode, wherein the energy generation layer comprises a photoelectric conversion layer and a plurality of piezoelectric nanowires, and wherein when an external force is applied to at least one of the first electrode and the second electrode, the plurality of piezoelectric nanowires are transformed to generate electrical energy. | 09-06-2012 |
Patent application number | Description | Published |
20100259694 | LIGHT SOURCE MODULE, BACKLIGHT UNIT AND DISPLAY APPARATUS - A display apparatus having a display and a backlight unit (BLU) which provides backlight to the display are provided. The BLU includes a first light source module in which a plurality of light sources are arranged, a second light source module in which a plurality of light sources are arranged, and a light source driving unit which drives the first light source module and second light source module. The first light source module and second light source module are connected to each other by a first connector. | 10-14-2010 |
20110043721 | BACK LIGHT ASSEMBLY AND LIQUID CRYSTAL DISPLAY INCLUDING THE SAME - A back light assembly having uniform interior temperature to prevent quality deterioration of a liquid crystal display and a liquid crystal display including the same includes a light guide plate, a light source unit to emit light to an edge of the light guide plate, a lower cover to receive the light guide plate and the light source unit, heat generated from the light source unit being transferred to the lower cover, and a heat insulator provided adjacent to at least one region of the lower cover in an area to correspond to the light source unit. | 02-24-2011 |
20120162281 | LIGHT GUIDE PLATE, BACKLIGHT UNIT AND DISPLAY APPARATUS INCLUDING THE SAME AND MANUFACTURING METHOD THEREOF - A light guide plate, a backlight unit and a display apparatus including the same and a manufacturing method thereof are provided. The light guide plate includes: a body which includes an incident surface and an emission surface; at least one first optical path converter which is formed in an opposite surface of the body which is opposite to the emission surface, and extends continuously in a first direction to convert an optical path of an incident light introduced through the incident surface so that the incident light passes through the emission surface; and at least one second optical path converter which is formed in the opposite surface, and is arranged discontinuously in at least one row extending in the first direction. | 06-28-2012 |
20120182500 | SCANNING BACKLIGHT UNIT AND LIQUID CRYSTAL DISPLAY HAVING THE SAME - A scanning backlight unit, a liquid crystal display and television and a television are provided herein. The backlight unit including a light source unit having plural groups of light sources which emit light in a main incidence direction; a control unit which controls the plural groups of light sources; and a light guiding plate having a bottom surface formed with a dispersion pattern dispersing the light received from the light source unit, wherein the dispersion pattern includes a plurality of grooves, with a groove of the plurality of grooves having a shape with a first size parallel to the main incidence direction and a second size perpendicular to the main incidence direction, and wherein the first size is larger than the second size. | 07-19-2012 |
20120300139 | PLANAR LIGHTING APPARATUS AND LIQUID CRYSTAL DISPLAY HAVING THE SAME - A planar lighting apparatus, liquid crystal display having the same and a television having the same are provided. The planar lighting apparatus includes a reflection sheet; a prism sheet which is spaced apart from the reflection sheet, and which includes a prism pattern on a surface of the prism sheet facing the reflection sheet; and a light source which emits light toward a space between the reflection sheet and the prism sheet and is disposed on at least one side of the space, wherein the prism pattern has a shape which reflects the light emitted from the light source. | 11-29-2012 |
20130044269 | LIQUID CRYSTAL PANEL ASSEMBLY AND LIQUID CRYSTAL DISPLAY APPARATUS HAVING THE SAME - An LGP-less liquid crystal panel assembly includes at least one light source generating light; a liquid crystal panel displaying the light generated from the light source, as an image; at least one optical film arranged behind the liquid crystal panel; an upper chassis and a lower chassis accommodating the light source, the liquid crystal panel, and the optical film; and at least one tension member applying tension to the optical film so as to prevent the optical film from drooping. | 02-21-2013 |
20130050612 | BACKLIGHT UNIT AND MANUFACTURING METHOD THEREOF, AND LIQUID CRYSTAL DISPLAY DEVICE HAVING THE SAME - A backlight unit is provided which includes: a light guide plate which guides incident light from a lateral side of the light guide plate toward a liquid crystal display (LCD) panel placed in front of the light guide plate; a light source unit which includes a light source which emits the light and a light source supporting member which supports the light source and is arranged adjacent to the lateral side of the light guide plate; a supporting frame which is arranged in the backlight unit; a quantum dot (QD) bar which is arranged between the lateral side of the light guide plate and the light source and changes a color of the light emitted from the light source; and a QD-bar fastening unit which fastens the QD bar to at least one of the light source supporting member and the supporting frame. | 02-28-2013 |
20130114300 | BACKLIGHT UNIT AND DISPLAY APPARATUS HAVING THE SAME - A backlight unit of a display apparatus, the backlight unit includes a light source unit disposed on at least one edge of a display panel; and a light guide plate disposed at rear of the display panel. The light guide plate includes a first pattern part including a plurality of first pattern lines formed on a lower surface of the light guide plate, and which extend perpendicularly to a transmission direction of the radiated light, and which totally reflect the radiated light to an upper surface of the light guide plate, and a second pattern part including a plurality of second pattern lines formed on the upper surface of the light guide plate, and which extend parallel with the transmission direction of the radiated light, and which guide light transmitted in the light guide plate to travel and exit along the second pattern lines. | 05-09-2013 |
20130201663 | SUPPORTING MEMBER FOR BACKLIGHT UNIT, BACKLIGHT UNIT AND IMAGE DISPLAY APPARATUS HAVING THE SAME - A supporting member usable with a backlight unit of an image display apparatus includes a supporting portion that is formed of a transparent material, is disposed below the diffuser plate to support the diffuser plate, and has a first end being in contact with the diffuser plate; and a base that is formed at a second end of the supporting portion and fixes the supporting portion to an under chassis of the backlight unit. | 08-08-2013 |
20130215645 | LIGHT GUIDE PLATE, BACKLIGHT UNIT INCLUDING THE SAME, DISPLAY APPARATUS, AND METHOD OF MANUFACTURING THE SAME - A light guide plate, a backlight unit including the light guide plate, a display apparatus and a method of manufacturing the light guide plate, the light guide plate including: a first body with a first light entry surface through which light enters; a second body with a light exit surface through which the incident light exits the first body; and a quantum dot layer disposed between the first body and the second body with a quantum dot which converts a wavelength of the light incident through the light entry surface and is. | 08-22-2013 |
20130242612 | LIGHT GUIDE PANEL AND BACKLIGHT UNIT HAVING THE SAME - A light guide panel (LGP) is provided, which includes a front surface, a rear surface, and four edge surfaces, in which rays of light emitted from light sources are introduced through at least one of the four edge surfaces, a plurality of lenticular patterns formed on one of the front surface and the rear surface, and a plurality of light emitting patterns which induce the rays of light emitted from the light sources toward the front surface. The plurality of light emitting patterns are integrally formed with the plurality of lenticular patterns. | 09-19-2013 |
20130258717 | BACKLIGHT UNIT AND IMAGE DISPLAY APPARATUS HAVING THE SAME - A backlight unit includes a light guiding plate; a light source module that is disposed in at least one side of the light guiding plate and includes a plurality of light sources emitting light toward a side surface of the light guiding plate; an under chassis supporting the light guiding plate and the light source module; and a gap maintaining unit maintaining a gap of a constant width between the side surface of the light guiding plate and the plurality of light sources of the light source module when a length of the light guiding plate is changed. | 10-03-2013 |
20130300955 | DISPLAY PANEL AND DISPLAY APPARATUS HAVING A DISPLAY PANEL - A display panel, which realizes a 3D image in an active method, includes a first glass on which light is incident, a second glass which is aligned with the first glass and transmits an image, a first liquid crystal layer disposed between the first glass and the second glass and adjusts an amount of the light passing therethrough, and a second liquid crystal layer which is disposed between the second glass and the first liquid crystal layer and realizes the 3D image, wherein, in response to the display panel realizing the 3D image, the second liquid crystal layer is alternately arranged according to a first liquid crystal arrangement which corresponds to a first polarization direction and a second liquid crystal arrangement which corresponds to a second polarization direction which is different from the first polarization direction, so that images passing through the second liquid crystal layer are alternately polarized in the first polarization direction and the second polarization direction. | 11-14-2013 |
20130321740 | CURVED DISPLAY APPARATUS AND MULTI DISPLAY APPARATUS HAVING THE SAME - A curved display apparatus and a multi display system having the same are provided. The curved display apparatus includes a display panel, and a fixation member which fixes the display panel so that the display panel is curved with multiple curvatures. | 12-05-2013 |
20130329164 | LIQUID CRYSTAL DISPLAY APPARATUS - A liquid crystal display apparatus according to an exemplary embodiment of the present inventive concept is provided the liquid crystal display apparatus includes a liquid crystal panel which displays images; backlight unit which provides light to the liquid crystal panel; and an optical sheet unit which is placed between the liquid crystal panel and backlight, wherein the optical sheet unit includes at least one scattering particle optical sheet where scattering particles are provided. | 12-12-2013 |
20130329165 | LIGHT GUIDE PANEL AND LIQUID CRYSTAL DISPLAY APPARATUS HAVING PARTICULAR LIGHT-EMITTING PATTERN SURFACE - A light guide panel (LGP) for use in a liquid crystal display (LCD) apparatus includes a light-emitting pattern surface on which light-emitting patterns are formed, an opposite surface opposite to the light-emitting pattern surface, and four edge surfaces. Lenticular patterns are formed on one of the light-emitting pattern surface and the opposite surface. The light-emitting pattern surface includes a light-emitting part in which the light-emitting patterns are formed; and an edge part which extends along the four edge surfaces to enclose the light-emitting part and in which at least one fixing groove is formed to fix the LGP. The light-emitting part includes a pattern reducing region which faces the fixing groove and has a lower light-emitting pattern density than an other region of the light-emitting part. | 12-12-2013 |
20140211121 | DISPLAY MODULE AND DISPLAY APPARATUS HAVING THE SAME - A display module includes a display panel; a backlight unit which is disposed behind the display panel and configured to emit light toward the display panel; a bottom chassis configured to accommodate the backlight unit; and a reflective sheet which is disposed inside the bottom chassis and configured to reflect a light portion incident thereon toward the display panel. The reflective sheet includes a sheet bottom portion corresponding to a front surface of the bottom chassis, a sheet inclined portion which is obliquely formed to face a rear surface of the display panel, and a light adjustment portion which is provided on the sheet inclined portion and configured to adjust the light portion reflected by the sheet inclined portion. | 07-31-2014 |
20140211123 | DISPLAY MODULE AND DISPLAY APPARATUS HAVING THE SAME - A display module includes a display panel, a diffusion plate, a bottom chassis, and a transparent spacer made having a diffusion pattern formed thereon disposed on the bottom chassis to support the diffusion plate. | 07-31-2014 |
20140286000 | BACKLIGHT UNIT AND DISPLAY DEVICE HAVING THE SAME - A backlight unit and a display device having the same includes a light source installed at a position, separated from the central region of a light diffuser diffusing light by a predetermined distance, to radiate light to the light diffuser, and a lens unit installed between the light diffuser and the light source and having a surface facing the light source, the surface of the lens unit facing the light source including reflective areas which are coated with a reflective material and reflect a part of light radiated from the light source, and a transmissive area transmitting the other part of light radiated from the light source. The display device may eliminate generation of a dark region on a display panel due to the shadow of the backlight unit through improvement of the structure of the lens unit. | 09-25-2014 |
20140333873 | DISPLAY DEVICE - A display device including a display panel configured to display, a backlight unit configured to emit light toward the display panel, a pattern layer having a pattern formed to compensate for short-wavelength light among light emitted the backlight unit, and a diffusion plate configured to diffuse the compensated short-wavelength light and the light emitted from the backlight unit, so that the non-uniform color generated due to the color breakup is improved by use of blue ink having a bead shape that is disposed on the diffusion plate. | 11-13-2014 |
20140347840 | DISPLAY DEVICE - A display device includes a display panel, a backlight unit configured to output light to the display panel, and a lens part interposed between the display panel and the backlight unit, and configured to transmit the light output from the backlight unit is transmitted, wherein the backlight unit includes an optical module configured to output the light, and a light guide plate configured to form a light path through which the light that is output from the optical module and incident on the light guide plate is transmitted and to scatter the incident light, the light guide plate including a fixing hole, a first pattern part configured to scatter the incident light output from the optical module, and a second pattern part provided adjacent to the fixing hole. | 11-27-2014 |
20150042896 | DISPLAY PANEL AND DISPLAY APPARATUS HAVING THE SAME - A display panel includes an upper plate including a first substrate, a first electrode layer formed on an inner surface of the first substrate, and an absorptive polarizing film formed on an outer surface of the first substrate and having a first polarization axis, a lower plate including a second substrate, a second electrode layer formed on an inner surface of the second substrate, and a reflective polarizing film formed on an outer surface of the second substrate and having a second polarization axis perpendicular or parallel to the first polarization axis, an LC layer filled between the upper plate and the lower plate, and an LC driving power supply connected between the first electrode layer and the second electrode layer and configured to selectively provide an LC driving voltage to the LC layer changing a polarization direction of incident light in the LC layer. | 02-12-2015 |
20150049283 | DISPLAY APPARATUS AND CONTROL METHOD THEREOF - A display apparatus and a control method thereof are provided. The display apparatus includes: a power supply which supplies power to elements of the display apparatus; a mirror which is switchable between a mirror mode and a transparency mode; and a controller which controls the power supply. When power is shut off from the mirror, the mirror operates in the mirror mode, and when power is supplied to the mirror, the mirror operates in the transparency mode. | 02-19-2015 |
Patent application number | Description | Published |
20100139443 | Damping System for Shift Cable - A damping system for a shift cable is disclosed, in which vibrations and noises that are generated by a transmission and transmitted into the interior of a vehicle through a shift cable are considerably reduced across a damper, that is positioned in a bottleneck section of a socket housing and contacts with bottleneck section, such that it is possible to effectively exclude vibrations and noises transmitted into the interior of a vehicle. Further, the present invention is advantageous in terms of the cost and weight, because a rubber damper is used instead of a mass damper, and it is possible to reduce vibrations and noises without increasing force for operating a shift lever and maximally prevent the function of reducing vibrations and noises from being deteriorated by frictional wear. | 06-10-2010 |
20110041644 | APPARATUS FOR REDUCING NOISE OF SHIFT CABLE - An apparatus for reducing noise of a shift cable, may include a stopper that is integrally formed with an inner cable of the shift cable, an anti-vibration member that is disposed around the inner cable and is spaced apart from the inner cable to selectively contact with the stopper, and a damper housing that retains the anti-vibration member and the stopper therein | 02-24-2011 |
20110056325 | NOISE REDUCTION APPARATUS FOR SHIFT CABLE - A noise reduction apparatus for a shift cable, may include a mounting socket that is fixed to a shift lever mounting bracket, with an inner cable of the shift cable therethrough, a cable connection pipe that has one side connected to a shift lever-sided end of an outer cable of the shift cable, and a housing connection pipe that has one end elastically-coupled to a shift lever-sided end of the cable connection pipe with a predetermined distance therebetween by a first antivibration member in a damper housing and the other end thereof elastically-connected to the shift lever mounting bracket by a second antivibration member in the mounting socket. | 03-10-2011 |
20120137822 | PEDAL DEVICE FOR VEHICLE - A pedal device for a vehicle may include a brake pedal and an accelerator pedal which may be pivotally installed in a movable panel, an electric device selectively moving the movable panel, and an eco device transferring a motion of the electric device to the accelerator pedal to adjust a pedal effort of the accelerator pedal or vibrate the accelerator pedal. | 06-07-2012 |
20120144948 | OPERATING APPARATUS FOR VEHICLE - An operating apparatus for a vehicle facilitating a continuous operation may include a shift lever, a gate means providing a gate pattern and allowing the shift lever moving along a path to sequentially select a plurality of shift ranges and to make a continuous displacement in a specific shift range, actuators mounted in a vehicle to change physical quantities, and a controller controlling the actuators based on the continuous displacement made by the shift lever in the specific shift range. In addition, instead of letting the shift lever to make a continuous displacement in a specific shift range, the operating apparatus may include an additional independent operator to make the continuous displacement. | 06-14-2012 |
20120144949 | SHIFTING APPARATUS FOR VEHICLE - A shifting apparatus capable of selecting any one of plural shift ranges according to a driver's manipulation intention and allowing the driver to additionally express his/her consecutive manipulation intention in a specific shift range may include: a main shaft, a shifting lever installed to slide in a straight line and pivot along the main shaft, and a gate plate limiting a reciprocation path of the shifting lever such that the shifting lever reciprocates on a single path while sliding in a straight line and pivoting along the main shaft. The gate plate may include a gate pattern having a plurality of shift ranges arranged in a line on the reciprocation path and formed in such a manner that a specific shift range among the plurality of shift ranges is discriminated from the other shift ranges. | 06-14-2012 |
20120316030 | IGNITION CONTROL TYPE AUTO LEVER DEVICE - An ignition control type auto lever device may disclose shift mode control signals for P(parking)-R(rear)-N(neutral)-D(drive) that are generated by movement of an auto lever according to a gate pattern, another mode control signal that is generated by movement of the auto lever to a section behind the D(drive), and electric signals generated by at least one or more different operations of the auto lever at a section positioned ahead of the P(parking) position that are sent to a PIC (Personal Identification Card) system. | 12-13-2012 |
20130025397 | INTEGRATED CONTROL SHIFT LEVER DEVICE - An integrated control shift lever device according to an exemplary embodiment provides M mode of +/− to feel a dynamic shift manipulation feeling together with automatic mode of P (parking), R (reverse), N (neutral), and D (driving) as a basic function and further provides integrated mode 6 to provide to engine control unit the electrical signal generated by positional change of automatic lever to control the engine, suspension device, or the steering device in addition to the transmission by driver's simple manipulation, thereby significantly improving convenience and in particular, further improving performance, quality, and merchantability of an automobile when the integrated control shift lever device may be applied to a vehicle. | 01-31-2013 |
20130025398 | INTEGRATED CONTROL SHIFT LEVER DEVICE - An shift lever device provides M mode of +/− to feel a dynamic shift manipulation feeling together with automatic mode of P (parking), R (reverse), N (neutral), and D (driving) as a basic function and further provides integrated mode to provide to engine control unit the electrical signal generated by positional change of automatic lever to control the engine, suspension device, or the steering device in addition to the transmission by driver's simple manipulation, thereby significantly improving convenience and in particular, further improving performance, quality, and merchantability of an automobile when the shift lever device is applied to a vehicle. | 01-31-2013 |
20130074642 | DAMPING SYSTEM FOR SHIFT CABLE - A damping system for a shift cable is disclosed, in which vibrations and noises that are generated by a transmission and transmitted into the interior of a vehicle through a shift cable are considerably reduced across a damper, that is positioned in a bottleneck section of a socket housing and contacts with bottleneck section, such that it is possible to effectively exclude vibrations and noises transmitted into the interior of a vehicle. Further, the present invention is advantageous in terms of the cost and weight, because a rubber damper is used instead of a mass damper, and it is possible to reduce vibrations and noises without increasing force for operating a shift lever and maximally prevent the function of reducing vibrations and noises from being deteriorated by frictional wear. | 03-28-2013 |
20130133459 | SHIFT/TILT LOCKING APPARATUS AND METHOD FOR SHIFT LEVER OF AUTOMATIC TRANSMISSION - A shift/tilt locking apparatus and method for shift lever of automatic transmission allows a shift knob to slide and tilt to fit the state of a vehicle the driver's intention, or restricts the operation of the shift knob. The apparatus may include a shift knob, a main shaft slidably and rotatably disposed in a housing such that shift knob is slidable; a crossbar having shift knob at the upper end to tilt; a shift restriction means that allows shift knob to slide by selectively restricting sliding of main shaft; and a tilting restriction means controlling shift knob to tilt by selectively restricting the tilting of shift knob by using a third solenoid, which is controlled by a shift mode determining step that determines a shift mode by checking the position of shift knob and a lever locking step that restricts/releases shift knob by selectively operating first solenoid to third solenoid. | 05-30-2013 |
20130144485 | AUTOMATIC TRANSMISSION FOR SHIFT BY WIRE - An automatic transmission for shift-by-wire that includes a transmission that is selectively operated by a plurality of traveling-drive modes relating to shifting, a shift lever that includes a tiltable handle and a tilt sensor that senses tilting of the handle, and a control unit that calculates tilting information on the basis of a tilting signal sensed by the tilt sensor, selects one of the traveling-drive modes by using the calculated tilting information, and sets the transmission to be operated in the selected traveling-drive mode. As described above, it is possible for a driver to easily perform an operation for changing drive modes while driving, by changing the drive modes by using a tilting operation of a shift lever, such that the drive safety can be improved. | 06-06-2013 |
20130145887 | ELECTRONIC SHIFT LEVER FOR IMPROVING OPERABILITY IN AUTOMATIC TRANSMISSION - An electronic shift lever apparatus of an automatic transmission improving operability which may be provided in a room of a vehicle adopting the automatic transmission, may include a base having a lower member fixed to the vehicle and an upper member positioned above the lower member, a frame engaged to the upper member and horizontally slidable with respect to the upper member, a shift lock controlling device disposed between the frame and the upper member of the base and selectively locking the frame to the base, and an upper cover positioned above the frame, slidable vertically, and selectively unlocking the shift lock controlling device which controls an engaging state of the frame to the base. | 06-13-2013 |
Patent application number | Description | Published |
20090028725 | Hermetic compressor - A hermetic compressor for adjusting the length and cross sectional area of a communication path as a refrigerant flow passage, so as to attenuate a discharge pulsation and consequently, a vibration and noise thereof. The hermetic compressor, which includes a cylinder head having a discharge chamber to discharge a compressed refrigerant and a discharge muffler to receive the refrigerant discharged from the discharge chamber, further includes a communication path to communicate the discharge chamber and the discharge muffler with each other, so as to allow the refrigerant to flow from the discharge chamber into the discharge muffler, and an auxiliary communication tube to increase a length of the communication path for increasing a refrigerant flow distance. The auxiliary communication path reduces the cross sectional area of a refrigerant flow passage while increasing a refrigerant flow distance, thereby attenuating a low-frequency component of the discharge pulsation. | 01-29-2009 |
20100058816 | Drum type washing machine - Disclosed herein is a drum type washing machine including a body, a tub arranged in the body, and a drum rotatably installed in the tub, and an inner surface of a rear wall of the has a flat portion along a rotating direction of the drum. | 03-11-2010 |
20120121422 | Centrifugal fan and refrigerator having the same - A centrifugal fan includes a main shroud and a sub shroud. The main shroud is configured to connect upper ends of outer rims of a plurality of blades spaced apart from one another in a circumferential direction of a base. The sub shroud is provided at the upper end of the outer rim of each blade and serves to prevent air from moving from a pressure surface to a negative pressure surface of each blade by passing over an upper end of the blade. | 05-17-2012 |
20120304703 | WASHING MACHINE - A washing machine having an improved structure which increases washing capacity without increasing the size of the washing machine. The washing machine includes a cabinet including an outer part and a cylindrical inner part connected to the outer part, a spin basket rotatably disposed in the inner part and including a bottom and a side wall extending from the bottom, a pulsator rotatably disposed in the spin basket, a motor provided under the spin basket, a clutch to selectively transmit power of the motor to the spin basket or the pulsator, a base plate to fix the clutch and the motor, and suspension members connecting the base plate to the upper portion of the cabinet. Wash water is stored within the spin basket and is not stored outside the spin basket during a washing cycle. | 12-06-2012 |
20130014547 | WASHING MACHINEAANM Kim; Hyun MookAACI Osan-siAACO KRAAGP Kim; Hyun Mook Osan-si KRAANM Jun; Kab JinAACI Gwangiu-siAACO KRAAGP Jun; Kab Jin Gwangiu-si KRAANM Min; Je HongAACI Seongnam-siAACO KRAAGP Min; Je Hong Seongnam-si KRAANM Lee; Sang HyeokAACI Suwon-siAACO KRAAGP Lee; Sang Hyeok Suwon-si KRAANM Choi; Ji HoonAACI Hwaseong-siAACO KRAAGP Choi; Ji Hoon Hwaseong-si KRAANM Kim; Seung OhAACI Suwon-siAACO KRAAGP Kim; Seung Oh Suwon-si KR - A washing machine includes a cabinet, a rotary tub disposed to rotate around a driving shaft, which is vertically provided inside the inner part of the cabinet, and comprising a bottom and a sidewall, the sidewall slantingly extending from the bottom to have a diameter increasing toward an upper side of the rotary tub from the bottom, a driving apparatus disposed at a lower side of the rotary tub to rotate the rotary tub, a bracket plate connected to the rotary tub by the driving shaft at the lower side of the rotary tub and having the driving apparatus provided at a lower side thereof, a base disposed at a lower side of the bracket plate, and a suspension member having a lower side supported by the base and an upper side connected to the bracket plate at a lateral side of a center of gravity of the rotary tub. | 01-17-2013 |
20130036774 | WASHING MACHINE - A washing machine includes a rotary tub having a diameter progressively increasing from a first end side thereof to a second end side thereof located opposite the first end side, dehydration holes arranged at the second end side of the rotary tub, and a dehydration hole switching unit to open and close the dehydration holes. The dehydration holes are opened depending on increase of a rate of rotation of the rotary tub. | 02-14-2013 |
20140096571 | WASHING MACHINE - A washing machine including a washing tub to allow enhancement in washing efficiency. A washing tub of the washing machine includes a pattern having a protrusion portion to generate friction force between laundry and the washing tub and to thereby increase washing efficiency. The pattern has a concave-convex structure and performs action similar to a lifter, washing efficiency may be enhanced using tumbling generated by the pattern. A plurality of drain holes are arranged in a certain pattern in the washing tub to prevent a dehydration bottleneck phenomenon in which dehydration is concentrated at a particular drain hole and to increase a dehydration rate. The pattern is provided such that protrusion portions and recessed portions continue on the surface of the washing tub to enhance stiffness of the washing tub. | 04-10-2014 |
20140375188 | DOOR HINGE APPARATUS AND DRUM TYPE WASHING MACHINE HAVING THE SAME - A door hinge apparatus having a coupling structure between a door and a cabinet, and a drum-type washing machine having the same. The drum type washing machine includes an inlet formed through the cabinet to allow laundry to be inserted or withdrawn therethrough, a door coupled to the cabinet to open and close the inlet, and a hinge between the door and the cabinet. The hinge includes a cabinet bracket coupled to a front surface of the cabinet, a door bracket coupled to the door, a first moving unit coupled to the door bracket to allow the door to be pivoted with respect to the cabinet, and a second moving unit coupled to the cabinet bracket to allow the door to protrude forward from the cabinet and be substantially parallel and spaced from the cabinet. The door opens the inlet by moving forward by a predetermined distance or more from the cabinet and then pivoting, so that moisture in the drum is removed to some extent before the inlet is opened and the door can open without friction between the door and the cabinet. | 12-25-2014 |
20150033574 | WASHING MACHINE HAVING DRYING APPARATUS - A washing machine having a drying apparatus, which can perform a heated drying operation and shorten a drying time of laundry, is provided. The washing machine having a drying apparatus includes a top cover which is provided in an upper part of a body and has at least one air hole formed in a top surface thereof, a drying duct which is provided in the top cover to supply air heated by a heater provided thereinside to the air hole, and a rack member which is provided to be extractable from the body to hang laundry above the body. | 02-05-2015 |
20150041270 | LOWER SHOCK-ABSORBING APPARATUS FOR WASHING MACHINE PACKING - Disclosed is a lower shock-absorbing apparatus for washing machine packing that supports and protects a washing machine to prevent damage to the washing machine during transportation of the washing machine. The lower shock-absorbing apparatus includes a cap mounted at a drive shaft mounted to a washing tub to rotate the washing tub, a reinforcement guide to receive the cap, and a lower cushion disposed below the washing tub to absorb shock applied to the washing tub and to receive the reinforcement guide. | 02-12-2015 |
Patent application number | Description | Published |
20090096552 | OVERLAY ELECTROMAGNETIC BANDGAP (EBG) STRUCTURE AND METHOD OF MANUFACTURING THE SAME - Provided is an electromagnetic bandgap (EBG) structure, and particularly, an overlay EBG structure in which a plurality of vias and a plurality of plates are formed at intervals on a central signal line in such a manner that the vias and plates extend vertically from a substrate in order to reduce leakage loss of an electromagnetic wave through the substrate. Therefore, it is possible to prevent an electromagnetic wave passing through a transmission line from being lost through the substrate, to obtain desired frequency characteristics by adjusting the dimensions of the vias and plates, and to manufacture the overlay EBG structure using an existing CMOS process without having to perform any additional process. | 04-16-2009 |
20090121811 | MULTILAYERED COPLANAR WAVEGUIDE FILTER UNIT AND METHOD OF MANUFACTURING THE SAME - A multilayered coplanar waveguide (CPW) filter unit and a method of manufacturing the same are provided. A plate having a capacitance element is formed on or below a CPW layer including a signal line for transmitting a signal and a ground plane. As the filter unit has a multilayered structure, characteristic impedance may be reduced without increasing the width of the signal line. Where an inductor line is inserted between the signal line and the plate, a clear frequency response curve may be obtained without performing an additional process or increasing the area of the filter unit. | 05-14-2009 |
20090140823 | BROADBAND MICROSTRIP BALUN AND METHOD OF MANUFACTURING THE SAME - A broadband microstrip balun and a method of manufacturing the same are provided. In the balun, transmission lines formed at different layers partially overlap in parallel with each other, and a common ground having a predetermined opening is inserted between the transmission lines. Thus, an unbalanced signal may be converted into a balanced signal in a broad frequency band using resonance of a common ground plate with the opening and a Bethe hall effect. Also, impedance matching is readily enabled, thereby reducing a parasitic element. | 06-04-2009 |
20090207077 | SWITCHED BEAM-FORMING APPARATUS AND METHOD USING MULTI-BEAM COMBINING SCHEME - Provided is a switched beam-forming apparatus which includes a beam-forming unit forming a plurality of beams using an array antenna, a beam selection adjusting unit measuring Quality of Service (QoS) values of each of a plurality of signals received through the plurality of beams, a beam selecting unit selecting at least two beams with high QoS from among the plurality of beams according to the results of the QoS measuring, and a beam combining unit combining the at least two beams selected by the beam selecting unit. | 08-20-2009 |
20090212885 | RESONATOR AND BANDPASS FILTER HAVING OVERLAY ELECTROMAGNETIC BANDGAP (EBG) STRUCTURE, AND METHOD OF MANUFACTURING THE RESONATOR - Provided is an Electromagnetic Bandgap (EBG) structure, particularly, a resonator and a bandpass filter having an overlay EBG structure, and a method of manufacturing the resonator. The resonator is manufactured by forming a transmission line and ground plates on a substrate, arranging a plurality of reflector units at regular intervals along the longitudinal direction of the transmission line, and removing at least one reflector among the plurality of reflectors, thus forming a common resonating mode. Therefore, since reflector units constructing capacitance components are separated from a substrate, it is possible to prevent electromagnetic waves from leaking out of the substrate and ensure a high Q characteristic in a high frequency environment due to a resonating unit formed between the reflector units. | 08-27-2009 |
20090270051 | BEAMFORMER AND BEAMFORMING METHOD - Disclosed are a beamformer and a beamforming method. The beamformer includes a plurality of dividers, each of which divides an input signal along a plurality of paths, an input switch which selects one of the dividers such that the input signal is input to the selected divider, a phase shifter which shifts phases of respective output signals from the divider, and an output switch which transmits the output signals from the phase shifter to an antenna. | 10-29-2009 |
20100244997 | WAVEGUIDE OF MULTI-LAYER METAL STRUCTURE AND MANUFACTURING METHOD THEREOF - A waveguide of a multi-layer metal structure and a manufacturing method thereof are provided, the method including applying a plurality of metal layers on a substrate and a plurality of insulating layers respectively between the respective metal layers. Accordingly, it is possible to minimize conductive loss by dispersing current uniformly through wide regions between a signal line and ground lines. | 09-30-2010 |
Patent application number | Description | Published |
20100194457 | DELAY LOCKED LOOP CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME - A delay locked loop circuit includes: a delay locked loop block receiving an external clock and generating a delay locked internal clock; a duty cycle correcting block connected to the delay locked loop block and correcting the duty cycle of the internal clock; and an error detecting unit comparing the voltages of first and second pumping output nodes of the duty cycle correcting block to detect an operation error of the duty cycle correcting block. | 08-05-2010 |
20110109344 | Semiconductor devices having on-die termination structures for reducing current consumption and termination methods performed in the semiconductor devices - Example embodiments disclose a semiconductor device having an on-die termination (ODT) structure that reduces current consumption, and a termination method performed in the semiconductor device. The semiconductor device includes a calibration circuit for generating calibration codes in response to a reference voltage and a voltage of a calibration terminal connected to an external resistor and an on-die termination device for controlling a termination resistance of a data input/output pad in response to the calibration codes and an on-die termination control signal. The termination resistance of the data input/output pad is greater than a resistance of the calibration terminal. | 05-12-2011 |
20110116330 | SEMICONDUCTOR DEVICE HAVING ADDITIVE LATENCY - A semiconductor device receives a command corresponding to a memory access operation and performs the memory access operation after an additive latency period. The additive latency period begins when the command is received. The semiconductor device comprises a phase controller for controlling a phase of a clock signal and outputting a phase-controlled clock signal, and a controller for generating and outputting a control signal for enabling the phase controller that is disabled, at a predetermined time in the additive latency period. | 05-19-2011 |
20110153939 | SEMICONDUCTOR DEVICE, CONTROLLER ASSOCIATED THEREWITH, SYSTEM INCLUDING THE SAME, AND METHODS OF OPERATION - In one embodiment, the semiconductor device includes a data control unit configured to selectively process data for writing to a memory. The data control unit is configured to enable a processing function from a group of processing functions based on a mode register command during a write operation, the group of processing functions including at least three processing functions. The enabled processing function may be performed based on a signal received over a single pin associated with the group of processing functions. In another embodiment, the semiconductor device includes a data control unit configured to process data read from a memory. The data control unit is configured to enable a processing function from a group of processing functions based on a mode register command during a read operation. Here, the group of processing functions including at least two processing functions. | 06-23-2011 |
20110164462 | DELAY-LOCKED-LOOP CIRCUIT, SEMICONDUCTOR DEVICE AND MEMORY SYSTEM HAVING THE DELAY-LOCKED-LOOP CIRCUIT - A delay-locked-loop (DLL) circuit having a DLL that operates when an external clock signal has a low frequency and a DLL that operates when an external clock signal has a high frequency is disclosed. The DLL circuit includes a first DLL and second DLL. The first DLL adjusts a delay time of an external clock signal to generate a first internal clock signal synchronized with the external clock signal when the external clock signal has a low frequency. The second DLL adjusts the delay time of the external clock signal to generate a second internal clock signal synchronized with the external clock signal when the external clock signal has a high frequency. | 07-07-2011 |
20130069689 | Method For Operating Memory Device And Apparatuses Performing The Method - According to example embodiments, a method for operating a memory device includes receiving an on-die termination (ODT) signal through an ODT pin, and issuing a command or controlling an ODT circuit according to the ODT signal. | 03-21-2013 |
20130120043 | DELAY-LOCKED-LOOP CIRCUIT - A delay-locked-loop (DLL) circuit having a DLL that operates when an external clock signal has a low frequency and a DLL that operates when an external clock signal has a high frequency is disclosed. The DLL circuit includes a first DLL and second DLL. The first DLL adjusts a delay time of an external clock signal to generate a first internal clock signal synchronized with the external clock signal when the external clock signal has a low frequency. The second DLL adjusts the delay time of the external clock signal to generate a second internal clock signal synchronized with the external clock signal when the external clock signal has a high frequency. | 05-16-2013 |
20130198587 | MEMORY BUFFER PERFORMING ERROR CORRECTION CODING (ECC) - A memory system includes a semiconductor memory device, a memory controller for controlling the semiconductor memory device, and a memory buffer connected between the semiconductor memory device and the memory controller. The memory buffer is configured to perform error correction coding (ECC) on first data that is received from the memory controller to be stored in the semiconductor memory device and to perform ECC on second data read from the semiconductor memory device. | 08-01-2013 |
20130223171 | Semiconductor Device Capable of Rescuing Defective Characteristics Occurring After Packaging - A memory device capable of rescuing defective characteristics that occur after packaging includes a memory cell array including a plurality of memory cells and an antifuse circuit unit including at least one antifuse. The antifuse circuit unit stores a defective cell address of the memory cell array in the at least one antifuse and reads the defective cell address to an external source. The antifuse circuit unit stores a defective characteristic code in the at least one antifuse, wherein the defective characteristic code is related to at least one of a timing parameter spec., a refresh spec., an input/output (I/O) trigger voltage spec., and a data training spec. of the memory device, and outputs the defective characteristic code to an external source. | 08-29-2013 |
20130254495 | MEMORY SYSTEM - A memory system includes a memory controller, and first through fourth memory modules. The first memory module is directly connected to the memory controller through a first memory bus and exchanges first data with the memory controller through the first memory bus. The second memory module is directly connected to the memory controller through a second memory bus and exchanges second data with the memory controller through the second memory bus. The third memory module is connected to the first memory module through a third memory bus and exchanges the first data with the memory controller through the first and third memory buses. The fourth memory module is connected to the second memory module through a fourth memory bus and exchanges the second data with the memory controller through the second and fourth memory buses. | 09-26-2013 |
20140152340 | OPERATING METHOD OF INPUT/OUTPUT INTERFACE - A method of operating an input/output interface includes selecting one of a plurality of output driver circuits according to a mode selection signal, and outputting a data signal using the selected one of the plurality of output driver circuits. Another method of operating an includes generating a mode selection signal based on a received command signal, and controlling an on-die termination (ODT) circuit included in the input/output interface according to the mode selection signal. Another method of operating an includes generating a mode selection signal based on a received command signal, and controlling an ODT circuit included in the input/output interface according to the mode selection signal. | 06-05-2014 |
20140169119 | MEMORY SYSTEM HAVING DELAY-LOCKED-LOOP CIRCUIT - A delay-locked-loop (DLL) circuit having a DLL that operates when an external clock signal has a low frequency and a DLL that operates when an external clock signal has a high frequency is disclosed. The DLL circuit includes a first DLL and second DLL. The first DLL adjusts a delay time of an external clock signal to generate a first internal clock signal synchronized with the external clock signal when the external clock signal has a low frequency. The second DLL adjusts the delay time of the external clock signal to generate a second internal clock signal synchronized with the external clock signal when the external clock signal has a high frequency. | 06-19-2014 |
20140189227 | MEMORY DEVICE AND A MEMORY MODULE HAVING THE SAME - A memory device is provided. The memory device includes a plurality of memory chips, and a buffer chip connected to the plurality of memory chips. The plurality of memory chips and the buffer chip are disposed in a stack. A first input/output (IO) port of the buffer chip is connected in series to an external device, and a second IO port of the buffer chip is connected in parallel to IO ports of each of the plurality of memory chips. | 07-03-2014 |
20140203457 | STACKED DIE PACKAGE, SYSTEM INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME - A stacked die package includes a package substrate, a first die mounted on the package substrate and electrically connected to the package substrate, a second die electrically connected to the package substrate, and an interposer mounted on the package substrate and including a plurality of vertical electrical connection means electrically connecting the package substrate to the second die. At least part of the first die is disposed between the second die and the package substrate in a vertical direction. | 07-24-2014 |
20140270785 | ELECTRO-PHOTONIC MEMORY SYSTEM - An electro-photonic memory system includes a semiconductor memory device for storing data by receiving a first electrical signal, a memory controller for generating a second electrical signal to control the semiconductor memory device, an electrical-to-optical converter for receiving the second electrical signal from the memory controller and converting the second electrical signal into an optical signal, the electrical-to-optical converter separate from the memory controller, and an optical-to-electrical converter for receiving the optical signal from the electrical-to-optical converter and converting the optical signal into the first electrical signal. | 09-18-2014 |
20140313847 | CLOCK SYNCHRONIZATION CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING CLOCK SYNCHRONIZATION CIRCUIT - A clock synchronization circuit includes a delay-locked loop (DLL) and a delay-locked control unit. The DLL is configured to generate an output clock signal by delaying an input clock signal by a delay time, and to execute a delay-locking operation in which the delay time is adjusted to a locked state according to a comparison between the output clock signal and the input clock signal. The delay-locked control unit configured to detect the locked state of the DLL, and to control the DLL based on the determined locked state | 10-23-2014 |
20150067448 | METHOD OF OPERATING MEMORY DEVICE AND METHODS OF WRITING AND READING DATA IN MEMORY DEVICE - In a method of operating a memory device, a command and a first address from a memory controller are received. A read code word including a first set of data corresponding to the first address, a second set of data corresponding to a second address and a read parity data is read from a memory cell array of the memory device. Corrected data are generated by operating error checking and correction (ECC) using an ECC circuit based on the read cord word. | 03-05-2015 |
Patent application number | Description | Published |
20090008740 | Semiconductor Integrated Circuit Devices Having Conductive Patterns that are Electrically Connected to Junction Regions and Methods of Fabricating Such Devices - A semiconductor integrated circuit device includes a semiconductor substrate; a dummy pattern extending in one direction on the semiconductor substrate; a junction region electrically connecting the dummy pattern to the semiconductor substrate; and a voltage applying unit that is configured to apply a bias voltage to the dummy pattern. | 01-08-2009 |
20090237107 | Circuit having an active clock shielding structure and semiconductor intergrated circuit including the same - A circuit having an active clock shielding structure includes a logic circuit that receives a clock signal and performs a logic operation based on the clock signal, a power gating circuit that switches a mode of the logic circuit between an active mode and an sleep mode based on a power gating signal, a clock signal transmission line that transmits the clock signal to the logic circuit, and at least one power gating signal transmission line that transmits the power gating signal to the power gating circuit and functions as a shielding line pair with the clock signal transmission line. | 09-24-2009 |
20100231255 | Power Gating Circuit and Integrated Circuit Including Same - A power gating circuit includes a logic circuit, a switching element and a retention flip-flop. The logic circuit is coupled between a first power rail and a virtual power rail. The switching element selectively couples the virtual power rail to a second power rail in response to a mode control signal indicating an active mode or a standby mode. The retention flip-flop selectively performs a flip-flop operation or a data retention operation in response to a voltage of the virtual power rail. | 09-16-2010 |
20120297349 | METHOD OF DESIGNING A SEMICONDUCTOR DEVICE - In a method of designing a semiconductor device, a transistor included in a layout of the semiconductor device may be selected. A biasing data may be set for changing a characteristic of the selected transistor. A design rule check (DRC) process for the layout of the semiconductor device may be performed after ignoring the biasing data. An optical proximity correction (OPC) process for the layout of the semiconductor device may be performed based on the biasing data. | 11-22-2012 |
20120313693 | SEMICONDUCTOR DEVICE, METHOD AND SYSTEM WITH LOGIC GATE REGION RECEIVING CLOCK SIGNAL AND BODY BIAS VOLTAGE BY ENABLE SIGNAL - A method of controlling the provision of a body bias voltage to a logic gate region of a semiconductor device includes; gating application of a clock signal applied to a synchronization element in the logic gate region in accordance with an enable signal, and providing the body bias voltage to each body terminal of a plurality of logic gates arranged in the logic gate region in accordance with the enable signal. | 12-13-2012 |
20130069690 | POWER CONTROL CIRCUIT, SEMICONDUCTOR DEVICE INCLUDING THE SAME - A power control circuit is connected between a power supply voltage and a logic circuit to switch power supplied to the logic circuit. The power control circuit includes a plurality of first power gating cells (PGCs) receiving an external mode change signal in parallel, at least one second PGC connected with one first PGC, at least one third PGC connected with the at least one second PGC, and at least one fourth PGC connected with the at least one third PGC. The second power gating cell, the third PGC, and/or the fourth PGC may include a plurality of gating cells. At least one of the second, third, and fourth pluralities has power gating cells connected in series. Each of the first through fourth PGCs switches power supplied in response to the mode change signal. | 03-21-2013 |
20130086536 | METHOD OF GENERATING STANDARD CELL LIBRARY FOR DPL PROCESS AND METHODS OF PRODUCING A DPL MASK AND CIRCUIT PATTERN USING THE SAME - A method of constructing a standard cell library for double patterning lithography (DPL) includes dividing a standard cell into a first region determined not to have an interaction with an adjacent outer cell and a second region that is likely to have such an interaction, generating data representative of DPL patterns corresponding to the first and second regions, and generating a standard cell library made up of the data. The library is then accessed and used to form a DPL mask. The DPL mask can be used to form a pattern on a substrate made up of a layout of cells in which the pattern of the standard cell is duplicated at several locations in the layout. | 04-04-2013 |
20130185692 | METHOD OF DESIGNING A SYSTEM-ON-CHIP INCLUDING A TAPLESS STANDARD CELL, DESIGNING SYSTEM AND SYSTEM-ON-CHIP - In a method of designing a system-on-chip including a tapless standard cell to which body biasing is applied, a slow corner timing parameter is adjusted to increase a slow corner of an operating speed distribution for the system-on-chip by reflecting forward body biasing, and a fast corner timing parameter is adjusted to decrease a fast corner of the operating speed distribution for the system-on-chip by reflecting reverse body biasing. The system-on-chip including the tapless standard cell is implemented based on the adjusted slow corner timing parameter corresponding to the increased slow corner and the adjusted fast corner timing parameter corresponding to the decreased fast corner. The slow corner timing parameter corresponds to a lowest value of an operating speed design window of the system-on-chip, and, the fast corner timing parameter corresponds to a highest value of the operating speed design window of the system-on-chip. | 07-18-2013 |
Patent application number | Description | Published |
20090066646 | Pointing apparatus, pointer control apparatus, pointing method, and pointer control method - Provided is a pointing apparatus, a pointer control apparatus, a pointing method, and a pointer control method to a pointing apparatus, a pointer control apparatus, a pointing method, and a pointer control method capable of recognizing image codes included in an image frame using an image sensor to determine a pointing direction, and continuously updating the gain between the displacement of the motion of the pointing apparatus and the displacement of the motion of a displayed pointer. The pointing apparatus includes an image receiving unit sensing image patterns that exist in a sensed region, among all of the image patterns arranged in a display region; an inertial sensor sensing an input motion using at least one of the acceleration and angular velocity that are generated due to the motion; and a coordinate determining unit determining moving coordinates that are moved from the central coordinates of the sensed image pattern by coordinate displacement corresponding to the sensed motion. | 03-12-2009 |
20090185755 | APPARATUS AND METHOD FOR REMOVING MOIRE PATTERN OF DIGITAL IMAGING DEVICE - An apparatus for and a method of removing a moire pattern of a digital imaging device are provided. It is determined whether or not a moire pattern is created based on an image frequency of a preview image and a spatial frequency of an image sensor, and when it is determined that a moire pattern is generated, an optical path of light incident to an image sensor is slightly changed to remove the moire pattern. Accordingly, image quality deterioration can be improved, and a problem of unnecessary filtering that causes deterioration of resolution even when there is no moire pattern can be enhanced. | 07-23-2009 |
20110133602 | PIEZOELECTRIC MOTOR - Provided is a piezoelectric motor including: a stator which includes first and second faces, wherein a plurality of piezoelectric elements are arranged on the first face, and a plurality of protrusions are formed on the second face; a rotor which is rotated by motions of waves of the stator generated by the piezoelectric elements; and a driver device which applies driving voltages to the piezoelectric elements, wherein polarization directions of the plurality of piezoelectric elements are vertical to a rotary face of the rotor. | 06-09-2011 |
20110210646 | PIEZOELECTRIC MOTOR - A piezoelectric motor includes a piezoelectric element; a stator comprising a first surface and a second surface, wherein the piezoelectric element is disposed on the first surface and a plurality of projections are formed on the second surface; a rotor comprising an operating portion that contacts the plurality of projections and that rotates via waves of the stator generated by the piezoelectric element, wherein a part of each of the plurality of projections that contacts the operating portion comprises a curved contact portion. | 09-01-2011 |
20110221305 | PIEZOELECTRIC MOTOR - A piezoelectric motor including a base member; a stator disposed on the base member and comprising at least one piezoelectric element; a rotor configured to rotate by a wave motion of the stator, the wave motion being generated by the piezoelectric element; a cover member attached to the base member; a bearing arranged between the cover member and the rotor; and an elastic member configured to press the rotor toward the stator. | 09-15-2011 |
20110221917 | APPARATUS FOR PROCESSING IMAGE - An apparatus for processing an image, including: a body; a lens module disposed on the body; and a control ring disposed on the lens module, wherein the control ring is configured to change a setting value of a setting item. | 09-15-2011 |
20120121246 | OPTICAL PATH ADJUSTING DEVICE AND PHOTOGRAPHING APPARATUS HAVING THE SAME - An optical path adjusting device includes a supporting plate having a hole through which light travels, a two-dimensional (2D) aperture disposed in the supporting plate so as to adjust an open area of the hole, and a three-dimensional (3D) aperture having a plurality of first blinds and a plurality of second blinds. The plurality of first blinds are disposed to correspond to a first area of the hole so as to move to open or close the first area, and the plurality of second blinds are disposed to correspond to a second area of the hole so as to move to open or close the second area. | 05-17-2012 |
20130127294 | POWER TRANSMITTING MECHANISM ASSEMBLY - A power transmitting mechanism assembly including a supporting plate; a first roller, which is rotatably attached to the supporting plate; a first plate, which contacts a first end of the first roller and is arranged to be able to rotate with respect to the supporting plate; a power generating unit, which generates power for rotating the first plate when a signal is applied; a second plate, which is arranged to contact a second end of the first roller; and a friction changing unit, which is attached to at least one of the first roller, the first plate, and the second plate and changes friction of a portion of a contacting surface between the first roller and the first plate or friction of a portion of a contacting surface between the first roller and the second plate. | 05-23-2013 |
20140168495 | APPARATUS FOR PROCESSING AN IMAGE HAVING DETACHABLE LENS AND A RING FOR SETTING PHOTOGRAPHING PARAMETER VALUES - An apparatus for processing an image, including: a body; a lens module disposed on the body; and a control ring disposed on the lens module, wherein the control ring is configured to change a setting value of a setting item. | 06-19-2014 |
Patent application number | Description | Published |
20110051254 | LIQUID LENS - A variable-focus liquid lens is provided. The liquid lens includes a membrane and a fluid. The membrane is made of a transparent elastomer, and the fluid fills a predetermined space to contact at least a lens surface of the membrane. The membrane and the fluid are respectively made of materials repulsive to each other, for example, hydrophilic and hydrophobic materials or oleophilic and oleophobic materials. Accordingly, a repulsive force between the fluid and the membrane can prevent the absorption or leaking of the fluid into/through the membrane. | 03-03-2011 |
20110051255 | FLUIDIC LENS AND METHOD OF MANUFACTURING THE SAME - A fluidic lens and method for manufacturing the same are provided. The fluidic lens includes a transparent optical fluid and a double elastomer membrane. An outer membrane of the double elastomer membrane that is externally exposed includes a Poly DiMethyl Siloxane (PDMS) elastomer, and an inner membrane of the double elastmoer membrane that makes contact with the optical fluid is transparent and includes an elastomer which has a low coherence with respect to the optical fluid. | 03-03-2011 |
20110116171 | ELECTROACTIVE POLYMER ACTUATOR AND METHOD OF MANUFACTURING THE SAME - A multilayer electroactive polymer actuator and a method of manufacturing the same. The multilayer electroactive polymer actuator is divided into an actuating area and a non-actuating area. A plurality of driving electrodes, each formed on a side of the respective polymer layer to correspond to the actuating area. A plurality of extension electrodes connected to the driving electrodes and a common electrode for vertically connecting the extension electrodes are formed to correspond to the non-actuating area. A via hole is formed through the plurality of non-actuating layers and has a diameter which increases in a stepwise manner upwards. The common electrode is formed in the via hole. The driving electrode includes an alloy of aluminum and copper. The extension electrode is formed of material having a small reactivity with respect to laser as compared to the reactivity of the polymer layer. | 05-19-2011 |
20120081795 | FLUIDIC LENS - A vari-focal fluidic lens is provided. The fluidic lens includes a frame, an first membrane, a second membrane, and an optical fluid. The frame defines an inner space of the fluidic lens including a driving portion and a lens portion that are connected to each other. The elastic membrane is attached to one side of the frame to cover at least the lens portion. The second membrane is attached to an opposite side of the frame to cover at least the driving portion and is deformable in response to temperature change to vary a volume of the inner space. Optical fluid is contained in the inner space. | 04-05-2012 |
20120086651 | TOUCH PANEL - A touch panel is provided. The touch panel includes an electroactive polymer (EAP) actuator which is deformable when protruded or depressed locally at a part to which a driving voltage is applied; and a flexible touch sensor which is disposed on the EAP actuator. The flexible touch sensor is deformable locally in correspondence with a deformation of the EAP actuator, and senses an input according to a contact or pressing operation. | 04-12-2012 |
20120127724 | OPTICAL PROBE AND OPTICAL SYSTEM THEREFOR - An optical probe and an optical system therefor are provided. The optical probe is includes a housing configured to house the optical system and the housing has a transparent window therein. the optical system includes a light emitting unit, a collimation lens, and a focusing lens. A numerical aperture of the optical system is adjustable by adjusting a pupil diameter of the collimation lens and a focal length of the focusing lens. The pupil diameter of the collimation lens is adjustable based on a variable focal lens or by adjusting a distance between the collimation lens and the light emitting unit. | 05-24-2012 |
20120139393 | ELECTROACTIVE POLYMER ACTUATOR AND METHOD OF MANUFACTURING THE SAME - A multilayered electroactive polymer (EAP) device and a method of manufacturing the same is provided. The multilayered EAP device includes a plurality of unit layers. Each unit layer includes an EAP layer formed of an electroactive polymer (EAP), a protecting layer configured to prevent a material from penetrating into the EAP layer, and an active electrode formed using a conductive material. The protecting layer may be formed below the active layer or above the active layer. The active electrode may be interposed between two protecting layers. | 06-07-2012 |
20120147478 | VARIFOCAL LENS STRUCTURE, METHOD OF MANUFACTURING THE VARIFOCAL LENS STRUCTURE, OPTICAL LENS MODULE INCLUDING THE VARIFOCAL LENS STRUCTURE, AND METHOD OF MANUFACTURING THE OPTICAL LENS MODULE - A varifocal lens structure, a method of manufacturing the varifocal lens structure, an optical lens module, and a method of manufacturing the optical lens module. The varifocal lens structure includes a liquid lens unit including a silicone membrane that includes a first silicone elastomer, a polymer actuator disposed on an upper surface of the silicone membrane, and an adhesive silicone layer that is disposed between the silicone membrane and the polymer actuator and includes a second silicone elastomer. | 06-14-2012 |
20120200200 | METHOD OF MANUFACTURING POLYMER ELECTRODE AND POLYMER ACTUATOR EMPLOYING THE POLYMER ELECTRODE - A method of manufacturing a polymer electrode and a polymer actuator employing the polymer electrode, the method including: adhering a shadow mask onto a substrate, forming a hydrophilic electrode pattern on the substrate, coating the hydrophilic electrode pattern of the substrate with a conductive polymer water solution, removing the shadow mask, and drying the conductive polymer water solution, thus forming the polymer electrode. The method may be applied to electrodes disposed on both surfaces of a polymer deformation layer of a polymer actuator. | 08-09-2012 |
20130117980 | ELECTROACTIVE POLYMER ACTUATOR AND METHOD OF MANUFACTURING THE SAME - A multilayer electroactive polymer actuator and a method of manufacturing the same. The multilayer electroactive polymer actuator is divided into an actuating area and a non-actuating area. A plurality of driving electrodes, each formed on a side of the respective polymer layer to correspond to the actuating area. A plurality of extension electrodes connected to the driving electrodes and a common electrode for vertically connecting the extension electrodes are formed to correspond to the non-actuating area. A via hole is formed through the plurality of non-actuating layers and has a diameter which increases in a stepwise manner upwards. The common electrode is formed in the via hole. The driving electrode includes an alloy of aluminum and copper. The extension electrode is formed of material having a small reactivity with respect to laser as compared to the reactivity of the polymer layer. | 05-16-2013 |
Patent application number | Description | Published |
20110089421 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A thin film transistor array panel includes: a substrate; a signal line disposed on the substrate and including copper (Cu); a passivation layer disposed on the signal line and having a contact hole exposing a portion of the signal line; and a conductive layer disposed on the passivation layer and connected to the portion of the signal line through the contact hole, wherein the passivation layer includes an organic passivation layer including an organic insulator that does not include sulfur, and a method of manufacturing the thin film transistor prevents formation of foreign particles on the signal line. | 04-21-2011 |
20110133193 | THIN FILM TRANSISTOR SUBSTRATE AND THE METHOD THEREOF - A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape. | 06-09-2011 |
20120028421 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL - A method for manufacturing a thin film transistor array panel includes forming a gate line; forming an insulating layer on the gate line; forming first and second silicon layers first and second metal layers; forming a photoresist pattern having first and second portions; forming first and second metal patterns by etching the first and second metal layers; processing the first metal pattern with SF | 02-02-2012 |
20120064678 | MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY PANEL - A method for manufacturing a TFT array panel includes forming a photosensitive film pattern with first and second parts in first and second sections on a metal layer, etching the metal layer of a third section using the film pattern as a mask to form first and second metal patterns, etching the film pattern to remove the first part, etching first and second amorphous silicon layers of the third section using the second part as a mask to form an amorphous silicon pattern and a semiconductor, etching the first and second metal patterns of the first section using the second part as a mask to form a source electrode and a drain electrode including an upper layer and a lower layer, and etching the amorphous silicon pattern of the region corresponding to the first section by using the second part as a mask to form an ohmic contact. | 03-15-2012 |
20120208310 | NON-HALOGENATED ETCHANT AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE USING THE NON-HALOGENATED ETCHANT - Exemplary embodiments of the present invention disclose a non-halogenated etchant for etching an indium oxide layer and a method of manufacturing a display substrate using the non-halogenated etchant, the non-halogenated etchant including nitric acid, sulfuric acid, a corrosion inhibitor including ammonium, a cyclic amine-based compound, and water. | 08-16-2012 |
20120252148 | ECHTANT AND METHOD FOR MANUFACTURING DISPLAY DEVICE USING THE SAME - An etchant according to exemplary embodiments of the present invention includes about 0.5 wt % to about 20 wt % of persulfate, about 0.01 wt % to about 2 wt % of a fluorine compound, about 1 wt % to about 10 wt % of inorganic acid, about 0.5 wt % to about 5 wt % of a cyclic amine compound, about 0.1 wt % to about 5 wt % of a chlorine compound, about 0.05 wt % to about 3 wt % of copper salt, about 0.1 wt % to about 10 wt % of organic acid or organic acid salt, and water. | 10-04-2012 |
20120322187 | ETCHANTS AND METHODS OF FABRICATING METAL WIRING AND THIN FILM TRANSISTOR SUBSTRATE USING THE SAME - An etchant includes: a persulfate; a fluoride; an inorganic acid; a cyclic amine; a sulfonic acid; and one of an organic acid and a salt thereof. | 12-20-2012 |
20130017636 | COMPOSITION FOR REMOVING A PHOTORESIST AND METHOD OF MANUFACTURING A THIN-FILM TRANSISTOR SUBSTRATE USING THE COMPOSITIONAANM KIM; Bong-KyunAACI Hwaseong-siAACO KRAAGP KIM; Bong-Kyun Hwaseong-si KRAANM CHOI; Shin-IlAACI Hwaseong-siAACO KRAAGP CHOI; Shin-Il Hwaseong-si KRAANM PARK; Hong-SickAACI Suwon-siAACO KRAAGP PARK; Hong-Sick Suwon-si KRAANM LEE; Wang-WooAACI Suwon-siAACO KRAAGP LEE; Wang-Woo Suwon-si KRAANM JANG; Seok-JunAACI Asan-siAACO KRAAGP JANG; Seok-Jun Asan-si KRAANM KIM; Byung-UkAACI Hwaseong-siAACO KRAAGP KIM; Byung-Uk Hwaseong-si KRAANM PARK; Sun-JooAACI Pyeongtaek-siAACO KRAAGP PARK; Sun-Joo Pyeongtaek-si KRAANM YOON; Suk-IlAACI Suwon-siAACO KRAAGP YOON; Suk-Il Suwon-si KRAANM JEONG; Jong-HyunAACI SeoulAACO KRAAGP JEONG; Jong-Hyun Seoul KRAANM HUR; Soon-BeomAACI Anyang-siAACO KRAAGP HUR; Soon-Beom Anyang-si KR - A composition for removing a photoresist, the composition including about 1% by weight to about 10% by weight of tetramethyl ammonium hydroxide (“TMAH”), about 1% by weight to about 10% by weight of an alkanol amine, about 50% by weight to about 70% by weight of a glycol ether compound, about 0.01% by weight to about 1% by weight of a triazole compound, about 20% by weight to about 40% by weight of a polar solvent, and water, each based on a total weight of the composition. | 01-17-2013 |
20130088667 | LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - A manufacturing method of a liquid crystal display includes: forming an etch target layer including a conductive material on a first substrate; forming a first mask layer on the etch target layer; forming a block copolymer coating layer including a plurality of polymers on the first mask layer; processing the block copolymer coating layer to form a block copolymer pattern layer including first and second polymer blocks; removing one of the first or second polymer blocks to form a second mask pattern layer; etching the first mask layer by using the second mask pattern layer as an etching mask to form a first mask pattern layer; and etching the etch target layer by using the first mask pattern layer as an etching mask to form a first electrode. The first electrode includes a plurality of the first minute patterns extending in a predetermined direction and having a polarization function. | 04-11-2013 |
20130115733 | ETCHANT COMPOSITION AND METHOD FOR MANUFACTURING THIN FILM TRANSISTOR USING THE SAME - Provided is an etchant composition. The etchant composition according to an exemplary embodiment of the present invention includes ammonium persulfate ((NH | 05-09-2013 |
20130178010 | METHOD OF FORMING A METAL PATTERN AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE - A method of forming a metal pattern is provided. In the method, a first titanium layer, a copper layer and a second titanium layer are sequentially formed on a substrate. A photo pattern is formed on the second titanium layer. The first titanium layer, the copper layer and the second titanium layer are patterned using the photo pattern to form a first titanium pattern, a copper pattern formed on the first titanium pattern and a second titanium pattern formed on the copper pattern. Therefore, a fine metal pattern may be formed. | 07-11-2013 |
20130183822 | THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING TRENCH, METAL WIRE, AND THIN FILM TRANSISTOR ARRAY PANEL - The present invention relates to a method for forming a trench that can remove residual particles in a trench using a metal mask, a method for forming a metal wire, and a method for manufacturing a thin film transistor array panel. The method for forming a trench includes: forming a first insulating layer on a substrate; forming a first metal layer on the first insulating layer; forming an opening by patterning the first metal layer; forming a trench by dry-etching the first insulating layer using the patterned first metal layer as a mask; and wet-etching the substrate. The dry-etching is performed using a main etching gas and a first auxiliary etching gas, and the first auxiliary etching gas includes argon. | 07-18-2013 |
20130252384 | TRENCH FORMING METHOD, METAL WIRING FORMING METHOD, AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL - A method of forming a thin film transistor array panel includes: forming a first insulating layer on a substrate; forming an amorphous carbon layer on the first insulating layer; forming a second insulating layer on the amorphous carbon layer; forming an opening in the amorphous carbon layer by patterning the second insulating layer and the amorphous carbon layer; and forming a trench in the first insulating layer by etching the first insulating layer, the etching the first insulating layer using the amorphous carbon layer including the opening as a mask. | 09-26-2013 |
20130277666 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL, AND METHOD OF MANUFACTURING A THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor array panel according to an exemplary embodiment of the invention includes: a substrate; a gate line positioned on the substrate and including a gate electrode; a gate insulating layer positioned on the gate line; an oxide semiconductor layer positioned on the substrate; a source electrode and a drain electrode positioned on the oxide semiconductor layer; a first insulating layer positioned on the source electrode and the drain electrode and including a first contact hole; a data line positioned on the first insulating layer and intersecting the gate line; and a pixel electrode over the first insulating layer. The source electrode and the drain electrode each comprise a metal oxide. The data line is electrically connected to the source electrode through the first contact hole. | 10-24-2013 |
20140139795 | LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - A liquid crystal display is provided. The liquid crystal display includes a substrate, a thin film transistor disposed on the substrate, a pixel electrode connected with a terminal of the thin film transistor, a microcavity disposed on the pixel electrode, the microcavity including a liquid crystal injection hole disposed at an edge of the microcavity, a supporting member disposed on the microcavity, a first hydrophobic layer disposed on an edge portion of the supporting member, and a capping layer disposed on the supporting member with the capping layer covering the liquid crystal injection hole. | 05-22-2014 |
20140159059 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a display substrate includes forming a gate insulation layer on the base substrate on which a gate metal pattern, forming a data metal pattern on the gate insulation layer, sequentially forming a insulation layer and an organic layer on the base substrate on which the data metal pattern is formed, partially exposing the organic layer, developing the organic layer to partially remove the organic layer on the data metal pattern and to expose at least a portion of the protecting layer on the gate metal pattern, forming a common electrode on the organic layer, forming a pixel electrode on the on the organic layer, and forming an insulation layer between the pixel electrode and the common electrode. An etching degree of a data metal may be controlled by controlling a thickness of a remained organic layer to reduce a damage of the data metal. | 06-12-2014 |
20140175424 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME - A thin film transistor array panel includes: a substrate, a gate line positioned on the substrate and including a gate electrode, a semiconductor layer positioned on the substrate and including an oxide semiconductor, a data wire layer positioned on the substrate and including a data line crossing the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode, and a capping layer covering the data wire layer, in which an end of the capping layer is inwardly recessed as compared to an end of the data wire layer. | 06-26-2014 |
20140183535 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME - A thin film transistor array panel according to an exemplary embodiment of the invention includes: a substrate, a gate line disposed on the substrate and including a gate electrode, a gate insulating layer disposed on the gate line, a semiconductor disposed on the gate insulating layer, a data line disposed on the semiconductor and including a source electrode, a drain electrode disposed on the semiconductor and opposite to the source electrode, a color filter disposed on the gate insulating layer, the data line and the drain electrode, an overcoat disposed on the color filter and including an inorganic material, a contact hole defined in the color filter and the overcoat, where the contact hole exposes the drain electrode, and a pixel electrode disposed on the overcoat and connected through the contact hole to the drain electrode, in which a plane shape of the contact hole in the overcoat and a plane shape of the contact hole in the color filter are substantially the same as each other. | 07-03-2014 |
20140204315 | DISPLAY APPARATUS - A display apparatus includes a backlight assembly which generates a light and a display panel which receives the light to display an image, the display panel including a first substrate, a second substrate which faces the first substrate and is disposed closer to the backlight assembly than the first substrate, a gate line disposed on the first substrate, a data line disposed on the gate line and insulated from the gate line, a thin film transistor disposed on the first substrate and electrically connected to the gate line and the data line, and a reflection preventing layer disposed between the first substrate and the gate line to reduce an amount of a reflected light reflected by the gate line. | 07-24-2014 |
20150041814 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a switching element disposed in a display region that is electrically connected to a gate line, a data line, and a first electrode in a peripheral region adjacent to the display region that includes a first conductive pattern formed from a first conductive layer that includes a same material as the gate line, a first line connecting part disposed in the peripheral region that includes the first conductive pattern, a second conductive pattern that overlaps the first conductive pattern and formed, an organic layer that partially exposes the second conductive pattern, and a third conductive pattern electrically connected to the second conductive pattern that contacts the partially exposed second conductive pattern, and a fourth conductive pattern that electrically connects the first conductive pattern of the pad part and the third conductive pattern of the first line connecting part. | 02-12-2015 |
20150053984 | THIN FILM TRANSISTOR SUBSTRATE AND THE METHOD THEREOF - A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape. | 02-26-2015 |
20150053989 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE - A display substrate includes a base substrate, a common line on the base substrate, a first insulation layer covering the common line and having a first insulating material, a conductive pattern on the first insulation layer and including a source electrode and a drain electrode, a second insulation layer covering the drain electrode and the common line, and including a lower second insulation layer having a second insulating material and an upper second insulation layer having the first insulating material, a first electrode electrically connected to the drain electrode through a first contact hole in the second insulation layer, and a second electrode electrically connected to the common line through a second contact hole in the first and second insulation layers. The upper and lower second insulation layers on the drain electrode have a first hole and a second hole respectively that form the first contact hole. | 02-26-2015 |
Patent application number | Description | Published |
20090096552 | OVERLAY ELECTROMAGNETIC BANDGAP (EBG) STRUCTURE AND METHOD OF MANUFACTURING THE SAME - Provided is an electromagnetic bandgap (EBG) structure, and particularly, an overlay EBG structure in which a plurality of vias and a plurality of plates are formed at intervals on a central signal line in such a manner that the vias and plates extend vertically from a substrate in order to reduce leakage loss of an electromagnetic wave through the substrate. Therefore, it is possible to prevent an electromagnetic wave passing through a transmission line from being lost through the substrate, to obtain desired frequency characteristics by adjusting the dimensions of the vias and plates, and to manufacture the overlay EBG structure using an existing CMOS process without having to perform any additional process. | 04-16-2009 |
20090121811 | MULTILAYERED COPLANAR WAVEGUIDE FILTER UNIT AND METHOD OF MANUFACTURING THE SAME - A multilayered coplanar waveguide (CPW) filter unit and a method of manufacturing the same are provided. A plate having a capacitance element is formed on or below a CPW layer including a signal line for transmitting a signal and a ground plane. As the filter unit has a multilayered structure, characteristic impedance may be reduced without increasing the width of the signal line. Where an inductor line is inserted between the signal line and the plate, a clear frequency response curve may be obtained without performing an additional process or increasing the area of the filter unit. | 05-14-2009 |
20090140823 | BROADBAND MICROSTRIP BALUN AND METHOD OF MANUFACTURING THE SAME - A broadband microstrip balun and a method of manufacturing the same are provided. In the balun, transmission lines formed at different layers partially overlap in parallel with each other, and a common ground having a predetermined opening is inserted between the transmission lines. Thus, an unbalanced signal may be converted into a balanced signal in a broad frequency band using resonance of a common ground plate with the opening and a Bethe hall effect. Also, impedance matching is readily enabled, thereby reducing a parasitic element. | 06-04-2009 |
20090207077 | SWITCHED BEAM-FORMING APPARATUS AND METHOD USING MULTI-BEAM COMBINING SCHEME - Provided is a switched beam-forming apparatus which includes a beam-forming unit forming a plurality of beams using an array antenna, a beam selection adjusting unit measuring Quality of Service (QoS) values of each of a plurality of signals received through the plurality of beams, a beam selecting unit selecting at least two beams with high QoS from among the plurality of beams according to the results of the QoS measuring, and a beam combining unit combining the at least two beams selected by the beam selecting unit. | 08-20-2009 |
20090212885 | RESONATOR AND BANDPASS FILTER HAVING OVERLAY ELECTROMAGNETIC BANDGAP (EBG) STRUCTURE, AND METHOD OF MANUFACTURING THE RESONATOR - Provided is an Electromagnetic Bandgap (EBG) structure, particularly, a resonator and a bandpass filter having an overlay EBG structure, and a method of manufacturing the resonator. The resonator is manufactured by forming a transmission line and ground plates on a substrate, arranging a plurality of reflector units at regular intervals along the longitudinal direction of the transmission line, and removing at least one reflector among the plurality of reflectors, thus forming a common resonating mode. Therefore, since reflector units constructing capacitance components are separated from a substrate, it is possible to prevent electromagnetic waves from leaking out of the substrate and ensure a high Q characteristic in a high frequency environment due to a resonating unit formed between the reflector units. | 08-27-2009 |
20090270051 | BEAMFORMER AND BEAMFORMING METHOD - Disclosed are a beamformer and a beamforming method. The beamformer includes a plurality of dividers, each of which divides an input signal along a plurality of paths, an input switch which selects one of the dividers such that the input signal is input to the selected divider, a phase shifter which shifts phases of respective output signals from the divider, and an output switch which transmits the output signals from the phase shifter to an antenna. | 10-29-2009 |
20100244997 | WAVEGUIDE OF MULTI-LAYER METAL STRUCTURE AND MANUFACTURING METHOD THEREOF - A waveguide of a multi-layer metal structure and a manufacturing method thereof are provided, the method including applying a plurality of metal layers on a substrate and a plurality of insulating layers respectively between the respective metal layers. Accordingly, it is possible to minimize conductive loss by dispersing current uniformly through wide regions between a signal line and ground lines. | 09-30-2010 |
20130194754 | TRANSMISSION LINE TRANSITION HAVING VERTICAL STRUCTURE AND SINGLE CHIP PACKAGE USING LAND GRIP ARRAY COUPLING - An apparatus for a single chip package using Land Grid Array (LGA) coupling is provided. The apparatus includes a multi-layer substrate, at least one integrated circuit chip, and a Printed Circuit Board (PCB). The a multi-layer substrate has at least one substrate layer, has at least one first chip region and at least one second chip region in a lowermost substrate layer, configures a transmission line transition of a vertical structure for transmitting a signal from at least one integrated circuit chip coupled in the first chip region in a coaxial shape or in a form of a Co-Planar Waveguide guide (CPW), and has an LGP coupling pad for connecting with a Printed Circuit Board (PCB) in the lowermost layer. The at least one integrated circuit chip is coupled in the first chip region and the second chip region. The PCB is connected with the multi-layer substrate using the LGA coupling via the LGA coupling pad. | 08-01-2013 |
Patent application number | Description | Published |
20090154190 | APPARATUS FOR AIMING LED HEADLAMP - Disclosed herein is an LED (light emitting diode) headlamp aiming apparatus, which aims a mounting module that is provided with LEDs and is installed in a headlamp housing. The LED headlamp aiming apparatus includes a vertical aiming unit, which is provided on the rear side of the mounting module and is coupled to the headlamp housing, a horizontal aiming unit, which is provided on the rear side of the mounting module and is coupled to the headlamp housing, and a pivot unit which is coupled to the headlamp housing and is provided under the lower portion of the mounting module to support the mounting module and provide the center of the aiming operation. | 06-18-2009 |
20110121733 | ADAPTIVE FRONT LIGHTING SYSTEM AND CONTROL METHOD OF THE SAME - Provided is an Adaptive Front Lighting System and a control method thereof, which includes a motor driver which controls a beam irradiation direction of a headlamp by operating a motor coupled to the headlamp according to a motor control signal, and generates a motor fault signal when fail occurs in the motor, a power supply unit which controls a magnitude of electric power supplied to the headlamp according to a power control signal, and a controller which selectively outputs the power control signal to the power supply unit according to the motor fault signal of the motor driver. | 05-26-2011 |
20110125373 | ADAPTIVE FRONT LIGHTING SYSTEM FOR PERFORMING HIGHWAY AND URBAN DISTRICT MODES OF FRONT LIGHTING - An adaptive front lighting system for performing highway and urban district modes of front lights is provided, which includes a leveling actuator rotating a light source of front lights of a vehicle in upward and downward directions, and a control unit judging a driving state of the vehicle as either of a highway driving state and an urban district driving state in accordance with a driving condition of the vehicle and determining a degree of rotation of the light source performed by the leveling actuator in accordance with a result of judgment. The driving condition includes at least one of a vehicle speed, external illumination, and frequency of vehicle stops. | 05-26-2011 |
20110128748 | METHOD OF CONTROLLING ADAPTIVE HEADLAMP - A method of controlling an adaptive head lamp including a control unit for detecting a driving signal of a vehicle to control an actuator which controls the head lamp in a horizontal or vertical direction in accordance with a control signal of the control unit, may include steps of, a) verifying whether an ignition of the vehicle is turned on or off, b) after the ignition of the vehicle is verified, driving the actuator to move the head lamp to a rightmost or leftmost position in the horizontal direction, or a lowermost or uppermost position in the vertical direction, c) driving the actuator by a predetermined number of pulses previously set in a micro stepping manner in a direction opposite to a driving direction of the headlamp at the step b), and d) setting a position of the head lamp determined at the step c) as an initial position. | 06-02-2011 |
20110133647 | METHOD AND APPARATUS FOR PROVIDING HIGH BEAM IN LED HEADLAMP - A method for selectively providing a low beam state and a high beam state of an LED headlamp, may include driving an engine of a vehicle, switching on a multi-function switch to turn on at least a second LED module to emit a high beam after driving the engine to perform the high beam state of the LED headlamp, and converting a low beam state of at least a first LED module into a high beam state to perform the high beam state of the LED headlamp. | 06-09-2011 |
Patent application number | Description | Published |
20080229090 | Memory Card, Memory System Including the Same, and Operating Method thereof - Provided is a memory card device. The memory card device includes a flash memory and a controller. The flash memory includes a boot area storing boot data, and a user area storing user data. The controller accesses the boot area or the user area according to an external command. Boot data can be stored in a memory card integrated in an electronic device. Also, when a host requests an access to boot data/user data stored in the memory card, the boot data/user data can be accessed under control of the controller. | 09-18-2008 |
20090044077 | FLASH MEMORY SYSTEM HAVING ENCRYPTED ERROR CORRECTION CODE AND ENCRYPTION METHOD FOR FLASH MEMORY SYSTEM - A flash memory system includes a flash memory for storing input data, and a memory controller controlling the flash memory, wherein the memory controller generates a first error correction code corresponding to the input data, and encrypts the first error correction code, and the flash memory includes a main area for storing the input data and a spare area for storing the encrypted first error correction code. | 02-12-2009 |
20110107076 | SYSTEM COMPRISING ELECTRONIC DEVICE AND EXTERNAL DEVICE STORING BOOT CODE FOR BOOTING SYSTEM - An electronic information system comprises an external storage device and an application processor. The external storage device stores boot code and the application processor is adapted to receive the boot code from the external storage device and to perform a system booting operation during a power-up operation by executing the boot code. | 05-05-2011 |
20110153921 | System Embedding Plural Controller Sharing Nonvolatile Memory - An embedded memory card system includes a first CPU, a second CPU, a nonvolatile memory storing data, and a device busy state machine selecting one of the first CPU and the second CPU to access the nonvolatile memory. The nonvolatile memory is accessed by the one of the first CPU and the second CPU selected by the device busy state machine. | 06-23-2011 |
20110219180 | FLASH MEMORY DEVICE WITH MULTI-LEVEL CELLS AND METHOD OF WRITING DATA THEREIN - In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data. | 09-08-2011 |
20120159054 | FLASH MEMORY DEVICE WITH MULTI-LEVEL CELLS AND METHOD OF WRITING DATA THEREIN - In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data. | 06-21-2012 |
20130173857 | FLASH MEMORY DEVICE WITH MULTI-LEVEL CELLS AND METHOD OF WRITING DATA THEREIN - In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data. | 07-04-2013 |
20140379970 | FLASH MEMORY DEVICE WITH MULTI-LEVEL CELLS AND METHOD OF WRITING DATA THEREIN - In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data. | 12-25-2014 |
Patent application number | Description | Published |
20100103121 | TOUCH SCREEN PANEL INTEGRATED INTO LIQUID CRYSTAL DISPLAY, METHOD OF MANUFACTURING THE SAME, AND TOUCH SENSING METHOD - A touch screen panel includes: a first substrate and a second substrate, which face each other with respect to a liquid crystal interposed therebetween; and a touch sensor interposed between the first substrate and the second substrate. The touch sensor includes: a plurality of first touch signal lines disposed on the first substrate and extending in a first direction; a protective layer disposed on the first substrate, the protective layer including a dielectric material and substantially the plurality of first touch signal lines; a plurality of contact pads disposed on the protective layer; a plurality of second touch signal lines disposed on the second substrate and extending in a second direction perpendicular to the first direction; and a plurality of touch sensor spacers electrically connected to the plurality of second touch signal lines. A gap between the touch sensor spacers and the plurality of contact pads is defined, and the spacers are disposed to face the plurality of contact pads. | 04-29-2010 |
20100178464 | METHOD FOR CHEMICAL MODIFICATION OF A GRAPHENE EDGE, GRAPHENE WITH A CHEMICALLY MODIFIED EDGE AND DEVICES INCLUDING THE GRAPHENE - A method for chemical modification of graphene includes dry etching graphene to provide an etched graphene; and introducing a functional group at an edge of the etched graphene. Also disclosed is graphene, including an etched edge portion, the etched portion including a functional group. | 07-15-2010 |
20110033677 | GRAPHENE BASE AND METHOD OF PREPARING THE SAME - A graphene base, including: graphene; and a substrate, wherein the graphene is formed directly on at least one surface of the substrate, and at least about 90 percent of an area of the surface of the substrate does not have a graphene wrinkle. | 02-10-2011 |
20110095268 | TRANSISTOR AND FLAT PANEL DISPLAY INCLUDING THIN FILM TRANSISTOR - A transistor includes at least three terminals comprising a gate electrode, a source electrode and a drain electrode, an insulating layer disposed on a substrate, and a semiconductor layer disposed on the substrate, wherein a current which flows between the source electrode and the drain electrode is controlled by application of a voltage to the gate electrode, where the semiconductor layer includes a graphene layer and at least one of a metal atomic layer and a metal ion layer, and where the metal atomic layer or the metal ion layer is interposed between the graphene layer and the insulating layer. | 04-28-2011 |
20110104442 | GRAPHENE SHEET, GRAPHENE BASE INCLUDING THE SAME, AND METHOD OF PREPARING THE GRAPHENE SHEET - A graphene sheet including graphene comprising ten or fewer wrinkles per 1,000 square micrometers of the graphene. | 05-05-2011 |
20110111577 | SEMICONDUCTOR CARBON NANOTUBES AND METHOD OF SELECTIVELY GROWING SEMICONDUCTOR CARBON NANOTUBES USING LIGHT IRRADIATION - A method of selectively growing a plurality of semiconductor carbon nanotubes using light irradiation. The method includes disposing a plurality of nanodots, which include a catalyst material, on a substrate; growing a plurality of carbon nanotubes from the plurality of nanodots, and irradiating light onto the nanodot to selectively grow the plurality of semiconductor carbon nanotubes. | 05-12-2011 |
20110127471 | DOPED GRAPHENE, METHOD OF MANUFACTURING THE DOPED GRAPHENE, AND A DEVICE INCLUDING THE DOPED GRAPHENE - A composition including graphene; and a dopant selected from the group consisting of an organic dopant, an inorganic dopant, and a combination including at least one of the foregoing. | 06-02-2011 |
20110127497 | ORGANIC LIGHT EMITTING DEVICE USING GRAPHENE - An organic light emitting device including graphene. The organic light emitting device includes a first electrode that is interposed between a transparent substrate and an organic layer emitting light, and includes graphene having a thickness of about 0.1 nanometer (nm) to about 10 nanometers (nm). | 06-02-2011 |
20110129675 | MATERIAL INCLUDING GRAPHENE AND AN INORGANIC MATERIAL AND METHOD OF MANUFACTURING THE MATERIAL - A material including: graphene; and an inorganic material having a crystal system, wherein a crystal plane of the inorganic material is oriented parallel to the (0001) plane of the graphene. The crystal plane of the inorganic material has an atomic arrangement of a hexagon, a tetragon, or a pentagon. | 06-02-2011 |
20110285951 | CNT COMPOSITION, CNT LAYER STRUCTURE, LIQUID CRYSTAL DISPLAY DEVICE, METHOD OF PREPARING CNT LAYER STRUCTURE, AND METHOD OF PREPARING LIQUID CRYSTAL DISPLAY DEVICE - A carbon nanotube (“CNT”) composition includes CNTs, a dispersing agent containing a reactive functional group, and at least one kind of dispersion medium. A CNT layer structure includes a substrate and a CNT layer disposed on the substrate, the CNT layer including the CNT composition including the CNTs arranged in a network-shape, and an organic material adsorbed to the CNTs and chemically bonded to the substrate. A liquid crystal display device includes the CNT layer structure. A method of manufacturing the CNT layer structure uses the CNT composition. A method of manufacturing the liquid crystal display device includes forming a pixel electrode on a passivation layer, by using the method of manufacturing the CNT layer structure. | 11-24-2011 |
20120080086 | Transparent Electrode Comprising Doped Graphene, Process of Preparing The Same, And Display Device And Solar Cell Comprising The Electrode - A transparent electrode on at least one surface of a transparent substrate may include graphene doped with a p-dopant. The transparent electrode may be efficiently applied to a variety of display devices or solar cells. | 04-05-2012 |
20120256168 | Semiconductor Devices And Methods Of Manufacturing The Same - According to example embodiments, a semiconductor device includes a first electrode, a second electrode apart from the first electrode, and an active layer between the first and second electrodes. The active layer includes first and second layers, the first layer contacts the first and second electrodes, and the second layer is separated from at least one of the first and second electrodes. | 10-11-2012 |
20120267041 | METHOD OF FORMING MULTI-LAYER GRAPHENE - A method of forming a multi-layer graphene includes forming a stack of a graphitizing metal catalyst layer and graphene by repeatedly performing a cycle of first forming the graphitizing metal catalyst layer on a substrate, and then forming the graphene on the graphitizing metal catalyst layer, and removing the graphitizing metal catalyst layer. | 10-25-2012 |
20130043475 | TRANSISTORS AND ELECTRONIC DEVICES INCLUDING THE TRANSISTORS - A transistor may include a light-blocking layer that blocks light incident on a channel layer. The light-blocking layer may include a carbon-based material. The carbon-based material may include graphene oxide, graphite oxide, graphene or carbon nanotube (CNT). The light-blocking layer may be between a gate and at least one of the channel layer, a source and a drain. | 02-21-2013 |
20130157034 | METHOD FOR CHEMICAL MODIFICATION OF A GRAPHENE EDGE, GRAPHENE WITH A CHEMICALLY MODIFIED EDGE AND DEVICES INCLUDING THE GRAPHENE - A method for chemical modification of graphene includes dry etching graphene to provide an etched graphene; and introducing a functional group at an edge of the etched graphene. Also disclosed is graphene, including an etched edge portion, the etched portion including a functional group. | 06-20-2013 |
20140110670 | DOPED GRAPHENE STRUCTURE COMPRISING HYDROPHOBIC ORGANIC MATERIAL, METHOD FOR PREPARING THE SAME, AND TRANSPARENT ELECTRODE, DISPLAY DEVICE AND SOLAR CELL COMPRISING THE ELECTRODE - A hydrophobic organic layer may be formed on a surface of a graphene doped with a dopant to improve stability of the doped graphene with respect to moisture and temperature. Thus, the transparent electrode having the doped graphene containing the hydrophobic organic layer may be usefully applied in solar cells or display devices. | 04-24-2014 |
20140263166 | GRAPHENE BASE AND METHOD OF PREPARING THE SAME - A graphene base, including: graphene; and a substrate, wherein the graphene is formed directly on at least one surface of the substrate, and at least about 90 percent of an area of the surface of the substrate does not have a graphene wrinkle. | 09-18-2014 |
Patent application number | Description | Published |
20080219230 | Method and system for authentication of WLAN terminal interworking with broadband wireless access network - A method and a system for interworking with a Broadband Wireless Access (BWA) network in a Wireless Local Area Network (WLAN) terminal. According to the method, a relay station for connecting the Wireless Local Area Network (WLAN) terminal with the Broadband Wireless Access (BWA) network sets a connection with the Broadband Wireless Access (BWA) network through an initialization process. A user authentication with the Wireless Local Area Network (WLAN) terminal is performed by the relay station in compliance with a Wireless Local Area Network (WLAN) protocol. A user authentication with a Broadband Wireless Access (BWA) network Access Control Router (ACR) is performed in compliance with a Broadband Wireless Access (BWA) network protocol by the relay station in place of the Wireless Local Area Network (WLAN) terminal. | 09-11-2008 |
20090028093 | METHOD FOR TRANSMITTING/RECEIVING DATA WITH TRANSFER OBLIGATION DELEGATED IN WSN - A method for transmitting/receiving data with transfer obligation delegated in a Wireless Sensor Network (WSN) reduces the time and power spent by a transmitting apparatus to wait for acknowledgment that a data transfer was successful. The method for transmitting data from a transmitting end to a receiving end through a set transfer route by multiple data transmit/receive apparatuses provided in a Wireless Sensor Network (WSN), typically includes the steps of: performing temporary storage of data to be transmitted on receiving a request to transmit data; requesting a data transmit/receive apparatus, existing on a next route, to transmit data while transmitting data to a data transmit/receive apparatus which is set as a transfer route; and confirming the delivery of the data to the data transmit/receive apparatus set as the transfer route, and then deleting the temporarily stored data frame. | 01-29-2009 |
20090029650 | METHOD AND APPARATUS FOR TRANSMITTING/RECEIVING DATA IN WIRELESS SENSOR NETWORK - A method and apparatus for transmitting/receiving data in a Wireless Sensor Network (WSN). The method typically includes the steps of: ascertaining characteristics of data whose transfer is requested; ascertaining a Link Quality Indication Value (LQIV); determining a level of a link state in consideration of the characteristics of the data and the LQIV; and controlling the link transfer of the data in consideration of the level of the link state. The apparatus includes a module for transmitting/receiving data in the network layer thereof having a link level determination unit for predefining a level of a link state, depending on characteristics of data and a Link Quality Indication Value (LQIV) to store a predefined level of the link state, and to determine a level of the link state. A link control unit controls the link transfer of the data in consideration of the determined level of the link state. | 01-29-2009 |
20090086041 | METHOD AND SYSTEM FOR CONTROLLING CAMERA THROUGH WIRELESS SENSOR NETWORK - A method for controlling a camera through a Multi-Hop-based wireless sensor network includes: sensing whether an event occurs or not in a corresponding area and transmitting position information on the corresponding area and type information on the event, converting the received position information on the event into a movement control signal for the camera, calculating camera driving values in a left/right direction and an up/down direction using the converted signal, controlling a zoom-in operation of the camera lens using the calculated camera driving values according to the received event type and photographing an object located in the corresponding direction, and transmitting the photographed images over the outer network. | 04-02-2009 |
20090133122 | METHOD AND SYSTEM FOR DETECTING SUSPICIOUS FRAME IN WIRELESS SENSOR NETWORK - A method and system for detecting a suspicious frame in a wireless sensor network that includes: a plurality of sensor nodes, for sending sensed data and data regarding an upper-level node and cluster head node. A data collecting node receives data from the sensor nodes, sends information, and extracts data received from the sensor nodes. A first probability of occurrence of the routing path is computed with respect to training frames, and a second probability of occurrence of a source routing path is computed using the first probability. The second probability is compared with a reference value, and displays an indication notifying an abnormality of the source node according to when the second probability and the reference value. | 05-21-2009 |
20100026686 | METHOD, APPARATUS AND SYSTEM FOR DISPLAYING TOPOLOGY INFORMATION OF WIRELESS SENSOR NETWORK - A method, apparatus and system for displaying topology information of a wireless sensor network includes a plurality of sensor nodes. The method typically includes: receiving node information collected and extracted from the sensor nodes; comparing the received node information with stored node information; computing, when the received node information is unequal to the stored node information, visualization information on a sensor node whose information is not present in the stored node information; and displaying the sensor nodes on concentric circles using the visualization information. | 02-04-2010 |
Patent application number | Description | Published |
20090003435 | Method, medium, and apparatus for encoding and/or decoding video data - A method, medium, and apparatus for encoding and/or decoding video by generating a scalable bitstream compatible with at least two video formats generating an enhancement layer identifier, generating a base layer bitstream by encoding a chrominance component of a low-frequency band and a luminance component that are included in video, and generating an enhancement layer bitstream by encoding a chrominance component of the remaining frequency band other than the low-frequency band that is included in the video. | 01-01-2009 |
20090097549 | Method, medium, and apparatus for encoding and/or decoding video - A method, medium, and apparatus for encoding and/or decoding video by generating a scalable bitstream formed with a base layer bitstream and an enhancement layer bitstream in order to provide forward compatibility, the scalable bitstream comprising a base layer bitstream including a base quantized level and a base quantization parameter corresponding to a base bit-depth, and an enhancement layer bitstream including a residue between an extended quantized level and a compensated quantized level that is predicted from the base quantized level, and additional quantization information for refining the difference between an extended bit-depth and the base bit-depth, wherein a process for improving image quality is applied to at least one of the base layer and the enhancement layer. | 04-16-2009 |
20090190843 | Image encoding apparatus and image decoding apparatus - Provided are an image encoding apparatus and an image decoding apparatus. The image encoding apparatus includes a compression unit compressing a reference image by reducing a resolution of the reference image in a resolution adjustment mode determined from among at least two resolution adjustment modes according to a distribution of values of pixels of the reference image, and providing the compressed reference image to a memory, a reconstruction unit reconstructing the reference image by increasing a resolution of the compressed reference image stored in the memory to an original resolution, a predictive encoding unit performing predictive encoding on a current image by using the reconstructed reference image, and a predictive decoding unit generating the reference image by performing decoding on the predictive encoded current image, and providing the generated reference image to the compression unit. | 07-30-2009 |
20090279614 | Apparatus and method for managing reference frame buffer in layered video coding - An apparatus for encoding or decoding an image by storing and managing a reference frame used to encode or decode an encoding target image frame. To encode image frames classified into a plurality of layers, the apparatus may include a layer identification unit identifying a layer that includes a first encoding target frame, a frame storage unit storing at least one storage frame associated with the first encoding target frame, a reference frame selector selecting a reference frame from the at least one storage frame, based on the identified layer, and a frame encoder encoding the first encoding target frame by referring to the selected reference frame, wherein the frame storage unit stores the first encoding target frame as a storage frame associated with a second encoding target frame. | 11-12-2009 |
Patent application number | Description | Published |
20110050863 | DISPLAY APPARATUS AND CONTROL METHOD THEREOF - Provided is a display apparatus and a control method thereof which includes receiving a three-dimensional image signal comprising left eye image data and right eye image data between successive first and second vertical blank sections; generating a third vertical blank section which divides the left eye image data and the right eye image data between the first and second vertical blank sections of the received image signal if the received image signal is determined as a three-dimensional image signal; and displaying an image based on the image signal having the generated third vertical blank section. | 03-03-2011 |
20110115789 | IMAGE DISPLAYING APPARATUS AND IMAGE SIGNAL PROCESSING METHOD OF THE SAME - Disclosed is an image displaying apparatus for displaying a received three-dimensional (3D) image signal as a two-dimensional (2D) image or a 3D image, and a method for performing the same. In the method, the 3D image signal is divided into left and right eye signals. Based on a user's selection, the 3D image signal is either displayed as the 3D image, by alternately displaying the left and right eye signals, or displayed as the 2D image, by consecutively displaying either the left eye signals or the right eye signals. | 05-19-2011 |
20110149052 | 3D IMAGE SYNCHRONIZATION APPARATUS AND 3D IMAGE PROVIDING SYSTEM - A three dimensional (3D) image synchronization apparatus and a 3D image providing system are provided. The 3D image synchronization apparatus synchronizes at least one input 3D image using a single sync signal and outputs the synchronized 3D image. Accordingly, the plurality of display apparatus are synchronized with one another according to a single sync signal. | 06-23-2011 |
20110164118 | DISPLAY APPARATUSES SYNCHRONIZED BY ONE SYNCHRONIZATION SIGNAL - A display system is provided. The display system includes a plurality of display apparatuses synchronized by a synchronization signal to display an input image. Accordingly, the plurality of display apparatuses may synchronize a 3D image to be displayed, and thus a user may watch the 3D image displayed on the plurality of display apparatuses using 3D glasses. | 07-07-2011 |
20130236126 | IMAGE PROCESSING APPARATUS AND METHOD FOR PROCESSING IMAGE THEREOF - An image processing apparatus and image processing method thereof are disclosed. The image processing apparatus includes a first image processor which includes a memory, performs a first signal processing on image data, and stores the first signal processed image data in the memory; a second image processor which directly accesses the memory and receives the stored image data, and performs a second signal processing on the received image data; and an image outputter which outputs the image data on which the second signal processing has been performed. Accordingly, only actual image data area is received, reducing data transmission volume, reducing signal transmission lines, securing CPU resources, and improving timing errors. In addition, it is possible to remove an image transmitter such as an additional low voltage differential signaling (LVDS) block, making the image processing apparatus thinner and smaller. | 09-12-2013 |
20140009501 | DISPLAY APPARATUS AND CONTROL METHOD THEREOF - A display apparatus includes: a display; an image receiver which receives image signals from a plurality of image sources; a main controller which performs a control function to generate a main image which corresponds to any one of the received image signals; and a graphics controller which performs a control function to generate source information related to a connected image source through the image receiver and to display an image which corresponds to the received image signal in the source information. | 01-09-2014 |
20140068332 | ELECTRONIC DEVICE HAVING SELF DIAGNOSIS FUNCTION AND SELF DIAGNOSIS METHOD USING THE SAME - An electronic device which has a self diagnosis function and a self diagnosis method using the same are provided. The electronic device includes: an interface which receives a user's selection signal for a hardware of an object to be diagnosed; and a controller which provides a plurality of lines connected to the hardware of the object to be diagnosed with a signal for diagnosis according to the selection signal which is received through the interface and calculates a diagnosis result for the hardware of diagnosis object according to a comparison result of the signal for diagnosis with a return signal which is returned from the hardware of the object to be diagnosed by a loop-back. | 03-06-2014 |
20140333842 | METHOD FOR SETTING TIME OF DISPLAY APPARATUS, METHOD FOR SETTING TIME OF DISPLAY APPARATUS BY REMOTE CONTROLLER, DISPLAY APPARATUS AND REMOTE CONTROLLER - A method of setting time information of a display apparatus is provided. The method includes: receiving a Turn-on signal from a remote controller; receiving time information from the remote controller in response to a determination that resetting the time information is necessary; and setting time information of the display apparatus based on the received time information. | 11-13-2014 |
Patent application number | Description | Published |
20090284883 | ELECTRONIC DEVICE HAVING ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHODS OF FABRICATING THE SAME - An electronic device having an electrostatic discharge (ESD) protection device and methods of fabricating the same. The electronic device can include an electronic element to be protected from electrostatic discharge. The electronic element can be installed on a substrate. The substrate can include a ground electrode disposed on the substrate, and a first element electrode disposed at a different level from the ground electrode on the substrate to overlap a part of the ground electrode and to electrically connect to the electronic element installed to the substrate. A dielectric layer can be disposed between the ground electrode and the first element electrode, wherein the ground electrode, the first element electrode and the dielectric layer disposed therebetween constitute an electrostatic discharge (ESD) protection device. | 11-19-2009 |
20100006869 | SEMICONDUCTOR CHIP, WIRING SUBSTRATE OF A SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE HAVING THE SEMICONDUCTOR CHIP AND DISPLAY DEVICE HAVING THE SEMICONDUCTOR PACKAGE - A semiconductor chip can include a semiconductor substrate, an input portion and an output portion. A circuit element can be formed in the semiconductor substrate. The input portion can be formed on the semiconductor substrate. The input portion can include a first input pad to receive an input signal from the outside and a second input pad spaced apart from the first input pad, the second input pad being electrically connected to the first input pad through an external connection line such that the second input pad inputs the input signal to the circuit element. The output portion can be formed on the semiconductor substrate. The output pad can include an output pad to output an output signal from the circuit element. | 01-14-2010 |
20100013066 | SEMICONDUCTOR PACKAGE - A semiconductor package includes a main substrate, a semiconductor chip having a first side and a second side, the first side of the semiconductor chip disposed on the main substrate and electrically connected to the main substrate, and a conductive network formed on the second side of the semiconductor chip. | 01-21-2010 |
20100044851 | Flip chip packages - Flip chip packages and methods of manufacturing the same are provided, the flip chip packages may include a package substrate, a semiconductor chip, conductive bumps, a ground pattern and an underfilling layer. The semiconductor chip may be over the package substrate. The conductive bumps may be between the semiconductor chip and the package substrate to electrically connect the semiconductor chip and the package substrate with each other. The ground pattern may ground one of the package substrate and the semiconductor chip. The underfilling layer may be between the package substrate and the semiconductor chip to surround the conductive bumps. The underfilling layer may have a diode selectively located between the ground pattern and the conductive bumps by electrostatic electricity applied to the underfilling layer to protect the semiconductor chip from the electrostatic electricity. | 02-25-2010 |
20110210433 | SEMICONDUCTOR CHIP AND FILM AND TAB PACKAGE COMPRISING THE CHIP AND FILM - A semiconductor chip for a tape automated bonding (TAB) package is disclosed. The semiconductor chip comprises a connection surface including a set of input pads connected to internal circuitry of the chip and for conveying external signals to the internal circuitry, the set of input pads comprising all of the input pads on the chip. The connection surface includes a set of output pads connected to internal circuitry of the chip and for conveying internal chip signals to outside the chip, the set of output pads comprising all of the output pads on the chip. The connection surface includes a first edge and a second edge that are substantially parallel to each other and are opposite each other on a respective first side and second side of the chip, and a third edge and fourth edge that are substantially perpendicular to the first and second edges, and are opposite each other on a respective third side and fourth side of the chip. A plurality of input pads of the set of input pads are adjacent the first edge, and are arranged in a first row substantially parallel to the first edge and extending in a first direction; a plurality of first output pads of the set of output pads are adjacent the second edge, and are arranged in a second row substantially parallel to the second edge and extending in the first direction; and a plurality of second output pads of the set of output pads are located between the first row and the second row. The plurality of second output pads include at least first and second outermost pads located a certain distance from the respective third edge and fourth edge, and at least first and second inner pads located a greater distance from the respective third edge and fourth edge than the first and second outermost pads. | 09-01-2011 |
20110249715 | APPARATUS AND METHOD FOR SAVING POWER CONSUMPTION IN BROADBAND WIRELESS COMMUNICATION SYSTEM - An apparatus and method reduce power consumption in a broadband wireless communication system. A transmitting end apparatus that includes a plurality of transmit (Tx) antennas includes a control block, a Processor (DSP) block, a modem block, and at least one power controller. The control block determines a traffic amount based on an amount of used resources. The Digital Signal Processor (DSP) block performs scheduling by using a subset of Tx antennas and a subset of resources on a frequency axis if the traffic amount is less than a threshold. The modem block applies boosting to a signal transmitted using the subset of resources. And at least one controller turns off an operation of at least one power amplifier that corresponds to at least one Tx antenna that is not included in the subset of Tx antennas. | 10-13-2011 |
20110304364 | Device For Removing Electromagnetic Interference And Semiconductor Package Including The Same - Provided is an electromagnetic interference (EMI) removing device for active reduction of electromagnetic interference and a semiconductor package including the same. The EMI removing device may include a film substrate having an antenna pattern configured to generate a second electromagnetic wave, which may have substantially the same frequency band, modulation mode, and directivity as a first electromagnetic wave generated by a first semiconductor chip and a phase opposite to a phase of the first electromagnetic wave | 12-15-2011 |
20120068350 | SEMICONDUCTOR PACKAGES, ELECTRONIC DEVICES AND ELECTRONIC SYSTEMS EMPLOYING THE SAME - A semiconductor package, an electronic device, and an electronic system employing the same are provided. The semiconductor package includes a printed circuit board (PCB) and a semiconductor chip structure. A first PCB land region is provided on a first surface of the PCB. A plurality of first chip land regions are provided on a first surface of the semiconductor chip structure which faces the first surface of the PCB. A first connection structure for electrically connecting the first PCB land region to the plurality of first chip land regions is provided. | 03-22-2012 |
20120091468 | SEMICONDUCTOR DEVICE WITH INTERPOSER AND METHOD MANUFACTURING SAME - A semiconductor device includes an interposer mounting a semiconductor chip. The interposer includes a silicon substrate having a recessed region formed on a first surface, a first through via penetrating a first region of the silicon substrate from the first surface to an opposing second surface, an insulator disposed in the recessed region, and a first wire pattern at least partially disposed on the insulator and electrically connecting the first through via to the semiconductor chip | 04-19-2012 |
20130001797 | PACKAGE ON PACKAGE USING THROUGH SUBSTRATE VIAS - A package on package (PoP) employing a through substrate via (TSV) technique in order to reduce the size of a semiconductor chip, has vertically narrow pitches, and forms a higher number of connection terminals. The PoP include a first substrate with a recess disposed in a first surface of the substrate, and a semiconductor chip disposed at the recess. The PoP also includes a semiconductor package connected to the first semiconductor package. The first substrate includes TSVs for electronically connecting the semiconductor package and the semiconductor chip, and routing lines for re-distributing the signals/and or power transmitted via the TSVs. | 01-03-2013 |
20130175702 | SEMICONDUCTOR PACKAGE - A semiconductor package includes a first semiconductor package, a second semiconductor package, and a package-connecting member. The first semiconductor package includes a first substrate, a chip stacking portion disposed on the first substrate and including a plurality of first semiconductor chips, and a first sealant for surrounding the chip stacking portion on the first substrate. The second semiconductor package includes a second substrate, at least one second semiconductor chip disposed on the second substrate, and a second sealant for surrounding the second semiconductor chip on the second substrate. The package-connecting member electrically connects the first semiconductor package and the second semiconductor package. The plurality of first semiconductor chips include a first chip including through silicon vias (TSVs) and a second chip electrically connected to the first chip via the TSVs, and the chip stacking portion includes an internal sealant for filling a space between the first chip and the second chip and extending to a side of the second chip. | 07-11-2013 |
20130175706 | SEMICONDUCTOR PACKAGE - A semiconductor package including a substrate, a chip stack portion disposed on the substrate and including a plurality of first semiconductor chips, at least one second semiconductor chip disposed on the chip stack portion, and a signal transmitting medium to electrically connect the at least one second semiconductor chip and the substrate to each other, such that the chip stack portion is a parallelepiped structure including a first chip that is a semiconductor chip of the plurality of first semiconductor chips and includes a through silicon via (TSV), a second chip that is another semiconductor chip of the plurality of first semiconductor chips and electrically connected to the first chip through the TSV, and an internal sealing member to fill a space between the first chip and the second chip. | 07-11-2013 |
20140038353 | SEMICONDUCTOR PACKAGES, METHODS OF MANUFACTURING THE SAME, AND SEMICONDUCTOR PACKAGE STRUCTURES INCLUDING THE SAME - A method of manufacturing a semiconductor package includes preparing a parent substrate including package board parts laterally spaced apart from each other, mounting a first chip including a through-via electrode on each of the package board parts, forming a first mold layer on the parent substrate having the first chips, planarizing the first mold layer to expose back sides of the first chips, etching the exposed back sides of the first chips to expose back sides of the through-via electrodes, forming a passivation layer on the planarized first mold layer, the etched back sides of the first chips, and the back sides of the through-via electrodes, and selectively removing the passivation layer to expose the back sides of the through-via electrodes. | 02-06-2014 |
20140084430 | SEMICONDUCTOR CHIP AND FILM AND TAB PACKAGE COMPRISING THE CHIP AND FILM - A semiconductor chip for a TAB package includes a surface including a set of input pads connected to internal circuitry of the chip and for receiving external signals The surface includes output pads. A plurality of input pads are adjacent a first edge and are in a first row substantially parallel to the first edge and extending in a first direction; a plurality of first output pads are adjacent a second edge, and are in a second row substantially parallel to the second edge and extending in the first direction; and a plurality of second output pads are located between the first row and the second row. The plurality of second output pads first and second outermost pads located a certain distance from a respective third edge and fourth edge, and first and second inner pads located a greater distance from the respective third edge and fourth edge. | 03-27-2014 |
20140217616 | STACK PACKAGE AND METHOD OF MANUFACTURING STACK PACKAGE - A stack package includes a first semiconductor chip having a plurality of first pads, and a second semiconductor chip stacked on the first semiconductor chip and having a plurality of second pads corresponding to the first pads respectively, the second pads connected to the corresponding first pads. The first and second pads are arranged such that the first and second pads overlap with each other even after the first and second semiconductor chips are rotated relative to each other by a predetermined angle. | 08-07-2014 |
20140367839 | SEMICONDUCTOR PACKAGE - A semiconductor package includes a first semiconductor package, a second semiconductor package, and a package-connecting member. The first semiconductor package includes a first substrate, a chip stacking portion disposed on the first substrate and including a plurality of first semiconductor chips, and a first sealant for surrounding the chip stacking portion on the first substrate. The second semiconductor package includes a second substrate, at least one second semiconductor chip disposed on the second substrate, and a second sealant for surrounding the second semiconductor chip on the second substrate. The package-connecting member electrically connects the first semiconductor package and the second semiconductor package. The plurality of first semiconductor chips include a first chip including through silicon vias (TSVs) and a second chip electrically connected to the first chip via the TSVs, and the chip stacking portion includes an internal sealant for filling a space between the first chip and the second chip and extending to a side of the second chip. | 12-18-2014 |