Patent application number | Description | Published |
20090210011 | Orthopedic plate for use in the midfoot - An orthopedic plate is specifically configured for implantation at the mid-foot. The plate has a first radius along the x-axis in the y direction and a second radius along the y-axis in the y direction The plate has an ring-shaped footprint with two diagonal sets, (one set of longer and one set of shorter) of opposing tabs. In each set of tabs, one tab includes a compression slot that extends and causes compression in a direction toward a screw hole in the opposing tab of the other set of tabs. The maximum length of the plate extends between the longer set of tabs, and an opening is included along this axis to allow viewing of the bone/bone fragments under the plate. The placement of the compression slots and the screw holes account for the progressively anterior placement of the cuneiforms and provides for compression in the medial direction. In a further embodiment, the plate is flat or includes a crease midway between the first and second tabs, which facilitates placement of the plate at the joint between the metatarsals and the cuneiforms. | 08-20-2009 |
20090306724 | Orthopedic plates for use in clavicle repair and methods for their use - The present invention relates to a series of orthopedic plates for use in repair of a clavicle. The plate has a Y-shaped profile or an X-shaped profile which includes an elongate central trunk with a complex contour and wither one or two terminal pairs of arms that have a first arm and a second arm that form differing angles and lengths relative to the trunk portion of the plate. The arms include locking screw holes where the screws converge toward each other to provide for multiplanar fixatio but which do not impinge. | 12-10-2009 |
20090312759 | Orthopedic plate for use in fibula repair - The present invention relates to an orthopedic plate for use in repair of a fibula. The plate has a Y-shaped profile which has the contour of a spoon where the bowl includes a terminal pair of arms that form differing angles and lengths relative to the trunk portion of the plate. The arms include locking screw holes where the screws converge toward each other, but do not impinge so as to provide-multiplanar fixation. | 12-17-2009 |
20120109214 | ORTHOPEDIC PLATES FOR USE IN CLAVICLE REPAIR AND METHODS FOR THEIR USE - The present invention relates to a series of orthopedic plates for use in repair of a clavicle. The plate has a Y-shaped profile or an X-shaped profile which includes an elongate central trunk with a complex contour and wither one or two terminal pairs of arms that have a first arm and a second arm that form differing angles and lengths relative to the trunk portion of the plate. The arms include locking screw holes where the screws converge toward each other to provide for multiplanar fixation but which do not impinge. | 05-03-2012 |
20120109215 | ORTHOPEDIC PLATE FOR USE IN FIBULA REPAIR - The present invention relates to an orthopedic plate for use in repair of a fibula. The plate has a Y-shaped profile which has the contour of a spoon where the bowl includes a terminal pair of arms that form differing angles and lengths relative to the trunk portion of the plate. The arms include locking screw holes where the screws converge toward each other, but do not impinge so as to provide multiplanar fixation. | 05-03-2012 |
20120184959 | Wedge opening osteotomy plate - An orthopedic plate is designed for opening osteotomies and includes a contoured double tabbed or butterfly shaped plate portion which can accommodate selective fixation including locking, variable locking and non-locking. The plate also includes a centrally located osteotomy support that maintains the opening between bone segments at a spaced relationship. The support can be integral to the plate, or can be modular, i.e. a separate and adjustable segment which can be changed to accommodate the desired geometry of the osteotomy site. | 07-19-2012 |
20120209334 | ORTHOPEDIC COMPRESSION PLATE - An orthopedic plate has a first end including a locking screw hole that receives a locking screw and spaced from that hole is a compression housing that extends from the bone-facing side of the plate and which receives a compression screw that forms an angle of from about 10° to about 70° with a longitudinal axis of the plate. In a further embodiment, the plate also includes a second end with a chamfer for insertion of the plate into bone, and in a still further embodiment, the plate is an MTP plate. | 08-16-2012 |
20130172942 | ORTHOPEDIC COMPRESSION PLATE AND METHOD OF SURGERY - An orthopedic plate has a first end including a locking screw hole that receives a locking screw and spaced from that hole is a dosed compression housing that extends from the bone-facing side of the plate and which receives a compression screw that forms an angle of from about 10° to about 70° with a longitudinal axis of the plate. The compression housing is not located on the medial line of the plate, but is peripheral to the medial line, either in the longitudinal or the medial direction of the plate. | 07-04-2013 |
20140066996 | CONTOURED CALCANEAL PLATE AND A PERCUTANEOUS DRILL GUIDE FOR USE THEREWITH - This invention provides a calcaneal plate implanted using a sinus tarsi approach and comprises an anterior section having two locking screw holes, an s-shaped posterior facet section having a four locking holes and which rounds toward the bone at both the inferior and superior edges and is reinforced at the superior edge, and a blade shaped posterior portion having three linearly aligned locking holes and terminating in a tapered portion. There is also, a drill guide assembly having a drill guide column inserted through a hole in a targeting guide and locking to one of the locking holes in the plate, and cannulated drill guide sleeves that lock into holes in the targeting guide in a spaced relation whereby when the targeting guide is locked into the plate, the targeting guide can be used as a handle and wherein locking screws can be implanted percutaneously. | 03-06-2014 |
20140107798 | LATERAL ANKLE FUSION PLATE SYSTEM AND JIG, AND METHOD FOR USE THEREWITH - The invention comprises a lateral ankle fusion plate, a jig for use with the fusion plate and a method for ankle fusion of the joints between the tibia, the talus, and the calcaneus. In addition, a separate fusion screw from posterior to anterior through the calcaneal tuberosity into the distal tibia is useful and can be placed using the targeting jig of the invention. The plate includes a C-shaped stirrup portion that wraps the bottom of the calcaneus and is provided with a screw hole for a T-T-C-fusion screw. A C-shaped targeting jig is provided that interfaces with the plate to allow for placement of the calcaneal screw and has an additional attachment for placement of the independent fusion screw so as to avoid impingement with the plate, and plate screws. The invention also relates to a method of surgery that incorporates the use of the plate, the jig and the tibial/talar/calcaneal fusion screw for an arthrodesis of the ankle joint. | 04-17-2014 |
Patent application number | Description | Published |
20080261271 | EXPRESSION OF HIV POLYPEPTIDES AND PRODUCTION OF VIRUS-LIKE PARTICLES - The present invention relates to the efficient expression of HIV polypeptides in a variety of cell types, including, but not limited to, mammalian, insect, and plant cells. Synthetic expression cassettes encoding the HIV Gag-containing polypeptides are described, as are uses of the expression cassettes in applications including DNA immunization, generation of packaging cell lines, and production of Env-, tat- or Gag-containing proteins. The invention provides methods of producing Virus-Like Particles (VLPs), as well as, uses of the VLPs including, but not limited to, vehicles for the presentation of antigens and stimulation of immune response in subjects to whom the VLPs are administered. | 10-23-2008 |
20090304740 | MODIFIED HIV ENV POLYPEPTIDES - Polynucleotide encoding modified HIV Env polypeptides are disclosed. The Env polypeptides are modified so as to expose at least part of the CD4 binding region. Methods of diagnosis, treatment and prevention using the polynucleotides and polypeptides are also provided. | 12-10-2009 |
20100092502 | MODIFIED HIV ENV POLYPEPTIDES - Polynucleotide encoding modified HIV Env polypeptides are disclosed. The Env polypeptides are modified so as to expose at least part of the CD4 binding region. Methods of diagnosis, treatment and prevention using the polynucleotides and polypeptides are also provided. | 04-15-2010 |
20110065146 | Expression of HIV polypeptides and production of virus-like particles - The present invention relates to the efficient expression of HIV polypeptides in a variety of cell types, including, but not limited to, mammalian, insect, and plant cells. Synthetic expression cassettes encoding the HIV Gag-containing polypeptides are described, as are uses of the expression cassettes in applications including DNA immunization, generation of packaging cell lines, and production of Env-, tat- or Gag-containing proteins. The invention provides methods of producing Virus-Like Particles (VLPs), as well as, uses of the VLPs including, but not limited to, vehicles for the presentation of antigens and stimulation of immune response in subjects to whom the VLPs are administered. | 03-17-2011 |
20120269840 | EXPRESSION OF HIV POLYPEPTIDES AND PRODUCTION OF VIRUS-LIKE PARTICLES - The present invention relates to the efficient expression of HIV polypeptides in a variety of cell types, including, but not limited to, mammalian, insect, and plant cells. Synthetic expression cassettes encoding the HIV Gag-containing polypeptides are described, as are uses of the expression cassettes in applications including DNA immunization, generation of packaging cell lines, and production of Env-, tat- or Gag-containing proteins. The invention provides methods of producing Virus-Like Particles (VLPs), as well as, uses of the VLPs including, but not limited to, vehicles for the presentation of antigens and stimulation of immune response in subjects to whom the VLPs are administered. | 10-25-2012 |
Patent application number | Description | Published |
20090309896 | Multi Instance Unified Shader Engine Filtering System With Level One and Level Two Cache - Apparatus and systems utilizing multiple shader engines where each shader engine comprises multiple rows of shader engine filters combined with level one and level two cache systems. Each unified shader engine filter comprises a shader pipe array, and a texture mapping unit with access to a level one cache system and a level two cache. The shader pipe array accepts texture requests for a specified pixel from a resource and performs associated rendering calculations, outputting texel data. The texture mapping unit retrieves texel data stored in a level one cache system, with the ability to read and write to and from a level two cache system, and through formatting and bilinear filtering interpolations generates a formatted bilinear result based on the specific pixel's neighboring texels. Utilizing multiple rows of shader engine filters within a shader engine allows for the parallel processing of multiple simultaneous resource requests. Utilizing multiple shader engines allows for greater processing through the use of multiple simultaneous processing. A method utilizing multiple shader engines to perform texture mapping is also presented. | 12-17-2009 |
20090315909 | Unified Shader Engine Filtering System - Each row of a row based shader engine comprises a shader pipe array, a texture filter, and a level one texture cache system. The shader pipe array accepts texture requests for a specified pixel from a resource and performs associated rendering calculations, outputting texel data. The texture mapping unit receives texel data from a level one cache system and through formatting and bilinear filtering interpolations, generates a formatted bilinear result based on a specific pixel's corresponding four texels. Utilizing multiple rows of a row based shader engine within the shader engine allows for the parallel processing of multiple simultaneous resource requests. A method for texture filtering utilizing a row based shader engine is also presented. | 12-24-2009 |
20100146211 | Shader Complex with Distributed Level One Cache System and Centralized Level Two Cache - A shader pipe texture filter utilizes a level one cache system as a primary method of storage but with the ability to have the level one cache system read and write to a level two cache system when necessary. The level one cache system communicates with the level two cache system via a wide channel memory bus. In addition, the level one cache system can be configured to support dual shader pipe texture filters while maintaining access to the level two cache system. A method utilizing a level one cache system as a primary method of storage with the ability to have the level one cache system read and write a level two cache system when necessary is also presented. In addition, level one cache systems can allocate a defined area of memory to be sharable amongst other resources. | 06-10-2010 |
Patent application number | Description | Published |
20100017652 | APPARATUS WITH REDUNDANT CIRCUITRY AND METHOD THEREFOR - An apparatus with circuit redundancy includes a set of parallel arithmetic logic units (ALUs), a redundant parallel ALU, input data shifting logic that is coupled to the set of parallel ALUs and that is operatively coupled to the redundant parallel ALU. The input data shifting logic shifts input data for a defective ALU, in a first direction, to a neighboring ALU in the set. When the neighboring ALU is the last or end ALU in the set, the shifting logic continues to shift the input data for the end ALU that is not defective, to the redundant parallel ALU. The redundant parallel ALU then operates for the defective ALU. Output data shifting logic is coupled to an output of the parallel redundant ALU and all other ALU outputs to shift the output data in a second and opposite direction than the input shifting logic, to realign output of data for continued processing, including for storage or for further processing by other circuitry. | 01-21-2010 |
20120188259 | Mechanisms for Enabling Task Scheduling - Embodiments described herein provide a method including receiving a command to schedule a first process and selecting a command queue associated with the first process. The method also includes scheduling the first process to run on an accelerated processing device and preempting a second process running on the accelerated processing device to allow the first process to run on the accelerated processing device. | 07-26-2012 |
20120198458 | Methods and Systems for Synchronous Operation of a Processing Device - Embodiments of the present invention provide a method of synchronous operation of a first processing device and a second processing device. The method includes executing a process on the first processing device, responsive to a determination that execution of the process on the first device has reached a serial-parallel boundary, passing an execution thread of the process from the first processing device to the second processing device, and executing the process on the second processing device. | 08-02-2012 |
20130135327 | Saving and Restoring Non-Shader State Using a Command Processor - Provided is a system including a command processor configured for interrupting processing of a first set of instructions executing within a shader core. | 05-30-2013 |
Patent application number | Description | Published |
20120194524 | Preemptive Context Switching - Methods, systems, and computer readable media embodiments are disclosed for preemptive context-switching of processes running on a accelerated processing device. Embodiments include, detecting by an accelerated processing device a memory exception, and preempting a process from running on the accelerated processing device based upon the detected exception. | 08-02-2012 |
20120194525 | Managed Task Scheduling on a Graphics Processing Device (APD) - Provided herein is a method including receiving a run list including one or more processes to run on an accelerated processing device, wherein each of the one or more processes is associated with a corresponding independent job command queue. The method also includes scheduling each of the one or more processes to run on the accelerated processing device based on a criteria associated with each process. | 08-02-2012 |
20120194527 | Method for Preempting Graphics Tasks to Accommodate Compute Tasks in an Accelerated Processing Device (APD) - Embodiments described herein provide a method of arbitrating a processing resource. The method includes receiving a command to preempt a task and preventing additional wavefronts associated with the task from being processed. The method also includes evicting currently executing wavefronts associated with the task from being processed based upon predetermined criteria | 08-02-2012 |
20120194528 | Method and System for Context Switching - Embodiments of the present invention provide a method of preempting a task. The method includes removing the task from the parallel processors via a scheduling mechanism. Responsive to the removing, the method also includes ceasing (i) retrieval of commands from a buffer associated with the task, (ii) dispatch of groups of work-items associated with the task, (iii) dispatch of wavefronts associated with the task, and (iiii) execution of the wavefronts. State information related to the task is saved. | 08-02-2012 |
20120200576 | Preemptive context switching of processes on ac accelerated processing device (APD) based on time quanta - Methods, systems, and computer readable media for preemptive context-switching of processes on an accelerated processing device are based upon a comparison of the running time of the process and a threshold time quanta. A method includes preempting a process running on an accelerated processing device based upon a running time of the process and a threshold time quanta. | 08-09-2012 |
20120200579 | Process Device Context Switching - Methods, systems, and computer readable media embodiments are disclosed for preemptive context-switching of processes running on an accelerated processing device. A method includes, responsive to an exception upon access to a memory by a process running on a accelerated processing device, whether to preempt the process based on the exception, and preempting, based upon the determining, the process from running on the accelerated processing device. | 08-09-2012 |
20130141446 | Method and Apparatus for Servicing Page Fault Exceptions - A method, apparatus and computer readable media for servicing page fault exceptions in a accelerated processing device (APD). A page fault related to a wavefront is detected. A fault handling request to a translation mechanism is sent when the page fault is detected. A fault handling response corresponding to the detected page fault from the translation mechanism is received. Confirmation that the detected page fault has been handled through performing page mapping based on the fault handling response is received. | 06-06-2013 |
20130141447 | Method and Apparatus for Accommodating Multiple, Concurrent Work Inputs - A method of accommodating more than one compute input is provided. The method creates an APD arbitration policy that dynamically assigns compute instructions from a sequence of instructions awaiting processing to the APD compute units for execution of a run list. | 06-06-2013 |
20130145202 | Handling Virtual-to-Physical Address Translation Failures - A method tolerates virtual to physical address translation failures. A translation request is sent from a graphics processing device to a translation mechanism. The translation request is associated with a first wavefront. A fault notification is received within an accelerated processing device (APD) from the translation mechanism that a request cannot be acknowledged. The first wavefront is, stored within a shader core of the APD if the fault notification is received. The first wavefront is replaced with a second wavefront if the fault notification is received, the second wavefront being ready to be executed. | 06-06-2013 |
20130147816 | Partitioning Resources of a Processor - Embodiments describe herein provide an apparatus, a computer readable medium and a method for simultaneously processing tasks within an APD. The method includes processing a first task within an APD. The method also includes reducing utilization of the APD by the first task to facilitate simultaneous processing of the second task, such that the utilization remains below a threshold. | 06-13-2013 |
20130155077 | Policies for Shader Resource Allocation in a Shader Core - A method of determining priority within an accelerated processing device is provided. The accelerated processing device includes compute pipeline queues that are processed in accordance with predetermined criteria. The queues are selected based on priority characteristics and the selected queue is processed until a time quantum lapses or a queue having a higher priority becomes available for processing. | 06-20-2013 |
20130155079 | Saving and Restoring Shader Context State - Provided is a method for processing a command in a computing system including an accelerated processing device (APD) having a command processor. The method includes executing an interrupt routine to save one or more contexts related to a first set of instructions on a shader core in response to an instruction to preempt processing of the first set of instructions. | 06-20-2013 |
20130160017 | Software Mechanisms for Managing Task Scheduling on an Accelerated Processing Device (APD) - Embodiments describe herein provide a method of for managing task scheduling on a accelerated processing device. The method includes executing a first task within the accelerated processing device (APD), monitoring for an interruption of the execution of the first task, and switching to a second task when an interruption is detected. | 06-20-2013 |
20130160019 | Method for Resuming an APD Wavefront in Which a Subset of Elements Have Faulted - A method resumes an accelerated processing device (APD) wavefront in which a subset of elements have faulted. A restore command for a job including a wavefront is received. A list of context states for the wavefront is read from a memory associated with a APD. An empty shell wavefront is created for restoring the list of context states. A portion of not acknowledged data is masked over a portion of acknowledged data within the restored wavefronts. | 06-20-2013 |
20140022263 | METHOD FOR URGENCY-BASED PREEMPTION OF A PROCESS - The desire to use an Accelerated Processing Device (APD) for general computation has increased due to the APD's exemplary performance characteristics. However, current systems incur high overhead when dispatching work to the APD because a process cannot be efficiently identified or preempted. The occupying of the APD by a rogue process for arbitrary amounts of time can prevent the effective utilization of the available system capacity and can reduce the processing progress of the system. Embodiments described herein can overcome this deficiency by enabling the system software to pre-empt a process executing on the APD for any reason. The APD provides an interface for initiating such a pre-emption. This interface exposes an urgency of the request which determines whether the process being preempted is allowed a grace period to complete its issued work before being forced off the hardware. | 01-23-2014 |