Patent application number | Description | Published |
20100036407 | SINGLE-USE LANCET SENSOR ASSEMBLY AND METER - A single-use lancet cartridge for inserting into a multi-use lancet driver assembly includes an elongated lancet housing with an open end, a lancet within the lancet housing and movable between a retracted and resting orientation to a piercing orientation through the open end, and a re-use prevention component incorporated within the lancet cartridge and oriented to cooperatively engage with a driver piston of the multi-use lancet driver assembly only one time thereby preventing the lancet from being moved into a piercing orientation a second time. The single-use lancet cartridge is used that contains the multi-use lancet driver assembly. | 02-11-2010 |
20100191149 | Lancet sensor assembly and meter - A method of obtaining a test sample from a specimen using a lancet system includes engaging a lancet driver against a drive wing of a lancet system, the lancet system having a major portion of a lancet member slidably engaged within a lancet carrier and a sensor strip with a sample chamber attached to the lancet carrier, the lancet system having a lance connected to a first end of a lancet body of the lancet member wherein the lance is movable from a retracted position within the lancet carrier to an extended position outside the lancet carrier, the drive wing extending outwardly and transversely from the lancet body, the major portion of the lancet member having a sinuous portion with a distal end restricted from movement by the lancet carrier, the sinuous portion being non-compressible when initially disposed within the lancet carrier wherein the drive wing prevents the sinuous portion from being compressed, moving the drive wing with the lancet driver a predetermined distance causing the lancet tip to move from the retracted position to the extended position, and disengaging the lancet driver from the drive wing, the lance being automatically moved from the extended position to the retracted position. | 07-29-2010 |
20100241030 | Modified lancet carrier for single-use lancet sensor assembly - A lancet carrier for an integrated lancet sensor assembly incorporating a lance cover includes an elongated body with a bottom, an open top, a body open end and a body closed end, a lancet-receiving recess with a recess bottom surface, the recess extending between the open end and the closed end, and a trough-forming member forming a trough with a trough open end in communication with the body open end, the trough-forming member longitudinally extending a predefined distance along the bottom from the body open end, the trough replacing a portion of the recess bottom surface at the body open end. | 09-23-2010 |
20130253373 | Single-use lancet sensor assembly and meter - A single-use lancet cartridge for inserting into a multi-use lancet driver assembly of a meter housing includes an elongated lancet housing with an open end, a lancet within the lancet housing and movable between a retracted and resting orientation to a piercing orientation through the open end, and a re-use prevention component that is a rotated drive wing incorporated within the lancet cartridge and oriented to cooperatively engage with a driver piston of the multi-use lancet driver assembly only one time thereby preventing the lancet from being moved into a piercing orientation a second time. | 09-26-2013 |
Patent application number | Description | Published |
20080225049 | METHOD AND APPARATUS FOR GENERATING A PLURALITY OF STENCIL REFERENCE VALUES FOR A CORRESPONDING PLURALITY OF PIXELS OR PIXEL SAMPLES - Based on a driver programmable stencil reference value command, stencil reference value logic produces a plurality of stencil reference values for a corresponding plurality of pixels or pixel samples. At least one of the plurality of stencil reference values has a different value than at least one other of the plurality of stencil reference values. The driver programmable stencil reference value command may include a reference to instruction data or instruction data itself such that the graphics processing logic produces the plurality of stencil reference values based on the instruction data. Stencil logic performs a stencil test on the produced plurality of stencil reference values with respect to or without reference to a previously produced plurality of stencil values. Stencil logic performs stencil operations based on the result of the stencil test. | 09-18-2008 |
20110057935 | Tiling Compaction in Multi-Processor Systems - A method and system for processing a graphics frame in a multi-processor computing environment are described. Embodiments of the present invention enable the reduction of the memory footprint required for processing a graphics frame in a multi-processor system. In one embodiment a method of processing a graphics frame using a plurality of processors is presented. The method includes determining a respective assignment of tiles of the graphics frame to each processor of the plurality of processors; allocating a memory area in a local memory of each processor, where the size of the allocated memory area substantially corresponds to the aggregate size of tiles assigned to the respective processor; and storing the tiles of the respective assignment of tiles in the memory area of each respective processor. | 03-10-2011 |
20120013624 | Split Storage of Anti-Aliased Samples - Embodiments of the present invention are directed to improving the performance of anti-aliased image rendering. One embodiment is a method of rendering a pixel from an anti-aliased image. The method includes: storing a first set and a second set of samples from a plurality of anti-aliased samples of the pixel respectively in a first memory and a second memory; and rendering a determined number of said samples from one of only the first set or the first and second sets. Corresponding system and computer program product embodiments are also disclosed. | 01-19-2012 |
20120013629 | Reading Compressed Anti-Aliased Images - Embodiments of the present invention enable the reduction of the memory bandwidth required for graphics rendering. According to an embodiment, a method to render a pixel from a compressed anti-aliased image includes: accessing metadata for the pixel, where the metadata includes entries for respective samples generated by multisampling the pixel; and retrieving a subset of said samples based upon the metadata, wherein the subset is stored in the compressed anti-aliased image stored in a memory. | 01-19-2012 |
20130262775 | Cache Management for Memory Operations - Embodiments of the present invention provides for the execution of threads and/or workitems on multiple processors of a heterogeneous computing system in a manner that they can share data correctly and efficiently. Disclosed method, system, and article of manufacture embodiments include, responsive to an instruction from a sequence of instructions of a work-item, determining an ordering of visibility to other work-items of one or more other data items in relation to a particular data item, and performing at least one cache operation upon at least one of the particular data item or the other data items present in any one or more cache memories in accordance with the determined ordering. The semantics of the instruction includes a memory operation upon the particular data item. | 10-03-2013 |
20140040565 | Shared Memory Space in a Unified Memory Model - Methods and systems are provided for mapping a memory instruction to a shared memory address space in a computer arrangement having a CPU and an APD. A method includes receiving a memory instruction that refers to an address in the shared memory address space, mapping the memory instruction based on the address to a memory resource associated with either the CPU or the APD, and performing the memory instruction based on the mapping. | 02-06-2014 |
20140292756 | Hybrid Render with Deferred Primitive Batch Binning - A system, method and a computer program product are provided for hybrid rendering with deferred primitive batch binning. A primitive batch is generated from a sequence of primitives. Initial bin intercepts are identified for primitives in the primitive batch. A bin for processing is identified. The bin corresponds to a region of a screen space. Pixels of the primitives intercepting the identified bin are processed. Next bin intercepts are identified while the primitives intercepting the identified bin are processed. | 10-02-2014 |
Patent application number | Description | Published |
20090295821 | Scalable and Unified Compute System - A Scalable and Unified Compute System performs scalable, repairable general purpose and graphics shading operations, memory load/store operations and texture filtering. A Scalable and Unified Compute Unit Module comprises a shader pipe array, a texture mapping unit, and a level one texture cache system. The Scalable and Unified Compute Unit Module accepts ALU instructions, input/output instructions, and texture or memory requests for a specified set of pixels, vertices, primitives, surfaces, or general compute work items from a shader program and performs associated operations to compute the programmed output data. The texture mapping unit accepts source data addresses and instruction constants in order to fetch, format, and perform instructed filtering interpolations to generate formatted results based on the specific corresponding data stored in a level one texture cache system. The texture mapping unit consists of an address generating system, a pre-formatter module, interpolator module, accumulator module and a format module. A method for a Scalable and Unified Compute System is also presented. | 12-03-2009 |
20090309896 | Multi Instance Unified Shader Engine Filtering System With Level One and Level Two Cache - Apparatus and systems utilizing multiple shader engines where each shader engine comprises multiple rows of shader engine filters combined with level one and level two cache systems. Each unified shader engine filter comprises a shader pipe array, and a texture mapping unit with access to a level one cache system and a level two cache. The shader pipe array accepts texture requests for a specified pixel from a resource and performs associated rendering calculations, outputting texel data. The texture mapping unit retrieves texel data stored in a level one cache system, with the ability to read and write to and from a level two cache system, and through formatting and bilinear filtering interpolations generates a formatted bilinear result based on the specific pixel's neighboring texels. Utilizing multiple rows of shader engine filters within a shader engine allows for the parallel processing of multiple simultaneous resource requests. Utilizing multiple shader engines allows for greater processing through the use of multiple simultaneous processing. A method utilizing multiple shader engines to perform texture mapping is also presented. | 12-17-2009 |
20090315909 | Unified Shader Engine Filtering System - Each row of a row based shader engine comprises a shader pipe array, a texture filter, and a level one texture cache system. The shader pipe array accepts texture requests for a specified pixel from a resource and performs associated rendering calculations, outputting texel data. The texture mapping unit receives texel data from a level one cache system and through formatting and bilinear filtering interpolations, generates a formatted bilinear result based on a specific pixel's corresponding four texels. Utilizing multiple rows of a row based shader engine within the shader engine allows for the parallel processing of multiple simultaneous resource requests. A method for texture filtering utilizing a row based shader engine is also presented. | 12-24-2009 |
20100146211 | Shader Complex with Distributed Level One Cache System and Centralized Level Two Cache - A shader pipe texture filter utilizes a level one cache system as a primary method of storage but with the ability to have the level one cache system read and write to a level two cache system when necessary. The level one cache system communicates with the level two cache system via a wide channel memory bus. In addition, the level one cache system can be configured to support dual shader pipe texture filters while maintaining access to the level two cache system. A method utilizing a level one cache system as a primary method of storage with the ability to have the level one cache system read and write a level two cache system when necessary is also presented. In addition, level one cache systems can allocate a defined area of memory to be sharable amongst other resources. | 06-10-2010 |
Patent application number | Description | Published |
20090060208 | Manipulating Spatial Processing in a Audio System - A vehicle audio system that includes a source of audio signals, which may include both entertainment audio signals and announcement audio signals, speakers for radiating audio signals, and spatial enhancement circuitry comprising circuitry to avoid applying spatial enhancement processing to the announcement audio signals. | 03-05-2009 |
20120182834 | WEARABLE SHOOTER LOCALIZATION SYSTEM - A wearable shooter localization system including a microphone array, processor, and output device for determining information about a gunshot. The microphone array may be worn by on the upper arm of the user. A second array, which may operate cooperatively or independently from the first array, may be worn on the other arm. The microphone array is sensitive to the acoustic effects of gunfire and provides a set of electrical signals to the processing unit, which identifies the origin of the fire. The system may include orientation and/or motion detection sensors, which the processor may use to either initially compute a direction to the origin of a projectile in a frame of reference meaningful to a wearer of the system or to subsequently update that direction as the wearer moves. | 07-19-2012 |
20120230534 | MANIPULATING SPATIAL PROCESSING IN AN AUDIO SYSTEM - A vehicle audio system that includes a source of audio signals, which may include both entertainment audio signals and announcement audio signals, speakers for radiating audio signals, and spatial enhancement circuitry comprising circuitry to avoid applying spatial enhancement processing to the announcement audio signals. | 09-13-2012 |
20120275272 | WEARABLE SHOOTER LOCALIZATION SYSTEM - A wearable shooter localization system including a microphone array, processor, and output device for determining information about a gunshot. The microphone array may be worn by on the upper arm of the user. A second array, which may operate cooperatively or independently from the first array, may be worn on the other arm. The microphone array is sensitive to the acoustic effects of gunfire and provides a set of electrical signals to the processing unit, which identifies the origin of the fire. The system may include orientation and/or motion detection sensors, which the processor may use to either initially compute a direction to the origin of a projectile in a frame of reference meaningful to a wearer of the system or to subsequently update that direction as the wearer moves. | 11-01-2012 |
20130054838 | METHOD AND SYSTEM FOR SELECTING A DATA COMPRESSION TECHNIQUE FOR DATA TRANSFER THROUGH A DATA NETWORK - A method and system for selecting a data compression technique for data transfer through a data network is provided. During call setup, information is gathered from the network infrastructure by receiving feedback from smart network devices, reviewing calls logs, or by accessing a network topology database, and the information can then be used to select a desired compression technique. During a call, a media terminating end device or a call control server will monitor call connection performance specific to the data transfer pathway used for the call connection, and may adjust the data compression to conform with the performance that the connection is providing at any given moment. Performance parameters such as delay, jitter, and compression ratios can be measured in real-time for a call to determine if a change in compression is deemed beneficial. In this manner, the compression method can be chosen based on real time network performance. | 02-28-2013 |
20130246658 | METHOD AND SYSTEM FOR SELECTING A DATA COMPRESSION TECHNIQUE FOR DATA TRANSFER THROUGH A DATA NETWORK - A method and system for selecting a data compression technique for data transfer through a data network is provided. During call setup, information is gathered from the network infrastructure by receiving feedback from smart network devices, reviewing calls logs, or by accessing a network topology database, and the information can then be used to select a desired compression technique. During a call, a media terminating end device or a call control server will monitor call connection performance specific to the data transfer pathway used for the call connection, and may adjust the data compression to conform with the performance that the connection is providing at any given moment. Performance parameters such as delay, jitter, and compression ratios can be measured in real-time for a call to determine if a change in compression is deemed beneficial. In this manner, the compression method can be chosen based on real time network performance. | 09-19-2013 |