Patent application number | Description | Published |
20090295439 | Phase Lock Loop (PLL) with Gain Control - A Phase Lock Loop (PLL) with gain control is provided. The PLL has a dual-path configuration, where a first and a second VCO control voltage are generated in response to a phase or frequency difference between a PLL input signal and an output signal. The PLL comprises a dynamic voltage gain control (DVGC) unit and a voltage-to-current (V2I) unit, where the DVGC creates a baseline reference current in response to the first VCO control voltage and the V2I provides a substantially linear current in response to the second VCO control voltage. The currents from the DVGC and V2I are combined and fed into a current-controlled oscillator, which generates a PLL output frequency signal. Frequency gain of the VCO is substantially reduced, thus providing a PLL with improved tuning precision. | 12-03-2009 |
20100077192 | COMPUTER, BOOTING SOFTWARE PRODUCT AND COMPUTER BOOTING METHOD - A computer includes an application system, a storage device and a basic input output system (BIOS). The application system can be respectively coupled to the storage device and the BIOS, set at least a multimedia file as a preset playing file according to an input instruction and store the preset playing file into the storage device. The application system can further generate a log file according to the input instruction and the storage position of the preset playing file, wherein the log file is sent to the BIOS. The BIOS has a file access module, so that the BIOS can acquire the preset playing file from the storage device according to the log file for playing during booting the computer. | 03-25-2010 |
20100141346 | Phase-Locked Loop with Start-Up Circuit - A circuit includes a voltage-controlled oscillator (VCO), which includes a voltage input node having an input voltage; and a start-up circuit. The start-up circuit includes a first current path and a second current path. The first current path has a first current and is configured so that the first current increases in response to a decrease in the input voltage and decreases in response to an increase in the input voltage. The second current path has a second current and is configured so that the second current decreases in response to the decrease in the input voltage and decreases in response to the increase in the input voltage. The VCO further includes a third current path combining a first proportion of the first current and a second proportion of the second current into a combined current; and a current-controlled oscillator (CCO) including an input receiving the combined current and outputting an AC signal. | 06-10-2010 |
20100176777 | Constant Gm Circuit and Methods - Structures and methods for providing a temperature independent constant current reference are provided. A constant Gm circuit is disclosed with embodiments including a voltage controlled resistor providing a current into a current mirror, the current mirror sinking a reference current at its output. By providing a feedback loop that controls the voltage controlled resistor, a temperature compensated circuit may be obtained. The temperature dependence of the voltage controlled resistor is positive and the feedback circuitry maintains this resistor at a value that compensates for the negative temperature dependence of the current mirror circuit. The reference current is thus obtained at a predetermined level independent of temperature. A method for providing a reference current is disclosed wherein a voltage dependent resistor is provided supply current to a current mirror, the voltage dependent resistor receiving a feedback voltage from the current mirror and the feedback controlling the resistor so that a temperature independent reference current is obtained. | 07-15-2010 |
20110080220 | TEMPERATURE COMPENSATED INTEGRATOR - A representative integrator includes an amplifier having an input and an output; a feedback loop coupled between the input and the output of the amplifier, the feedback loop comprising a compensated resistor circuit having a resistance value selected for reducing a loss factor of the integrator; and a control circuit coupled to an input of the compensated resistor circuit, the control circuit producing a control signal for controlling the compensated resistor circuit to substantially maintain the resistance value selected for reducing the loss factor of the integrator across a range of integrator temperatures. | 04-07-2011 |
20110099493 | IMAGE AUXILIARY DATA SEARCHING AND DISPLAYING METHOD AND DOCUMENT CAMERA USING SUCH METHOD - An image auxiliary data searching and displaying method is used in a document camera. The document camera includes a processor and a user interface. The processor is accessible to a database. The image auxiliary data searching and displaying method includes steps of performing an image-selecting operation on an image of the to-be-displayed object via the user interface to generate a target image, processing the target image by the processor to generate a target characteristic property, searching the database by the processor according to the target characteristic property so as to generate a search result, and simultaneously displaying at least one image auxiliary data from the search result and the image of the to-be-displayed object for comparison. | 04-28-2011 |
20110221494 | PHASE-LOCKED LOOP START UP CIRCUIT - A phase-locked loop (PLL) circuit includes a voltage-controlled oscillator (VCO) having a VCO input for receiving a control voltage and a VCO output, a feedback loop between the VCO input and the VCO output, and a start-up circuit having a start-up circuit input and a start-up circuit output. The start-up circuit output is coupled to the VCO input and the start-up circuit input is coupled to the VCO output. The start-up circuit provides a voltage at its start-up circuit output during a start-up phase, which terminates after a predetermined number of feedback pulses are detected by the start-up circuit. | 09-15-2011 |
20110281829 | NOVEL COMPOSITION - This disclosure relates to a pharmaceutical composition that includes a first agent selected from the group consisting of an oxidative phosphorylation inhibitor, an ionophore, and an adenosine 5′-monophosphate-activated protein kinase (AMPK) activator; a second agent that possesses anti-inflammatory activity; and a third agent that is a serotonin metabolite. | 11-17-2011 |
20130185689 | METHOD OF AND SYSTEM FOR GENERATING OPTIMIZED SEMICONDUCTOR COMPONENT LAYOUT - A method of generating an optimized layout of semiconductor components in conformance with a set of design rules includes generating, for a unit cell including one or more semiconductor components, a plurality of configurations each of which satisfies some, but not all, of the design rules. For each configuration, it is checked whether a layout, which is a repeating pattern of the unit cell, satisfies the remaining design rules. Among the configurations which satisfy all of the design rules, the configuration providing an optimal value of a property is selected for generating the optimized layout of the semiconductor components. | 07-18-2013 |
20130187686 | FLIP-FLOP CIRCUIT, FREQUENCY DIVIDER AND FREQUENCY DIVIDING METHOD - In response to a first level of the clock signal, an inverting output of a flip-flop circuit is connected, via a non-inverting input thereof, to a first intermediate node of the flip-flop circuit and a non-inverting output of the flip-flop circuit is connected, via an inverting input thereof, to a second intermediate node of the flip-flop circuit. In response to a second level of the clock signal, the first intermediate node is connected, via a third intermediate node of the flip-flop circuit, to the non-inverting output and the second intermediate node is connected, via a fourth intermediate node of the flip-flop circuit, to the inverting output. A first cross-coupled gates arrangement of the flip-flop circuit is coupled between the first and second intermediate nodes. A second cross-coupled gates arrangement of the flip-flop circuit is coupled between the third and fourth intermediate nodes. | 07-25-2013 |
20130198710 | SEMICONDUCTOR DEVICE FEATURE DENSITY GRADIENT VERIFICATION - A method for verifying that acceptable device feature gradients and device feature disparities are present in a semiconductor device layout, is provided. The method provides for dividing a device layout into a plurality of windows and measuring or otherwise determining the device feature density within each window. The device layout includes various device regions and the method provides for comparing an average device feature density within one region to surrounding areas or other regions and also for determining gradients of device feature densities. The gradients may be monitored from within a particular device region to surrounding regions. Instructions for carrying out the method may be stored on a computer readable storage medium and executed by a processor. | 08-01-2013 |
20130292754 | CAPACITOR AND METHOD OF FORMING SAME - A device comprises a substrate having at least one active region, an insulating layer above the substrate, and an electrode in a gate electrode layer above the insulating layer, forming a metal-oxide-semiconductor (MOS) capacitor. A first contact layer is provided on the electrode, having an elongated first pattern extending in a first direction parallel to the electrode. A contact structure contacts the substrate. The contact structure has an elongated second pattern extending parallel to the first pattern. A dielectric material is provided between the first and second patterns, so that the first and second patterns and dielectric material form a side-wall capacitor connected in parallel to the MOS capacitor. | 11-07-2013 |
20130346935 | SEMICONDUCTOR DEVICE FEATURE DENSITY GRADIENT VERIFICATION - A method for verifying that acceptable device feature gradients and device feature disparities are present in a semiconductor device layout, is provided. The method provides for dividing a device layout into a plurality of windows and measuring or otherwise determining the device feature density within each window. The device layout includes various device regions and the method provides for comparing an average device feature density within one region to surrounding areas or other regions and also for determining gradients of device feature densities. The gradients may be monitored from within a particular device region to surrounding regions. Instructions for carrying out the method may be stored on a computer readable storage medium and executed by a processor. | 12-26-2013 |
20140084771 | ELECTRONIC DEVICE AND MOVABLE FIXING STRUCUTRE THEREOF - A movable fixing structure is used for causing the first casing to be combined with or detached from the second casing along a first axial direction. The movable fixing structure includes a blocking component, a locating element and a limiting element. The blocking component is movably disposed on the first casing along a second axial direction. The blocking component is used for moving between a first position and a second position. The locating element has a first locating portion and a second locating portion. The locating element is disposed on the first casing and is used for moving between a third and a fourth position along a third axial direction. The limiting element is disposed on the second casing and is used for interfering with the second locating portion on the first axial direction. | 03-27-2014 |
20140087579 | CONNECTOR COMPONENT AND PORTABLE ELECTRONIC DEVICE HAVING THEREOF - A connector component that is used for connecting a first electronic device and a second electronic device via the connector component is provided. The connector component includes a first connection component, a second connection component and fixing element. The first connection component electronically extends from the first electronic device and has a fastening portion. The second connection component is disposed in the second electronic device. The fixing element is disposed in the second electronic device and is located next to the second connection component. When the first connection component is coupled to the second connection component, the fixing element is fastened with the fixing portion, so as to fix the first connection component to the second connection component. | 03-27-2014 |
20140356052 | HOT MELT ASSEMBLY STRUCTURE AND ASSEMBLY METHOD THEREOF - A hot melt assembly structure includes a support member and an assembly member. The support member has a hot melt hole and at least one rib adjacent to the hot melt hole. The assembly member includes a main body and a hot melt body connected to the main body. The hot melt body includes a neck part and a cap part. The neck part connects the main body with the cap part. The neck part is disposed through the hot melt hole and the cap part leans against the rib. | 12-04-2014 |
Patent application number | Description | Published |
20100061646 | IMAGE PROCESSING METHOD - An image processing method is provided. The image processing method includes obtaining a least significant bit (LSB) associated with a pixel block. Further, two bits are reduced from a bit number of each of the pixels of the pixel block. Thereafter whether to carry the pixel or not is determined according to the LSB. When the LSB is 01 or 11, the carry manners of each pixel of the pixel block in two consecutive frames are asymmetric one to another. Further, under the conditions of when the LSB is 01 and 11, respectively, the carry manners of the pixels of the pixel block mutually compensate. Therefore, the display performance of a display is improved. | 03-11-2010 |
20100245340 | DRIVING DEVICE AND DRIVING METHOD FOR LIQUID CRYSTAL DISPLAY - A driving device and a driving method for an Liquid crystal display are provided. The driving device includes a memory unit, a comparator, a compensation unit, and a selector. The memory unit provides a previous image and a previous comparison result. The comparator compares a present image with the previous image and outputs a present comparison result. The compensation unit processes the present image according to the previous image to generate a plurality of processed present images. The selector selects and outputs one of the present image and the processed present images according to the previous comparison result and the present comparison result. Thereby, the space required in the memory unit is reduced and the image display quality is improved. | 09-30-2010 |
20100271277 | Slot Antenna - A slot antenna includes a dielectric substrate, and an antenna body that is formed on the dielectric substrate. The antenna body defines an open loop antenna slot that has first and second ends, and an open loop perturbation slot that extends inwardly from the open loop antenna slot, and that has first and second ends, each of which is connected to a respective one of the first and second ends of the open loop antenna slot. | 10-28-2010 |
20100302234 | METHOD OF ESTABLISHING DOF DATA OF 3D IMAGE AND SYSTEM THEREOF - A method and a system of establishing depth of field data of a 3D image, applicable to a 3D image including a first and a second visual image. The system includes a storage module, an offset calculator, and a comparator. An offset vector matrix includes data fields in the same number as that of pixels of a first visual image. An offset calculator divides a reference frame by taking an a | 12-02-2010 |
20100322535 | IMAGE TRANSFORMATION METHOD ADAPTED TO COMPUTER PROGRAM PRODUCT AND IMAGE DISPLAY DEVICE - An image transformation method for use in a computer program product and an image display device is provided. In the image transformation method, a two dimensional image and a corresponding depth image are acquired first. A motion process is performed on the two dimensional image to obtain a plurality of motion images according to the depth image and a plurality of gain values. Then, a plurality of view images are provided and an interpolation process is performed on each motion image to obtain the corresponding view image. Finally, a synthesis process is performed on the view images to obtain a three dimensional image. | 12-23-2010 |
20110090318 | Method for generating 3D image - A method for generating a 3D image utilizes a background image and an object image. A camera is used for capturing a 2D image including the background image and the object image. The object image is obtained from the 2D image according the background image. Then, an image from a first angle of view and an image from a second angle of view are generated by rendering the background image and the object image. So, the 3D image is generated by interweaving the image from the first angle of view and the image from the second angle of view. | 04-21-2011 |
20110149027 | Image processing method - An image processing method including the following steps is provided. First, a two-dimensional original image is received. Next, a plurality of depth values corresponding to the two-dimensional original image are received. Afterwards, a two-dimensional shifting image is obtained according to the depth values and a standard value. A plurality of shifting values exist between the two-dimensional shifting image and the two-dimensional original image, and the shifting values are determined by a plurality of differences between the depth values and the standard value. Thereafter, a three-dimensional image is produced according to the two-dimensional original image and the two-dimensional shifting image. | 06-23-2011 |
20110169851 | OVERDRIVING APPARATUS AND METHOD THEREOF - An overdriving apparatus including a memory unit, a position unit and an overdriving unit is provided. The memory unit stores a present frame received and outputs a previous frame stored in the memory unit. The position unit generates pixel position information according to a display control signal of the present frame. The overdriving unit determines a corresponding relationship between several pixel grey values of the present frame and several display areas of a display panel according to the pixel position information, so as to select a corresponding specific table group of each of the pixel grey values from a plurality of overdriving tables. The overdriving unit further generates an overdriving frame by looking up the corresponding specific table group of each of the pixel grey values. | 07-14-2011 |
20110187840 | THREE DIMENSIONAL DISPLAY AND METHOD THEREOF - A three dimensional display and a method thereof are provided. The display includes an image display device and a shutter glasses. The image display device receives a video signal to display a left eye frame or a right eye frame, and outputs a shutter synchronization signal according to whether the left eye frame or the right eye frame is displayed. The shutter glasses is coupled to the image display device to open a left eye glass or a right eye glass according to the shutter synchronization signal. Therefore, the display and the method prevents the left eye and the right eye from receiving an incomplete frame. | 08-04-2011 |
20120019514 | THREE DIMENSIONAL DISPLAY - A three-dimensional (3D) display including a memory unit, a signal processing unit, a display panel, a pair of shutter glasses and a timing controller is provided. In a first display period of a left eye frame period, the signal processing unit reading and outputting the first display data from the memory unit. In a third display period of a right eye frame period, the signal processing unit reading and outputting the third display data from the memory unit. In a second display period of the left eye frame period and a fourth display period of the right eye frame period, the signal processing unit outputting second display data. The timing controller controlling the shutter glass and driving the display panel according the first display data, the second display data and the third display data. As such, writing-in time and display time of frames can be increased. | 01-26-2012 |
20120019515 | DISPLAY METHOD - A display method thereof is provided. The display method includes following steps. In a first display period of a left eye frame period, first display data are read from a memory unit, and the left eye frame is displayed accordingly. In a second display period of the left eye frame period, second display data is provided and a black frame is displayed accordingly. In a third display period of a right eye frame period, third display data are read from the memory unit, and the right eye frame is displayed accordingly. In a fourth display period of the right eye frame period, the second display data is provided and the black frame is displayed accordingly. As such, writing-in time and display time of frames can be increased. | 01-26-2012 |
20130235013 | METHOD AND DEVICE FOR DRIVING AN OLED PANEL - A method for driving an OLED panel includes the following steps. An image signal is inputted to a power control unit, wherein the power control unit includes a calculator and a power control look-up table. A display loading ratio is calculated by the calculator according to the image signal, wherein the power control unit can find an emitting time ratio by the power control look-up table corresponding to the display loading ratio, the emitting time ratio can be transformed to an emitting time signal, and the emitting time signal can be inputted to the OLED panel so as to control the power consumption of the OLED panel. | 09-12-2013 |
Patent application number | Description | Published |
20100002431 | BACKLIGHT MODULE - A backlight module including a back cover, a reflector, a lamp supporter, and a number of lamps is provided. The back cover includes a number of holes, an inner face, and an outer face. The reflector is disposed on the inner face and has a number of openings. The openings expose parts of the holes. The lamp supporter has a base substrate and a number of carriers that are connected to the base substrate. The base substrate is assembled to the outer face of the back cover, and the carriers penetrate the holes of the back cover and the openings of the reflector. The lamps are disposed in the carriers, such that the lamps and the base substrate are located at two opposite sides of the back cover. | 01-07-2010 |
20100089829 | MEMBRANE CLEANING METHOD AND APPARATUS - A membrane cleaning apparatus comprising two electrode plates and a filtration unit is provided, wherein the filtration unit is disposed between the electrode plates. The filtration unit comprises a supporting plate and a membrane, and the membrane is disposed on the support plate. This invention can effectively clean the fouling on the membrane by applying an electric field in the membrane region and performing a back flushing process on the membrane. Moreover, a membrane cleaning method is also provided. | 04-15-2010 |
20100121491 | METHOD FOR TRACKING POLLUTION SOURCE IN PROCESS WATER - A method for tracking a pollution source in process water is presented. Firstly, variation curves of drain water drained from different rinsing tanks are respectively obtained, and a water quality concentration of the drain water drained to a buffer tank is detected, so as to output a water quality variation curve. Then, an analytical comparison is performed on each drain water amount variation curve and the water quality variation curve within a same time interval, so as to output an analytical result of each flow of drain water in a range exceeding a predetermined water quality standard. In this manner, the drain water that exceeds the predetermined water quality standard can be tracked in real-time according to the analytical result, thereby quickly improving the process for discharging the drain water. | 05-13-2010 |
20110051328 | ELECTRONIC DEVICE AND SLIDING HINGE THEREOF - A sliding hinge is provide, including a first member, a cover, a bottom cover movable relative to the first member, a sling plate fixed to the bottom cover, and an elastic module. The first member has a main body and a connection portion protruding therefrom, wherein the connection portion has a recess. The cover is fixed to the connection portion, wherein the cover and the first member form a space therebetween to receive the sling plate and the elastic module. The elastic module has an end received in the recess. | 03-03-2011 |
20110160042 | METHOD FOR CONSTRUCTING FRACTAL NETWORK STRUCTURE IN HYDROGEN STORAGE MATERIAL - The present invention provides a method for constructing a fractal network structure in hydrogen storage material to improve the hydrogen uptake at room temperature, the method including the following steps: providing a hydrogen storage material comprising a source and a receptor of hydrogen atoms, wherein the source is disposed above the receptor, and a chemical bridge is disposed between the source and the receptor, wherein the chemical bridge is composed of precursor material; and treating the hydrogen storage material to construct a fractal network structure of mesopores and micropores in the receptor, so as to enhance the hydrogen storage capacity of the hydrogen storage material at room temperature. | 06-30-2011 |
20120034506 | REVERSE USE BATTERY PACK DESIGN - A battery pack of a handheld device has two coupling sections configured at a side surface in the face of a battery slot of the handheld device, where the coupling sections correspond to a coupling structure of the battery slot. As the battery pack is installed in the battery slot, the coupling sections engage with the coupling structure respectively for keeping the battery pack from detaching out of the battery slot. The battery pack may also have an upturned position to be installed in a second type of battery slot of another handheld device, where the coupling sections also correspond to and engage with a coupling structure of the second battery slot and keep the battery pack from detaching out of the second battery slot. | 02-09-2012 |
20120080387 | METHOD FOR TRACKING POLLUTION SOURCE IN PROCESS WATER - A method for tracking a pollution source in process water is presented. Firstly, variation curves of drain water drained from different rinsing tanks are respectively obtained, and a water quality concentration of the drain water drained to a buffer tank is detected, so as to output a water quality variation curve. Then, an analytical comparison is performed on each drain water amount variation curve and the water quality variation curve within a same time interval, so as to output an analytical result of each flow of drain water in a range exceeding a predetermined water quality standard. In this manner, the drain water that exceeds the predetermined water quality standard can be tracked in real-time according to the analytical result, thereby quickly improving the process for discharging the drain water. | 04-05-2012 |
20130225000 | ELECTRONIC DEVICE AND AUDIO JACK THEREOF - An audio jack for receiving an audio plug includes a connection hole with a position detection portion and a first audio channel contact portion therein. When the audio plug is inserted into the connection hole to the linking position, a first audio channel connection portion of the audio plug contacts the position detection portion and the first audio channel contact portion. The position detection portion and the first audio channel contact portion respectively have a first distance and a second distance to an opening of the connection hole, wherein the second distance is smaller than the first distance. | 08-29-2013 |
20140168908 | ELECTRONIC MODULE - An electronic module includes a first circuit board having a first surface, a second circuit board having a second surface, first electronic components on the first surface, second electronic components on the second surface, a first conductive fence, and a second conductive fence. The first conductive fence encloses the first electronic components and has a first opening exposing the first electronic components. The second conductive fence encloses the second electronic components and has a second opening exposing the second electronic components. The first opening of the first conductive fence joints the second opening of the second conductive fence, such that the first electronic components and the second electronic components are surrounded by the first circuit board, the second circuit board, the first conductive fence, and the second conductive fence. At least one of the first electronic components is higher than the first conductive fence. | 06-19-2014 |
20150103480 | DOOR ASSEMBLY AND ELECTRONIC DEVICE - A door assembly disposed at an opening of a casing of an electronic device is provided. An insertion hole provided at a side of the casing close to the opening for an pin to be inserted into the casing through the insertion hole. The door assembly includes a door cap and a rejecting module. The door cap is at least partially connected to the casing and corresponding to the opening. The rejecting module is disposed in the casing and corresponding to the door cap. The rejecting module is configured to push the door cap to expose the opening when the pin is inserted into the casing through the insertion hole. An electronic device is also provided, which includes a casing and the door assembly. | 04-16-2015 |
20150116957 | ELECTRONIC ASSEMBLY AND ELECTRONIC APPARATUS - An electronic apparatus includes a rear casing, a front cover, and an electronic assembly that includes a display module, a host module, a battery module, and an expansion module. The rear casing has a front opening. The front cover is located on the front opening; the front cover and the rear casing together constitute an accommodation space. The display module is installed inside the accommodation space and stacked over the front cover. The host module is installed inside the accommodation space and stacked over the display module. The battery module is installed inside the accommodation space, stacked over the display module, and arranged side by side with the host module. The expansion module is installed inside the accommodation space and stacked over the battery module. The expansion module includes an expansion circuit board stacked over the battery module and a plurality of card connectors mounted on the expansion circuit board. | 04-30-2015 |
Patent application number | Description | Published |
20080265479 | CLAMPING APPARATUS WITH POSITION VALIDATION FUNCTION AND CLAMPING PROCESS USING SAME - An exemplary clamping apparatus includes a supporting body, a plurality of clamping units installed on the supporting body, a PWM controller, and a detection unit. Each clamping unit includes a magnet, a clamping pin, an electrical coil, and a coil core mechanically engaged with the clamping pin. The magnet is configured for holding the clamping pin at a target position. The PWM controller is configured for supplying a pulse signal to the respective electrical coil of each clamping unit and for thereby creating a magnetic force causing a corresponding coil core and a corresponding clamping pin to, synchronously, move. The detection unit is configured for detecting a back electromotive force representative of the arrival to the target position of a clamping pin and signaling the PWM controller to stop supplying the pulse signal. A clamping process utilizing the clamping apparatus is also provided. | 10-30-2008 |
20090011142 | METHOD FOR MANUFACTURING PATTERNED THIN-FILM LAYER - A method for manufacturing a patterned thin-film layer includes the steps of: providing a substrate with a plurality of banks thereon, the plurality of banks defining a plurality of spaces therein for receiving ink therein, each of the banks having a top surface; providing a UV light source for emitting UV light toward the substrate; disposing a photo mask between the UV light source and the substrate; applying UV light on the substrate through the photo mask so as to reduce surface wettability of the ink on the top surfaces of the substrate, wherein the UV light is applied in a manner that the top surfaces of the banks are blocked by the photo mask and thus free of radiation from the UV light emitted from the UV light source; applying the ink into the spaces; and curing the ink so as to form a patterned thin-film layer on the substrate. | 01-08-2009 |
20090142864 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY SUBSTRATE - A method for manufacturing a thin film transistor (TFT) array substrate needs only or even less than six mask processes for manufacturing the TFT array substrate integrated with a color filter pattern. Therefore, the manufacturing method is simpler and the manufacturing cost is reduced. In addition, the manufacturing method needs not to form a contact window in a relative thick film layer such as a planarization layer or a color filter layer, so as to connect the pixel electrode to the source/drain. Thus, the difficulty of the manufacturing process is effectively reduced. | 06-04-2009 |
20090191691 | Method for singulating semiconductor devices - Disclosed is a method for singulating semiconductor devices. The substrate has a plurality of scribe lines between the substrate units. A protecting film is provided having a patterned adhesive layer formed thereon corresponding to the scribe lines. The protecting film is attached and aligned to the substrate in a manner that the patterned adhesive layer adheres to the scribe lines without covering the substrate units. The substrate is cut by a laser beam aimed at the protecting film firstly and cut through the substrate along the peripheries of the scribe lines to singulate the substrate units. Therefore, the residue films of the protecting film on the substrate units can easily be removed. The contaminations of the substrate units by the sputtered particles and the melted protecting film during laser cutting can be eliminated. The shapes of the substrate units can be diverse. | 07-30-2009 |
20090244104 | METHOD FOR DRIVING LCD PANEL AND LCD USING THE SAME - A method for driving an LCD panel and an LCD using the same are provided. The method includes following steps. Firstly, a number of scan signals are provided sequentially, and an enabling time of the scan signals excluding the last scan signal is adjusted according to a compensation time, so as to unfix the enabling time of these scan signals. Next, the scan signals having the unfixed enabling time are sequentially provided to an LCD panel, so as to turn on a number of row pixels of the LCD panel one by one. Thereby, the entire brightness of the LCD can be uniformed by applying the method disclosed in the present invention. | 10-01-2009 |
20140285504 | CONTROLLABLE DISPLAY APPARATUS AND APPLICATIONS THEREOF - Aspects of the invention relate to a controllable display apparatus and applications thereof. The controllable display storage includes a storage having a storage space therein and an opening exposing the storage space to an outer environment, a transparent display panel disposed at the opening, configured to display information thereon, a control device disposed between a part of the storage space and the transparent display panel, where at least a part of the control device is switchable between a transparent mode and an opaque mode, such that the information displayed on the transparent display panel is viewable when the control device is in the opaque mode, and an item displayed in the storage space is viewable through the transparent display panel when the control device is in the transparent mode, and at least one light source disposed in the storage space to provide light to the storage space. | 09-25-2014 |
Patent application number | Description | Published |
20090017590 | METHOD FOR FABRICATING SONOS A MEMORY - A method for fabricating a SONOS memory is disclosed. First, a semiconductor substrate is provided and a SONOS memory cell is formed on said semiconductor substrate. A passivation layer is deposited on the SONOS memory cell and a contact pad is formed on the passivation layer. Subsequently, an ultraviolet treatment is performed and an annealing process is conducted thereafter. | 01-15-2009 |
20110250727 | METHOD OF MANUFACTURING FLASH MEMORY DEVICE - A method of manufacturing flash memory device is provided and includes the following steps. First, a substrate is provided. Then, a stacked gate structure is formed on the substrate. Subsequently, a first oxide layer is formed on the stacked gate structure. Following that, a nitride spacer is formed on the first oxide layer, wherein a nitrogen atom-introducing treatment is performed after the forming of the first oxide layer and before the forming of the nitride spacer. Accordingly, the nitrogen atom-introducing treatment of the presentation invention can improve the data retention reliability of the flash memory device. | 10-13-2011 |
20110309434 | NONVOLATILE MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - A nonvolatile memory device and a manufacturing method thereof are provided. The manufacturing method includes the following steps. First, a substrate is provided. Then, a tunneling dielectric layer is formed on the substrate, and a dummy gate is form on the tunneling dielectric layer. Subsequently, an interlayer dielectric layer is formed around the dummy gate, and the dummy gate is removed to form an opening. Following that, a charge storage layer is formed on the inner side wall of the opening, and the charge storage layer covers the tunneling dielectric layer. Moreover, an inter-gate dielectric layer is formed on the charge storage layer, and a metal gate is formed on the inter-gate dielectric layer. Accordingly, a stacked gate structure of the nonvolatile memory device includes the tunneling dielectric layer, the charge storage layer, the inter-gate dielectric layer, and the metal gate. | 12-22-2011 |
20140175531 | NON-VOLATILE MEMORY STRUCTURE AND MANUFACTURING METHOD THEREOF - A method for manufacturing a non-volatile memory structure includes providing a substrate having a gate structure, performing a first oxidation process to form a first SiO layer at least covering a bottom corner of the conductive layer, performing a first etching process to remove the first SiO layer and a portion of the dielectric layer to form a cavity, performing a second oxidation process to form a second SiO layer covering sidewalls of the cavity and a third SiO layer covering a surface of the substrate, forming a first SiN layer filling in the cavity and covering the gate structure on the substrate, and removing a portion of the first SiN layer to form a SiN structure including a foot portion filling in the cavity and an erection portion upwardly extended from the foot portion, and the erection portion covering sidewalls of the gate structure. | 06-26-2014 |
20140197472 | NON-VOLATILE MEMORY STRUCTURE AND MANUFACTURING METHOD THEREOF - A method for manufacturing a non-volatile memory structure includes providing a substrate having a memory region and a logic region defined thereon, masking the logic region while forming at least a first gate in the memory region, forming an oxide-nitride-oxide (ONO) structure under the first gate, forming an oxide structure covering the ONO structure on the substrate, masking the memory region while forming a second gate in the logic region, and forming a first spacer on sidewalls of the first gate and a second spacer on sidewalls of the second gate simultaneously. | 07-17-2014 |
20140361359 | SONOS DEVICE AND METHOD FOR FABRICATING THE SAME - A silicon-oxide-nitride-oxide-silicon (SONOS) device is disclosed. The SONOS device includes a substrate; a first oxide layer on the substrate; a silicon-rich trapping layer on the first oxide layer; a nitrogen-containing layer on the silicon-rich trapping layer; a silicon-rich oxide layer on the nitrogen-containing layer; and a polysilicon layer on the silicon-rich oxide layer. | 12-11-2014 |
20150056775 | NON-VOLATILE MEMORY STRUCTURE AND MANUFACTURING METHOD THEREOF - A method for manufacturing a non-volatile memory structure includes providing a substrate having a gate structure, performing a first oxidation process to form a first SiO layer at least covering a bottom corner of the conductive layer, performing a first etching process to remove the first SiO layer and a portion of the dielectric layer to form a cavity, performing a second oxidation process to form a second SiO layer covering sidewalls of the cavity and a third SiO layer covering a surface of the substrate, forming a first SiN layer filling in the cavity and covering the gate structure on the substrate, and removing a portion of the first SiN layer to form a SiN structure including a foot portion filling in the cavity and an erection portion upwardly extended from the foot portion, and the erection portion covering sidewalls of the gate structure. | 02-26-2015 |
Patent application number | Description | Published |
20120018795 | NON-VOLATILE MEMORY AND MANUFACTURING METHOD THEREOF - A manufacturing method of a non-volatile memory is disclosed. A gate structure is formed on a substrate and includes a gate dielectric layer and a gate conductive layer. The gate dielectric layer is partly removed, thereby a symmetrical opening is formed among the gate conductive layer, the substrate and the gate dielectric layer, and a cavity is formed on end sides of the gate dielectric layer. A first oxide layer is formed on a sidewall and bottom of the gate conductive layer, and a second oxide layer is formed on a surface of the substrate. A nitride material layer is formed covering the gate structure, the first and second oxide layer and the substrate and filling the opening. An etching process is performed to partly remove the nitride material layer, thereby a nitride layer is formed on a sidewall of the gate conductive layer and extending into the opening. | 01-26-2012 |
20130248976 | NON-VOLATILE MEMORY - A non-volatile memory includes a substrate, a gate dielectric layer, a gate conductive layer, a nitride layer, a spacer, a first oxide layer, and a second oxide layer. The gate conductive layer, substrate and gate dielectric layer cooperatively constitute a symmetrical opening thereamong. The nitride layer has an L-shape and formed with a vertical part extending along a sidewall of the gate conductive layer and a horizontal part extending into the opening, wherein the vertical part and the horizontal part are formed as an integral structure and a height of the vertical part is below a top surface of the gate conductive layer. The spacer is disposed on the substrate and the nitride layer. The first oxide layer is disposed among the gate conductive layer, the nitride layer and the gate dielectric layer. The second oxide layer is disposed among the gate dielectric layer, the nitride layer and the substrate. | 09-26-2013 |
20130260524 | METHOD FOR MANUFACTURING NON-VOLATILE MEMORY - A method for manufacturing a non-volatile memory is disclosed. A gate structure is formed on a substrate and includes a gate dielectric layer and a gate conductive layer. The gate dielectric layer is partly removed, thereby a symmetrical opening is formed among the gate conductive layer, the substrate and the gate dielectric layer, and a cavity is formed on end sides of the gate dielectric layer. A first oxide layer is formed on a sidewall and bottom of the gate conductive layer, and a second oxide layer is formed on a surface of the substrate. A nitride material layer is formed covering the gate structure, the first and second oxide layer and the substrate and filling the opening. An etching process is performed to partly remove the nitride material layer, thereby forming a nitride layer on a sidewall of the gate conductive layer and extending into the opening. | 10-03-2013 |
20140092689 | METHOD FOR PROGRAMMING NON-VOLATILE MEMORY CELL, NON-VOLATILE MEMORY ARRAY AND NON-VOLATILE MEMORY APPARATUS - A method for programming a non-volatile memory cell is described. The memory cell includes a substrate, a gate over the substrate, a charge-trapping structure at least between the substrate and the gate, and first and second S/D regions in the substrate beside the gate. The method includes performing a channel-initiated secondary electron (CHISEL) injection process to inject electrons to the charge-trapping structure. | 04-03-2014 |
20140198574 | NONVOLATILE MEMORY AND MANIPULATING METHOD THEREOF - A manipulating method of a nonvolatile memory is provided and comprises following steps. The nonvolatile memory having a plurality of memory cell is provided. Two adjacent memory cells correspond to one bit and comprise a substrate, a first and another first doping regions, a second doping region, a charge trapping layer, a control gate, a first bit line, a source line and a second bit line different from the first bit line. A first and a second channel are formed. The charge trapping layer is disposed on the first and the second channels. The two adjacent memory cells are programmed by following steps. A first positive and negative voltages are applied to the control gate between the first and the second doping regions and the control gate between the second and the another first doping regions, respectively. A first voltage is applied to the source line. | 07-17-2014 |
20140340949 | POWER CONVERTER AND POWER FACTOR CORRECTOR THEREOF - A power converter includes a rectifier and a power factor corrector. The rectifier is to be coupled to an alternating current power source and is configured to output a rectified signal. The power factor corrector includes a correcting circuit and a control circuit. The correcting circuit receives the rectified signal and is configured to generate an output voltage based on the rectified signal and a driving signal. The control circuit is configured to generate a first to-be-compared signal based on the rectified signal, to generate a second to-be-compared signal based on the output voltage, to compare the first and second to-be-compared signals, and to generate the driving signal based on a result of comparison performed thereby. | 11-20-2014 |
20150070951 | MULTIPLIER-DIVIDER CIRCUIT AND AC-TO-DC POWER CONVERTING APPARATUS INCORPORATING THE SAME - An AC-to-DC power converting apparatus includes a power factor correction circuit generating a DC output voltage based on a rectified voltage obtained through rectifying an AC input voltage and on a PWM signal generated based on an adjustment current and a predetermined ramp signal. A multiplier-divider circuit includes: a ramp generating unit generating a ramp signal based on a clock signal and on a first detection voltage associated with the rectified voltage; a control unit generating a control signal based on the clock signal, the ramp signal, and a detection voltage generated based on the DC output voltage; and an output unit generating an adjustment signal based on an input signal associated with the rectified voltage and the control signal. | 03-12-2015 |
Patent application number | Description | Published |
20120162191 | DRIVING DEVICE AND DRIVING METHOD FOR LIQUID CRYSTAL DISPLAY - A driving device and a driving method for a liquid crystal display are provided. The driving device includes a memory unit, a comparator, a compensation unit, and a selector. The memory unit provides a storage image and a previous comparison result. The comparator compares a present image with the storage image and outputs a present comparison result. The compensation unit processes the present image according to the storage image to generate a plurality of processed present images. The selector selects and outputs one of the present image and the processed present images according to the previous comparison result and the present comparison result. Thereby, the space required in the memory unit is reduced and the image display quality is improved. | 06-28-2012 |
20130076785 | ANTI-PEEPING DISPLAY SYSTEM - An anti-peeping display system comprises an image processor for receiving a normal image and generating a mosaic image according to the normal image; and a display module which is coupled to the image processor for receiving the normal image and the mosaic image, the display module displaying the normal image during a first frame period and displaying the mosaic image during a second frame period that is adjacent to the first frame period. A user only by wearing a pair of special glasses can view the normal images. The present invention can make a display device to equip with an anti-peeping function. | 03-28-2013 |
20130147852 | Three-Dimensional Image Display Device - A three-dimensional image display device is provided. The three-dimensional image display device includes a display panel and a plurality of light control units. The display panel includes a pixel array composed of a plurality of pixels. Each of the pixels consists of a plurality of sub-pixels. The sub-pixel has an aspect ratio of about 1:1. A symmetry axis of each of the light control units is substantially parallel to a diagonal of each of the sub-pixels. | 06-13-2013 |
20130176314 | IMAGE PROCESSING APPARATUS AND IMAGE PROCESSING METHOD - An image processing apparatus and an image processing method are provided. When a display apparatus is in the 3D display mode, a mode-switching unit adjusts the way to generate a vertical-count-value by counting every two rows of pixels and outputs the adjusted vertical-count-value. A dither unit outputs a carry value corresponding to the adjusted vertical-count-value. An adding unit adds the carry value and the surplus pixel bit together. | 07-11-2013 |
20130187901 | CIRCUIT FOR OUTPUTTING OVERDRIVE VOLTAGES OF A LIQUID CRYSTAL PANEL AND METHOD THEREOF - A circuit for outputting overdrive voltages of a liquid crystal panel includes a memory unit and an overdrive unit. The overdrive unit includes a first lookup table, a second lookup table, and a selector. The memory unit stores a plurality of second pixel voltages corresponding to a second frame displayed by the liquid crystal panel and outputs a plurality of first pixel voltages corresponding to a first frame displayed by the liquid crystal panel stored in the memory unit. The overdrive unit looks up the first lookup table and the second lookup table to generate a first overdrive voltage and a second overdrive voltage according to each first pixel voltage and a corresponding second pixel voltage. The selector outputs the first overdrive voltage or the second overdrive voltage according to a polarity signal and a frame signal. | 07-25-2013 |
20130243305 | IMAGE PROCESSING METHOD FOR STEREOSCOPIC IMAGES - An image processing method for stereoscopic images includes providing image data of a first visual angle image and image data of a second visual angle image; performing first image processing to the image data of the second visual angle image according to performance of a first display parameter of the image data of the first visual angle image on a display panel, for adjusting performance of the first display parameter of the image data of the second visual angle image on the display panel to correspond to the performance of the first display parameter of the image data of the first visual image on the display panel; and displaying the first visual angle image and the second visual angle image after the first image processing. | 09-19-2013 |
20130271512 | THREE-DIMENSIONAL DISPLAY DEVICE AND METHOD FOR DRIVING THE SAME - Disclosed are a three-dimensional display device and a method for driving the same. The three-dimensional display device is driven with a two-frame inversion and includes a display panel, a timing controller, a gamma voltage generator, and at least one source driver circuit. The display panel has a plurality of pixels. The timing controller of the present invention provides two different groups of gamma voltages for the gamma voltage generator, so that charging conditions of each of the pixels tend to be the same when switching frames. | 10-17-2013 |
20150016706 | BANKNOTE COUNTING AND AUTHENTICATING MACHINE AND METHOD THEREOF - A machine includes an electronic control module for conducting authentication process of a banknote and transiting/receiving every module signal to control operation of a user interface; an image control module for activating an image sensor to read and authenticate the banknote upon receipt of a banknote input signal from the electronic control module, thereby resulting in an authenticated result and transmitting back to the electronic control module; a motor control module for causing a corresponding motor operation of a motor upon receipt of a command signal from the electronic control module; and a counterfeit control module for processing a banknote data via a reading head, a thickness detector and an infrared scanner upon receipt of another signal from the electronic control module and generating, transmitting a banknote result back to the electronic control module for further processing. | 01-15-2015 |
20150061514 | LIGHT EMITTING DIODE DRIVING DEVICE - A LED driving device is electrically connected to a voltage power source and a plurality of LED strings. The LED driving device includes a constant-voltage outputting module, a rectifying unit, and a constant-current controlling unit. The constant-voltage outputting module is electrically connected to the voltage power source and includes a switching unit, a resonant unit, a converting unit, and a power-balancing unit. The resonant unit is electrically connected to the switching unit. The converting unit includes a primary winding, two first secondary windings, and a second secondary winding. The primary winding is electrically connected to the resonant unit. The power-balancing unit includes a balancing converter including two balancing windings electrically connected to the first secondary windings. The rectifying unit is electrically connected to the power-balancing unit and the LED strings, the constant-current controlling unit is electrically connected to the second secondary winding and the LED strings. | 03-05-2015 |
Patent application number | Description | Published |
20120268357 | DISPLAY PANEL - The invention provides a display panel. The display panel includes a plurality of pixels. Each pixel includes a first color sub-pixel, a second color sub-pixel, a third color sub-pixel, and a fourth color sub-pixel, and the first color sub-pixel consists of a light region and a dark region. | 10-25-2012 |
20130265516 | ARRAY SUBSTRATE, LIQUID CRYSTAL DISPLAY DEVICE HAVING THE SAME AND METHOD FOR MANUFACTURING THE SAME THEREOF - An array substrate, comprising a substrate, a multi-layer electrode and a switch element, is provided. The multi-layer electrode is disposed on the substrate and comprises an electric conductive layer and a first etch-stop layer. The electric conductive layer covers the first etch-stop layer. The switch element is disposed on the substrate and electrically connected to the multi-layer electrode, and has a second etch-stop layer. | 10-10-2013 |
20130271718 | DISPLAY DEVICE - A display device including a first substrate, a second substrate, and a liquid crystal layer is provided. The liquid crystal layer is disposed between the first substrate and the second substrate. The liquid crystal layer includes a liquid crystal mixture and a nano carbon material. The nano carbon material is distributed in the liquid crystal mixture. | 10-17-2013 |
20130278871 | DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF - A display device having a plurality of pixel units and a manufacturing method of the same are provided. The display device includes a first substrate assembly, a second substrate assembly, a liquid crystal mixture, and a pillared polymer network. The first substrate assembly includes a first substrate and a first electrode layer disposed on the first substrate. The second substrate assembly includes a second substrate. The liquid crystal mixture is disposed between the first and second substrate assemblies. The pillared polymer network is disposed between the first and second substrate assemblies and has a first end and second end. The first end abuts against the first substrate assembly and is disposed correspondingly to the first electrode layer. The second end abuts against the second substrate assembly. Each of the pixel units includes the pillared polymer network. | 10-24-2013 |
20130335692 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display panel including a first substrate, a second substrate, and a liquid crystal mixture is provided. The first substrate includes a first base and a first electrode layer. The first base has a plurality of sub pixels each having at least one first asymmetric protrusion. The first electrode layer is disposed on the first asymmetric protrusion. The second substrate is assembled to the first substrate. The liquid crystal mixture is disposed between the first asymmetric protrusion and the second substrate. | 12-19-2013 |
20130342800 | SUBSTRATE AND DISPLAY DEVICE HAVING THE SAME - A display device includes a first base substrate, a second base substrate, a liquid crystal layer, a conductive protrusion structure and an electrode structure. The second base substrate is disposed opposite to the first base substrate. The liquid crystal layer is disposed between the first and second base substrates. The conductive protrusion structure is disposed on one of the first and second base substrates. The electrode structure is at least disposed on the first or second base substrate having the conductive protrusion structure. | 12-26-2013 |
20140022286 | DISPLAY DEVICE OPERATING IN 2D AND 3D DISPLAY MODES AND METHOD FOR DRIVING THE SAME - A display device includes a first scan line, a second scan line, a third scan line, a data line, a pixel, a low color-shifting circuit, and a black zone generation circuit. In the low color-shifting circuit, a low color-shifting switch receives a third scan signal from the third scan line to selectively couple a compensating capacitor to the second sub-pixel electrode. The black zone generation circuit receives a black zone generation signal to selectively couple either the first sub-pixel electrode or the second sub-pixel electrode to a common node such that either the first sub-pixel or the second sub-pixel becomes a black zone. | 01-23-2014 |
20140028960 | LIQUID-CRYSTAL PANEL AND THE UV CURING METHOD THEREOF - This disclosure provides a LC panel and the UV curing method therein for the LC curing treatment. The LC panel includes: a first substrate with a plurality of protrusion electrodes formed thereon; a second substrate disposed on the first substrate; a LC layer interposed between the first and second substrates; and a deflecting structure disposed between the first and second substrates and configured for changing optical paths of UV light; wherein the UV light passes through the areas between the neighboring protrusion electrodes, and the deflecting structure is located in the optical paths of the UV light. | 01-30-2014 |
20140043567 | BLUE PHASE LIQUID CRYSTAL DISPLAY PANEL AND ELECTRODE MANUFACTURING METHOD THEREOF - A blue phase liquid crystal (BPLC) display panel includes a first substrate, a second substrate, a protrusion, a BPLC, and a driving electrode. The protrusion is disposed on the first substrate. The BPLC is disposed between the first and second substrates. The driving electrode covers the protrusion. A vertical distance from the protrusion's bottom to one end portion of the driving electrode is larger than zero and less than or equal to four fifths of a height of the protrusion. Thereby, the production yield of the BPLC display panel can be increased. | 02-13-2014 |
20140063423 | Liquid crystal display panel - A liquid crystal display panel is disclosed, which comprises: a first substrate; a second substrate opposite to the first substrate; an optically isotropic liquid crystal layer disposed between the first substrate and the second substrate; and a protruding electrode layer composed of a polymer conductive material and disposed on the first substrate. Besides, when a protruding part is composed of a non-conductive organic material, the liquid crystal display panel further comprises: an electrode layer disposed on the protruding electrode layer; and a submicron structure layer, a multilayer film, or a micro-reflection layer is disposed between the protruding electrode layer and the first substrate. | 03-06-2014 |
20140176892 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display panel including a first substrate, a second substrate, a liquid crystal layer and an electrode structure is provided. The liquid crystal layer is located between the first substrate and the second substrate. The electrode structure is disposed on the first substrate and comprises a first and a second sub-electrodes. The first and the second sub-electrodes are separated from each other and respectively comprises first and second branch portions. The first branch portion comprises a plurality of first branch electrodes. Two adjacent first branch electrodes are substantially parallel to each other and separated from each other by a first interval. The second branch portion comprises a plurality of second branch electrodes. Two adjacent second branch electrodes are substantially parallel to each other and separated from each other by a second interval. | 06-26-2014 |
20140232976 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display (LCD) panel is provided. The LCD panel includes: a liquid crystal layer, a first data line, a scan line, a pixel electrode, and a first thin film transistor (TFT). The liquid crystal layer includes a high-dielectric-constant liquid crystal material, and the pixel electrode drives the liquid crystal layer. The first TFT includes a first electrode and a second electrode. The first electrode, electrically connected to the pixel electrode, has at least two first branch electrodes. The second electrode, electrically connected to the first data line, has at least one second branch electrode. A first overlapped area of the first electrode and the scan line is greater than a second overlapped area of the second electrode and the scan line, and the second branch electrode is disposed between two of the first branch electrodes. | 08-21-2014 |
20140240628 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display (LCD) panel comprising a signal line, a first dielectric layer, a liquid crystal layer, a pixel electrode, and a thin film transistor (TFT) is provided. The first dielectric layer with a first permittivity ε | 08-28-2014 |
20140247418 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display panel comprise a first substrate, a second substrate and a electrode structure. The electrode structure is disposed on the first substrate. The electrode structure further comprises a first sub-electrode having a first stem electrode with a first end edge and a first branch electrode nearest the first end edge, and a second sub-electrode having a second stem electrode with a second end edge and a second branch electrode nearest the second end edge. The first sub-electrode and the second sub-electrode are adjacent to each other, and the first end edge are adjacent to the second end edge. A first distance between the first end edge and the first branch electrode is different from a second distance between the second end edge and the second branch electrode. | 09-04-2014 |
20140247419 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display panel comprise a first substrate, a second substrate and a electrode structure. The electrode structure is disposed on the first substrate and defining a pixel. The electrode structure further comprises a first sub-electrode having a first stem electrode with a first end edge and a first branch electrode nearest the first end edge, and a second sub-electrode having a second stem electrode with a second end edge and a second branch electrode nearest the second end edge. The first sub-electrode and the second sub-electrode are adjacent to each other, and the first end edge and the second end edge are adjacent to the same side of the pixel. A first distance between the first end edge and the first branch electrode is different from a second distance between the second end edge and the second branch electrode. | 09-04-2014 |
20150077693 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display panel comprise a first substrate, a second substrate and a electrode structure. The electrode structure is disposed on the first substrate. The electrode structure further comprises a first sub-electrode having a first stem electrode with a first end edge and a first branch electrode nearest the first end edge, and a second sub-electrode having a second stem electrode with a second end edge and a second branch electrode nearest the second end edge. The first sub-electrode and the second sub-electrode are adjacent to each other, and the first end edge are adjacent to the second end edge. A first distance between the first end edge and the first branch electrode is different from a second distance between the second end edge and the second branch electrode. | 03-19-2015 |
20150085224 | EMISSIVE DISPLAY - A display comprises a first substrate, a second substrate opposite to the first substrate, an electrode structure, and a light-emitting combination (LEC) layer positioned between the first and second substrates, wherein the LEC layer comprises a light emitting material and a LC material, and a horizontal or vertical electric field is generated when a voltage is applied to that electrode structure. One of exemplified displays has an electrode structure comprising a first electrode and a second electrode oppositely disposed, and the LEC layer is positioned between the first and second electrodes, wherein a vertical electric field is generated when a voltage is applied. The device can further comprise an electron injection layer and a hole transport layer. Another exemplified display has an electrode structure arranged on one side of the first substrate, and a horizontal electric field is generated when a voltage is applied. | 03-26-2015 |
Patent application number | Description | Published |
20130107185 | ELECTRODE PATTERN, PIXEL LAYOUT METHOD, AND LIQUID CRYSTAL DISPLAY | 05-02-2013 |
20130141675 | LIQUID CRYSTAL DISPLAY DEVICE - A liquid crystal display device is provided. The liquid crystal display device includes a first substrate having a pixel unit, wherein the pixel unit has a pixel electrode. A second substrate is disposed opposite to the first substrate, having an opposite electrode. A first polarizer is disposed under the first substrate. A second polarizer is disposed under the second substrate, wherein a polarization axis of the second polarizer is vertical to that of the first polarizer. A liquid crystal layer with chiral dopants having negative dispersion characteristics is disposed between the first and second substrates. | 06-06-2013 |
20130154911 | DISPLAY DEVICE AND ELECTRONIC DEVICE - A display device includes a first, second and third sub-pixel areas allowing light of a first, second and third main wavelengths transmitting therethrough, respectively. The first, second and third sub-pixel areas have first, second and third ratios of first, second and third electrode widths to first, second and third electrode slits of first, second and third interdigitated electrodes, respectively. When the first main wavelength is larger than the second main wavelength and the second main wavelength is larger than the third main wavelength, a difference between any two of the first, second and third ratios is less than 0.2. A first electrode slit of the first interdigitated electrode is smaller than the second electrode slit of the second interdigitated electrode, and the second electrode slit of the second interdigitated electrode is smaller than the third electrode slit of the third interdigitated electrode. | 06-20-2013 |
20130265535 | LIQUID CRYSTAL DISPLAY PANEL AND PIXEL ELECTRODE STRUCTURE THEREOF - A pixel electrode structure including a first electrode and a second electrode is provided. The first electrode has a first stripe electrode extended along a first direction and pleural first branch electrodes connected to the first strip electrode. The first branch electrodes include pleural first branch domain electrodes extended along a second direction and pleural second branch domain electrodes extended along a third direction substantially perpendicular to the second direction. The second electrode has a second stripe electrode extended along the first direction and pleural second branch electrodes connected to the second stripe electrode. The second branch electrodes include pleural third branch domain electrodes extended along the second direction and pleural fourth branch domain electrodes extended along the third direction. The first and the third branch domain electrodes are alternated to each other. The second and the fourth branch domain electrodes are alternated to each other. | 10-10-2013 |
20130271681 | PIXEL STRUCTURE AND LIQUID CRYSTAL DISPLAY STRUCTURE USING THE SAME - A pixel structure including a substrate, a first dielectric layer and a second dielectric layer is provided. A signal line and a pixel electrode are disposed on the substrate. The first dielectric layer covers the signal line and has a first capacitance. The second dielectric layer is disposed on the substrate, and covers the pixel electrode. The second dielectric layer has a second capacitance larger than the first capacitance. | 10-17-2013 |
20130278869 | DISPLAY DEVICE - A display device comprising a first substrate, a second substrate, a blue phase liquid crystal layer and an optical element is provided. The first substrate has a display area and is opposite to the second substrate. The blue phase liquid crystal layer is disposed between the first and the second substrate and reflects a light selectively. The spectrum peak of the light is within an intersection interval corresponding to a cross point of x_bar, y_bar and z_bar stimulus value spectrums, and the intersection interval has a wavelength range from 480 nm to 520 nm. The optical element has at least one function for adjusting a phase of the light or absorbing the light. | 10-24-2013 |
20130307836 | DISPLAY DEVICES AND PIXEL DRIVING METHODS THEREFOR - A display device is provided. The display device includes a pixel driving circuit including a liquid crystal capacitor coupled to a first node, a first storage capacitor, and a first voltage control unit. The first storage capacitor has a first terminal directly connected to a second node and a second terminal coupled to a common electrode. The first voltage control unit has first and second output terminals coupled to the first and second nodes, respectively. In a first period, the first voltage control unit feeds a first data voltage to the first node according to a first scan signal. In a second period later than the first period, the first voltage control unit feeds the first data voltage to the second node according to a second scan signal, such that a voltage level at the first node is changed to a first pixel voltage from the first data voltage. | 11-21-2013 |
20150309378 | PIXEL STRUCTURE AND LIQUID CRYSTAL DISPLAY STRUCTURE USING THE SAME - A pixel structure substrate including a substrate, a first dielectric layer and a second dielectric layer is provided. A data line and a first electrode are disposed on the substrate. The first dielectric layer directly covers the data line. The second dielectric layer covers the first electrode and the first dielectric layer. A thickness of the second dielectric layer is smaller than a thickness of the first dielectric layer, and the following equation is satisfied | 10-29-2015 |