Jung Hyuk
Jung Hyuk Jung, Suwon-Si KR
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20150270053 | CHIP ELECTRONIC COMPONENT AND MANUFACTURING METHOD THEREOF - There are provided a chip electronic component and a manufacturing method thereof, and more particularly, a chip electronic component having an internal coil structure capable of preventing the occurrence of short-circuits between coil portions and having a high aspect ratio (AR) by increasing a thickness of a coil as compared to a width of the coil, and a manufacturing method thereof. | 09-24-2015 |
Jung Hyuk Lee, Yongin-Si KR
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20120314478 | RESISTIVE MEMORY DEVICE AND SENSING MARGIN TRIMMING METHOD THEREOF - A resistive memory device and a sensing margin trimming method are provided. The resistive memory device includes a memory cell array and a trimming circuit. The memory cell array has a plurality of resistive memory cells. The trimming circuit generates a trimming signal according to a characteristic distribution shift value of the resistive memory cells. With the inventive concept, although a characteristic distribution of memory cells is varied, an erroneous read operation is minimized or reduced by securing a sensing margin stably. Accordingly, a fabrication yield of the resistive memory device is bettered. | 12-13-2012 |
20130051123 | RESISTANCE CHANGE MEMORY DEVICE AND CURRENT TRIMMING METHOD THEREOF - A resistance change memory device includes an array of resistance change memory cells, and a writing circuit configured to reset a selected memory cell to a high resistance state by supplying a RESET current to the selected memory cell in the array of resistance change memory cells in a program operation mode, wherein a level of the RESET current depends on a distribution of initial RESET currents for the array of resistance change memory cells. | 02-28-2013 |
20140056052 | RESISTIVE MEMORY DEVICE PERFORMING SELECTIVE REFRESH AND METHOD OF REFRESHING RESISTIVE MEMORY DEVICE - A method of operating a resistive memory device, includes; performing a data retention time test on a resistive memory cell array of a memory chip, determining a number of bad memory blocks of the resistive memory cell array on the basis of the data retention time test, determining on the basis of the number of bad memory blocks whether the memory chip is a refresh memory chip or a good memory chip, and upon determining that the memory chip is a refresh memory chip, performing at least one refresh operation on at least one bad memory block of the refresh memory chip. | 02-27-2014 |
20140119108 | MEMORY SYSTEM INCLUDING NONVOLATILE MEMORY AND METHOD OF OPERATING NONVOLATILE MEMORY - A memory system, and an operation method of a nonvolatile memory, include programming memory cells using a normal program pulse, reading out a first set of data from the memory cells, detecting failed cells based on the first set of data, storing information about the failed cells in a buffer, and reprogramming the failed cells using a reinforced program pulse in an idle state based on the information stored in the buffer. | 05-01-2014 |
Jung Hyuk Lee, Suwon-Si KR
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20140047869 | DRUM WASHING MACHINE - A drum washing machine and a control method thereof. The drum washing machine includes a cabinet, a tub including a first tub part and a second tub part, a drum, an inlet provided at one side of the second tub part and supplying condensed water, and at least one flow path provided on one surface from among the inner surfaces of the second tub part opposite the drum and guiding flow of the condensed water to increase a contact area between the condensed water supplied from the inlet and the second tub part. The drum washing machine improves the structure of the tub to effectively inject condensed water, and may thus increase condensing efficiency. Further, the drum washing machine improves the structures of the tub and the drying duct, and may thus prevent accumulation of lint and lowering of performance of the drum washing machine. | 02-20-2014 |
Jung Hyuk Yoon, Anyang KR
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20110317497 | NON-VOLATILE MEMORY DEVICE - A non-volatile memory device for measuring a read current of a unit cell is disclosed. The non-volatile memory device includes a unit cell configured to read or write data, a column switching unit configured to select the unit cell in response to a column selection signal, a sense amplifier controlled by a sense-amplifier enable signal, configured to sense and amplify data that is received from the unit cell through the column switching unit, a first latch unit configured to latch the sense-amplifier enable signal for a predetermined time when a test code signal received from an external part is activated, a column controller configured to output a latch control signal in response to a combination of a column switch-off signal and a column control signal, and a second latch unit configured to control whether or not the column selection signal is latched in response to an activation state of the latch control signal. | 12-29-2011 |
Jung Hyuk Yoon, Icheon-Si Gyeonggi-Do KR
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20140301148 | SEMICONDUCTOR MEMORY APPARATUS AND OPERATION METHOD USING THE SAME - A semiconductor memory apparatus includes a command processing block configured to generate a voltage generation start signal, a first write control signal, a second write control signal, a read signal, and an operation signal in response to a first control signal and a second control signal in a write operation, and a memory control block configured to electrically couple a memory block, which stores data, to a sense amplifier or apply a predetermined voltage to the memory block in response to the voltage generation start signal, the first write control signal, the second write control signal, the read signal, and the operation signal. | 10-09-2014 |
20150179231 | SEMICONDUCTOR MEMORY APPARATUS - A semiconductor memory apparatus may include a program voltage generation block configured to generate a program voltage in response to program codes; a precharge voltage generation block configured to generate a precharge voltage in response to the program codes and addresses; and a main bit line configured to be applied with the program voltage and the precharge voltage. | 06-25-2015 |
20160078908 | SEMICONDUCTOR MEMORY APPARATUS AND OPERATION METHOD USING THE SAME - A semiconductor memory apparatus includes a command processing block configured to generate a voltage generation start signal, a first write control signal, a second write control signal, a read signal, and an operation signal in response to a first control signal and a second control signal in a write operation, and a memory control block configured to electrically couple a memory block, which stores data, to a sense amplifier or apply a predetermined voltage to the memory block in response to the voltage generation start signal, the first write control signal, the second write control signal, the read signal, and the operation signal. | 03-17-2016 |
Jung-Hyuk Ahn, Seoul KR
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20150136204 | SOLAR CELL STRUCTURE FOR THERMAL INSULATION AND METHOD FOR MANUFACTURING THE SAME - Disclosed is a solar cell structure for thermal insulation, which includes an intermediate support glass plate, a solar cell structure (A) provided at one side based on the support glass plate, and a vacuum glass panel structure (B) provided at the other side based on the support glass plate. | 05-21-2015 |
Jung-Hyuk Kim, Suwon-Si KR
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20160085497 | DISPLAY APPARATUS CONSTITUTING DISPLAY SYSTEM INCLUDING PLURALITY OF DISPLAY APPARATUSES, CONTENT DISPLAY METHOD THEREOF, AND DISPLAY SYSTEM INCLUDING PLURALITY OF DISPLAY APPARATUSES - A content display method for a display system including a plurality of display apparatuses is provided. The content display method includes transmitting first content pre-stored in a first display apparatus of the plurality of display apparatuses to a second display apparatus of the plurality of display apparatuses in order to display the first content on the second display apparatus, receiving second content stored in the another display apparatus, the second content being different from the first content, and displaying the pre-stored first content or the received second content based on an arrangement position of the plurality of display apparatuses. | 03-24-2016 |
Jung-Hyuk Kwon, Seoul KR
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20110261380 | Image forming apparatus and method for providing user interface screen of image forming apparatus - An image forming apparatus and a method for providing a user interface (UI) screen of the image forming apparatus are provided. The image forming apparatus receives a UI screen to be displayed on a display unit thereof from a web server that is connected to a web browser of the image forming apparatus. In some embodiments, a UI screen corresponding to screen information of the display unit and apparatus information of the image forming apparatus is received from the web server and displayed. | 10-27-2011 |
Jung-Hyuk Lee, Gyeonggi-Do KR
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20090246543 | MULTIFERROIC LAYER, STRUCTURE INCLUDING THE LAYER, AND METHODS OF FORMING THE LAYER AND THE STRUCTURE - The present invention relates to forming the material represented by the following formula (1) into a layer having hexagonal crystalline structure, which is different from the orthorhombic crystalline structure of the material in bulk phase, so that the material can be used more effectively in various fields requiring multiferroic properties by obtaining multiferroic properties enhanced than the conventional multiferroic materials. RMnO | 10-01-2009 |
20090285008 | MEMORY DEVICES WITH SELECTIVE PRE-WRITE VERIFICATION AND METHODS OF OPERATION THEREOF - A number of read cycles applied to a selected memory location of a memory device, such as a variable-resistance memory device, is monitored. Write data to be written to the selected memory location is received. Selective pre-write verifying and writing of the received write data to the selected memory location occurs based on the monitored number of read cycles. Selectively pre-write verifying and writing of the received write data may include, for example, writing received write data to the selected memory cell region without pre-write verification responsive to the monitored number of read cycles being greater than a predetermined number of read cycles | 11-19-2009 |
Jung-Hyuk Park, Suwon-Si KR
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20160034836 | METHOD AND SYSTEM FOR PROCESSING DATA FROM EQUIPMENT - Systems and methods of processing equipment information obtained from a plurality of equipment includes obtaining equipment information from the plurality of equipment; standardizing the equipment information such that the equipment information conforms to a desired format, the standardizing including generating practical information and associated information based on the standardized equipment information, the practical information indicating an operation state of each of the plurality of equipment, and the associated information being information about the practical information; aggregating the standardized equipment information the aggregating being based on a prediction of an amount of equipment information to be produced during a desired period of time; objectifying the aggregated equipment information to generate analysis information; and performing a reverse schedule operation to reconfigure the analysis information into a unit schedule based on an information classification table. | 02-04-2016 |