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Joseph A. Iadanza
HINESBURG, VT US
1. 20090160691 Digital to Analog Converter Having Fastpaths 06-25-20092. 20090160689 HIGH SPEED RESISTOR-BASED DIGITAL-TO-ANALOG CONVERTER (DAC) ARCHITECTURE 06-25-2009
3. 20090152543 System, Structure and Method of Providing Dynamic Optimization of Integrated Circuits Using a Non-Contact Method of Selection, and a Design Structure 06-18-2009
4. 20090108869 Design Structure for a Flexible Multimode Logic Element For Use In A Configurable Mixed-Logic Signal Distribution Path 04-30-2009
5. 20090108320 TUNABLE CAPACITOR - Disclosed are embodiments of a design structure transistor that operates as a capacitor and an associated method of tuning 04-30-2009
6. 20090106724 Transition Balancing For Noise Reduction/Di/Dt Reduction During Design, Synthesis, and Physical Design 04-23-2009
7. 20090106707 Multiple Source-Single Drain Field Effect Semiconductor Device and Circuit 04-23-2009
8. 20090102529 SHIFTING INACTIVE CLOCK EDGE FOR NOISE REDUCTION 04-23-2009
9. 20090101940 DUAL GATE FET STRUCTURES FOR FLEXIBLE GATE ARRAY DESIGN METHODOLOGIES 04-23-2009
10. 20090089724 Detection Method for Identifying Unintentionally Forward-Biased Diode Devices in an Integrated Circuit Device Design 04-02-2009
11. 20090051420 INTRINSIC RC POWER DISTRIBUTION FOR NOISE FILTERING OF ANALOG SUPPLIES 02-26-2009
12. 20090033395 MULTIPLE SOURCE-SINGLE DRAIN FIELD EFFECT SEMICONDUCTOR DEVICE AND CIRCUIT 02-05-2009
13. 20090033389 MICRO-PHASE ADJUSTING AND MICRO-PHASE ADJUSTING MIXER CIRCUITS DESIGNED WITH STANDARD FIELD EFFECT TRANSISTOR STRUCTURES 02-05-2009
14. 20090024972 STRUCTURES OF POWERING ON INTEGRATED CIRCUIT 01-22-2009
15. 20090021085 DESIGN STRUCTURES, METHOD AND SYSTEMS OF POWERING ON INTEGRATED CIRCUIT 01-22-2009
16. 20090003419 TRANSCEIVER FOR RECEIVING AND TRANSMITTING DATA OVER A NETWORK AND METHOD FOR TESTING THE SAME 01-01-2009
17. 20080304192 Low Voltage Head Room Detection For Reliable Start-Up Of Self-Biased Analog Circuits 12-11-2008
18. 20080273373 APPARATUS FOR IMPROVED SRAM DEVICE PERFORMANCE THROUGH DOUBLE GATE TOPOLOGY 11-06-2008
19. 20080273366 DESIGN STRUCTURE FOR IMPROVED SRAM DEVICE PERFORMANCE THROUGH DOUBLE GATE TOPOLOGY 11-06-2008
20. 20080244479 STRUCTURE FOR INTRINSIC RC POWER DISTRIBUTION FOR NOISE FILTERING OF ANALOG SUPPLIES 10-02-2008
21. 20080240222 SYSTEM AND METHOD FOR BALANCING DELAY OF SIGNAL COMMUNICATION PATHS THROUGH WELL VOLTAGE ADJUSTMENT 10-02-2008
22. 20080229266 Design Structure for a Clock Distribution Network, Structure, and Method for Providing Balanced Loading in Integrated Circuit Clock Trees 09-18-2008
23. 20080229265 Design Structure for a Clock Distribution Network, Structure, and Method for Providing Balanced Loading in Integrated Circuit Clock Trees 09-18-2008