Tran, TX
An Tran, Austin, TX US
Patent application number | Description | Published |
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20080291786 | AUDIO CASSETTE ADAPTER WITH CABLE STORAGE IN THE BODY OF THE CASSETTE - An audio cassette adapter with cable and connector storage in the body of the cassette. Internal cable storage is facilitated by an internal retractable mechanism that reduces the amount of storage external to the audio cassette adapter housing. In one embodiment, the internal retractable mechanism includes a cable support around which the cable is wound and a separate support driver engaged with the cable support that drives the cable support. | 11-27-2008 |
20100085533 | FLOATING LENS MOUNTING SYSTEM - Various embodiments of an eyeglass and eyeglass system are provided that can maintain the geometric and optical quality of a lens supported by the eyeglass. The eyeglass can comprise a frame, a support member carried by the frame, and a lens mounting area or groove extending at least partially along at least one of the frame and the support member. The support member can be pivoted, moved, or deflected relative to the frame between a retaining position and an open position. In the open position, the lens can be seated within the lens mounting area. In the retaining position, the support member and the frame retain the lens without exerting deformative forces on the lens. Accordingly, the as-molded geometric and optical qualities of the lens can be preserved. | 04-08-2010 |
20100220282 | EYEGLASS COMPONENT MOUNTING SYSTEM - An eyeglass component mounting system is provided that can comprise a frame and at least a first ear stem. The first ear stem extends rearwardly from the frame and defines an anterior end and a posterior end. The anterior end of the first ear stem can be hingedly coupled to the frame such that the first ear stem can be pivotably movable between a stowed position and a deployed position. The first ear stem can comprise a mounting area configured to receive an eyewear component thereon such that the eyewear component can be removed or seated onto the mounting area when the first ear stem is in the stowed position and such that the eyewear component is retained on the mounting area when the first ear stem is in the deployed position. | 09-02-2010 |
20110102733 | EYEGLASS COMPONENT MOUNTING SYSTEM - An eyeglass component mounting system is provided that can comprise a frame and at least a first ear stem. The first ear stem extends rearwardly from the frame and defines an anterior end and a posterior end. The anterior end of the first ear stem can be hingedly coupled to the frame such that the first ear stem can be pivotably movable between a stowed position and a deployed position. The first ear stem can comprise a mounting area configured to receive an eyewear component thereon such that the eyewear component can be removed or seated onto the mounting area when the first ear stem is in the stowed position and such that the eyewear component is retained on the mounting area when the first ear stem is in the deployed position. | 05-05-2011 |
20110170052 | EYEWEAR EARSTEM DEVICES AND METHODS - An earstem for eyeglasses is provided that can incorporate an interchangeable elastomeric traction member disposed in a recessed seat which extends along a length of the earstem to provide a contact area between the earstem and the head. The traction member can be disposed along the bottom portion of the earstem and/or around the periphery of the earstem. The traction device can be detachably coupled to the earstem so that the traction device can be exchanged to accommodate different needs or situations. | 07-14-2011 |
20110225709 | EYEWEAR WITH INTERCHANGEABLE LENS MECHANISM - Eyewear, such as a goggle, is provided that can include an anterior module (such as a lens support) and an interchangeable posterior module (such as a faceplate). The anterior module can be adapted to support at least one lens in a wearer's field of view. The posterior module can be adapted to fit against a contour of the wearer's face and can be selectively interchangeable with the anterior module to modify at least one physical characteristic of the eyewear. In some embodiments, the anterior and posterior modules can be coupled by a suspension assembly in order to allow articulation of the posterior module relative to the anterior module for evenly distributing forces against the wearer's face. Further, the anterior module can be rigid for maintaining the lens in an optically-desirable orientation. Furthermore, the goggle can comprise an interchangeable lens mechanism to facilitate interchanging of lenses in the goggle. | 09-22-2011 |
20110225710 | EYEWEAR WITH ENHANCED PRESSURE DISTRIBUTION - Eyewear, such as a goggle, is provided that can include an anterior module (such as a lens support) and an interchangeable posterior module (such as a faceplate). The anterior module can be adapted to support at least one lens in a wearer's field of view. The posterior module can be adapted to fit against a contour of the wearer's face and can be selectively interchangeable with the anterior module to modify at least one physical characteristic of the eyewear. In some embodiments, the anterior and posterior modules can be coupled by a suspension assembly in order to allow articulation of the posterior module relative to the anterior module for evenly distributing forces against the wearer's face. Further, the anterior module can be rigid for maintaining the lens in an optically-desirable orientation. Furthermore, the goggle can comprise an interchangeable lens mechanism to facilitate interchanging of lenses in the goggle. | 09-22-2011 |
20110299026 | FLOATING LENS MOUNTING SYSTEM - Various embodiments of an eyeglass and eyeglass system are provided that can maintain the geometric and optical quality of a lens supported by the eyeglass. The eyeglass can comprise a frame, a support member carried by the frame, and a lens mounting area or groove extending at least partially along at least one of the frame and the support member. The support member can be pivoted, moved, or deflected relative to the frame between a retaining position and an open position. In the open position, the lens can be seated within the lens mounting area. In the retaining position, the support member and the frame retain the lens without exerting deformative forces on the lens. Accordingly, the as-molded geometric and optical qualities of the lens can be preserved. | 12-08-2011 |
20120224135 | EYEGLASS COMPONENT MOUNTING SYSTEM - An eyeglass component mounting system is provided that can comprise a frame and at least a first ear stem. The first ear stem extends rearwardly from the frame and defines an anterior end and a posterior end. The anterior end of the first ear stem can be hingedly coupled to the frame such that the first ear stem can be pivotably movable between a stowed position and a deployed position. The first ear stem can comprise a mounting area configured to receive an eyewear component thereon such that the eyewear component can be removed or seated onto the mounting area when the first ear stem is in the stowed position and such that the eyewear component is retained on the mounting area when the first ear stem is in the deployed position. | 09-06-2012 |
20130141689 | RELEASABLE EARSTEM MOUNTING MECHANISM FOR EYEWEAR - Eyewear can be provided which includes a frame and at least one earstem that can be removably coupled to the frame. The frame and/or the earstem can include a retention assembly and/or an engagement structure. For example, the earstem can include at least one prong extending from an anterior end thereof and a latch component that can collectively engage an engagement structure of the frame. | 06-06-2013 |
20130271723 | FLOATING LENS MOUNTING SYSTEM - Various embodiments of an eyeglass and eyeglass system are provided that can maintain the geometric and optical quality of a lens supported by the eyeglass. The eyeglass can comprise a frame, a support member carried by the frame, and a lens mounting area or groove extending at least partially along at least one of the frame and the support member. The support member can be pivoted, moved, or deflected relative to the frame between a retaining position and an open position. In the open position, the lens can be seated within the lens mounting area. In the retaining position, the support member and the frame retain the lens without exerting deformative forces on the lens. Accordingly, the as-molded geometric and optical qualities of the lens can be preserved. | 10-17-2013 |
Andy Quang Tran, Grand Prairie, TX US
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20140091326 | Light Blocking Structure in Leadframe - A semiconductor proximity sensor ( | 04-03-2014 |
20140189628 | SYSTEM AND METHOD OF CROSSOVER DETERMINATION IN DIFFERENTIAL PAIR AND BONDWIRE PAIRS TO MINIMIZE CROSSTALK - A system is provided for use with circuit layout design data having a set of differential pairs and a set of bond wire pairs. A layout portion can receive the circuit layout design data. A crosstalk calculating portion can determine a first amount of crosstalk in a circuit corresponding to the circuit layout design data. A modifier can modify the circuit layout design data into modified circuit layout design data such that one of the set of differential pairs and the set of bond wire pairs includes a crossover. The crosstalk calculating portion can further determine a second amount of crosstalk in a circuit corresponding to the modified circuit layout design data. An optimizer can compare the first amount of crosstalk with the second amount of crosstalk to generate optimized circuit layout design data. A layout designer can output the optimized circuit layout design data. | 07-03-2014 |
Anh Q. Tran, Dallas, TX US
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20120221727 | MANAGE A SHARED COMPUTING RESOURCE BASED ON RESOURCE USE REPORTS - Embodiments disclosed herein relate to managing a shared computing resource based on resource use reports. In one embodiment, a manager electronic device manages a shared computing resource based on resource use reports from agent electronic devices. The manager electronic device may send resource use instructions to the agent electronic devices, and the agent electronic devices may use the resource based on the instructions. | 08-30-2012 |
Bang T. Tran, Sugar Land, TX US
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20100009086 | RAPID CURE COATING SYSTEM - A composition and coating made thereof for application onto metallic substrates is described. The composition and coating made thereof comprises a resin can be applied to a substrate with sufficient thickness to provide protection to the pipe. | 01-14-2010 |
Binh Tran, Houston, TX US
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20100294199 | CVD APPARATUS FOR IMPROVED FILM THICKNESS NON-UNIFORMITY AND PARTICLE PERFORMANCE - Embodiments of the invention provide improved apparatus for depositing layers on substrates, such as by chemical vapor deposition (CVD). The inventive apparatus disclosed herein may advantageously facilitate one or more of depositing films having reduced film thickness non-uniformity within a given process chamber, improved particle performance (e.g., reduced particles on films formed in the process chamber), chamber-to-chamber performance matching amongst a plurality of process chambers, and improved process chamber serviceability. | 11-25-2010 |
20120291709 | ROTATING SUBSTRATE SUPPORT AND METHODS OF USE - A method and apparatus for processing a substrate utilizing a rotating substrate support are disclosed herein. In one embodiment, an apparatus for processing a substrate includes a chamber having a substrate support assembly disposed within the chamber. The substrate support assembly includes a substrate support having a support surface and a heater disposed beneath the support surface. A shaft is coupled to the substrate support and a motor is coupled to the shaft through a rotor to provide rotary movement to the substrate support. A seal block is disposed around the rotor and forms a seal therewith. The seal block has at least one seal and at least one channel disposed along the interface between the seal block and the shaft. A port is coupled to each channel for connecting to a pump. A lift mechanism is coupled to the shaft for raising and lowering the substrate support. | 11-22-2012 |
Dominic Anh Tran, Richardson, TX US
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20130124165 | MODELING TOOL PASSAGE THROUGH A WELL - In modeling passage of an elongate well tool through a well, a computing system receives inputs representing a plurality of geometric characteristics of the well tool including three dimensional surface data characterizing the shape of outwardly facing, lateral surfaces of the well tool. The computing system also receives inputs representing a plurality of geometric characteristics of the well. The computing system determines a prediction of the force to pass the well tool through at least a portion of the well based on a comparison of the three dimensional surface data of the well tool and the plurality of geometric characteristics of the well. | 05-16-2013 |
20130124166 | MODELING OPERATION OF A TOOL IN A WELLBORE - In modeling operation of a well tool in applying a force to a device in a well, a computing system receives inputs representing a plurality of geometric characteristics of the well tool. The computing system also receives inputs representing a plurality of geometric characteristics of the well. The computing system determines based on the geometric characteristics of the well tool and the well, a predicted reaction force on a portion of the well tool that affects operation of the well tool in applying force to the device. The predicted reaction force is due to contact between a surface associated with the well tool and a surface of the well. | 05-16-2013 |
20130124176 | Modeling Passage of a Tool Through a Well - In modeling passage of an elongate well tool through an interval of a well an adaptive machine learning model executed on a computing system receives a first set of inputs representing a plurality of characteristics of the well tool and a second set of inputs representing a plurality of characteristics of the well. The adaptive machine learning model also receives historical data representing a plurality of other well tools passed through a plurality of other wells and a plurality of characteristics of the other well tools and the other wells. The adaptive machine learning model matches the historical data with at least a portion of the first and second sets of inputs, and determines, based on the matching whether the well tool can pass through the interval of the well. | 05-16-2013 |
Dung Tran, Houston, TX US
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20110030943 | Portable Ram Block Changer - An apparatus for engaging and moving a ram block. In some embodiments, the apparatus, or ram block changer, includes a support bracket coupled to a blowout preventer and an articulated arm releasably coupled to the ram block. The ram block changer may further include a pivot coupling assembly having a first axis of rotation. The pivot coupling assembly extends through the support bracket and the articulated arm, wherein the articulated arm is rotatable about the first axis of rotation relative to the support bracket. The articulated aim may include a first member receiving the pivot coupling assembly therethrough, a second member coupled to the ram block, and a second pivot coupling assembly having a second axis of rotation spaced apart from the first axis of rotation and extending through the first and second members. The second member is rotatable about the second axis of rotation relative to the first member. | 02-10-2011 |
20140209320 | PORTABLE RAM BLOCK CHANGER - An apparatus for engaging and moving a ram block. In some embodiments, the apparatus, or ram block changer, includes a support bracket coupled to a blowout preventer and an articulated arm releasably coupled to the ram block. The ram block changer may further include a pivot coupling assembly having a first axis of rotation. The pivot coupling assembly extends through the support bracket and the articulated arm, wherein the articulated arm is rotatable about the first axis of rotation relative to the support bracket. The articulated arm may include a first member receiving the pivot coupling assembly therethrough, a second member coupled to the ram block, and a second pivot coupling assembly having a second axis of rotation spaced apart from the first axis of rotation and extending through the first and second members. The second member is rotatable about the second axis of rotation relative to the first member. | 07-31-2014 |
Dung Q. Tran, Grand Prairie, TX US
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20100150569 | System And Method For Optoelectrical Communication - A method for upgrading an optoelectrical system includes securing a transmitter to a line card, wherein the line card comprises an optoelectrical connector. It also includes coupling the transmitter to the connector, wherein the connector comprises an embedded fiber configured to be coupled to the transmitter. In addition, the method includes inserting a pluggable form factor module comprising a receiver, an input port, and an output port into a cage secured to the line card. Further, the method includes coupling the pluggable form factor module to the connector such that an optical signal transmitted by the transmitter propagates in an optical line of sight between the embedded fiber of the connector and the output port. The connector comprises electrical contacts that are configured to be coupled to the module such that the receiver can convert optical signals received at the input port into electrical signals and transmit the electrical signals to the line card via the connector. | 06-17-2010 |
20100150570 | System And Method For Optoelectrical Communication - A system for optoelectrical communication includes a transmitter configured to transmit optical signals. It also includes a pluggable form factor module. The module includes an input port, an output port, and a receiver configured to convert optical signals received at the input port into electrical signals. The system further includes an optoelectrical connector coupled to the module and the transmitter. The connector includes an embedded fiber coupled to the transmitter and configured to transmit the optical signals from the transmitter to the output port of the module. The connector also includes electrical contacts configured to receive the electrical signals from the receiver. The system includes a cage in a pluggable form factor configured to house the module and the connector, wherein the transmitter is positioned outside the cage. | 06-17-2010 |
Dzung T. Tran, Austin, TX US
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20090160484 | Input buffer - Methods and corresponding systems for buffering an input signal include outputting a first logic value in response to the input signal being below a lower threshold. A second logic value is output in response to the input signal rising above the lower threshold. Thereafter, the second logic value is maintained until the input exceeds a higher threshold and thereafter falls below the higher threshold. In response to the input signal falling below the higher threshold, the first logic value is output, and maintained at the first logic value, until the input falls below the lower threshold and thereafter rises above the lower threshold. | 06-25-2009 |
20090237164 | LOW LEAKAGE CURRENT AMPLIFIER - A circuit includes first, second, and third inverters and first and second transistors. The first inverter has an input, an output, a first supply terminal, and a second supply terminal. The second inverter has an input, an output, a first supply terminal, and a second supply terminal. The first transistor has a first current electrode for receiving a first supply voltage, a control electrode coupled to the output of the first inverter, and a second current electrode coupled to the first supply terminals of both the first and second inverters. The second transistor has a first current electrode coupled to the second supply terminals of the first and second inverters, a control electrode coupled to the output of the first inverter, and a second current electrode for receiving a second supply voltage. The third inverter has an input coupled to the output of the second inverter, and an output coupled to the output of the first inverter. | 09-24-2009 |
Frank Tran, The Woodlands, TX US
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20110293891 | PHOTOCURABLE COMPOSITIONS FOR PREPARING ABS-LIKE ARTICLES - The present invention provides a clear, low viscosity photocurable composition including (i) a cationically curable compound (ii) an acrylate-containing compound (iii) a polyol-containing mixture (iv) a cationic photoinitiator and (v) a free radical photoinitiator. The photocurable composition can be cured using rapid prototyping techniques to form opaque-white three-dimensional articles having ABS-like properties. | 12-01-2011 |
Hai Tran, Wichita Falls, TX US
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20100081367 | Hand/foot rest - The hand/foot rest is a manicure/pedicure aid with integrated cleaning features. The hand/foot rest includes an ergonomic hollow body covered with cushion material, the top of the body defining a rest/work area for the hand or foot, at least one air inlet port to extract dust and fumes or vapor in the work area and an air outlet port adapted to be connected to a vacuum source to evacuate the extracted air. The hand/foot rest is a portable device of various forms that is capable of being configured for nail care facilities of various sizes and layout | 04-01-2010 |
Haivan D. Tran, Pearland, TX US
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20100069515 | MIXED ALCOHOL SYNTHESIS WITH ENHANCED CARBON VALUE USE - The present invention provides a method for simplifying manufacture of a mixed alcohol or mixed oxygenate product from synthesis gas. The mixed alcohol or mixed oxygenate product contains ethanol and other oxygenates with two or more carbon atoms per molecule. The method includes stripping a portion of carbon dioxide and inert gases contained in a mixed alcohol synthesis reaction product using a methanol-containing stream, such as one produced as part of the method, as a medium to absorb said carbon dioxide and inert gases and recycling light products and heavy products to one or more of synthesis gas generation, mixed alcohol synthesis and separation of desired mixed alcohol or mixed oxygenate products from other components of a mixed alcohol synthesis stream. The present invention also provides downstream processing of the mixed alcohol or mixed oxygenate product by subjecting the product to a dehydration step in order to convert at least ethanol, preferably at least ethanol and propanol, to their corresponding olefins (e.g. ethylene and propylene). | 03-18-2010 |
Janet Tran, Pearland, TX US
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20120197268 | SELF EYEBROW WAXING AND SHAPING SYSTEM - Self eyebrow waxing and shaping system provides consumers with a method for independently creating and maintaining symmetrical eyebrow shapes. Self eyebrow waxing and shaping system comprises eyebrow shaping stencil template strip(s). Eyebrow shaping stencil template strip(s) may include a plurality of left eyebrow shaping stencil template strip(s); a plurality of right eyebrow shaping stencil template strip(s); an adhesive wax backing; a protective peel off sheet; and a pre-shaped eyebrow cutout. Each of left eyebrow shaping stencil template strip(s) and right eyebrow shaping stencil template strip(s) comprise the adhesive wax backing, the protective peel off sheet, and the pre-shaped eyebrow cutout. A left eyebrow shaping stencil template strip(s) is preferably removeably-placed over left eyebrow of user to alter a shape of left eyebrow while right eyebrow shaping stencil template strip(s) is preferably removeably-placed over right eyebrow of user to alter a shape of a right eyebrow. | 08-02-2012 |
Joe G. Tran, Flower Mound, TX US
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20080265344 | METHOD OF SIMULTANEOUSLY SILICIDING A POLYSILICON GATE AND SOURCE/DRAIN OF A SEMICONDUCTOR DEVICE, AND RELATED DEVICE - A method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device. At least some of the illustrative embodiments are methods comprising forming a gate stack over a semiconductor substrate (the gate stack comprising a first polysilicon layer, a first nitride layer, and a second polysilicon layer), forming a second nitride layer over an active region in the semiconductor substrate adjacent to the gate stack, performing a chemical mechanical polishing that stops on the first nitride layer and on the second nitride layer, removing the first nitride layer and the second nitride layer, and performing a simultaneous silicidation of the first polysilicon layer and the active region. | 10-30-2008 |
20090111224 | FUSI INTEGRATION METHOD USING SOG AS A SACRIFICIAL PLANARIZATION LAYER - A method for making a transistor | 04-30-2009 |
20100041231 | FUSI Integration Method Using SOG as a Sacrificial Planarization Layer - A method for making a transistor | 02-18-2010 |
20100176462 | METHOD OF SIMULTANEOUSLY SILICIDING A POLYSILICON GATE AND SOURCE/DRAIN OF A SEMICONDUCTOR DEVICE, AND RELATED DEVICE - A method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device. At least some of the illustrative embodiments are methods comprising forming a gate stack over a semiconductor substrate (the gate stack comprising a first polysilicon layer, a first nitride layer, and a second polysilicon layer), forming a second nitride layer over an active region in the semiconductor substrate adjacent to the gate stack, performing a chemical mechanical polishing that stops on the first nitride layer and on the second nitride layer, removing the first nitride layer and the second nitride layer, and performing a simultaneous silicidation of the first polysilicon layer and the active region. | 07-15-2010 |
John Tran, The Colony, TX US
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20120085113 | FAN MOTOR CONTROLLER FOR USE IN AN AIR CONDITIONING SYSTEM - One aspect of the disclosure provides an air conditioning system. The air conditioning system, in this embodiment, includes an exterior housing, and a motor having fan blades rotatably coupled thereto located within the exterior housing. The air conditioning system, in this embodiment, further includes a controller coupled to the motor and configured to rotate the fan blades based upon climate conditions proximate the exterior housing. | 04-12-2012 |
John N. Tran, Austin, TX US
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20090250523 | SYSTEM AND METHOD FOR SENSING BIOMETRIC AND NON-BIOMETRIC SMART CARD DEVICES - A system of detecting biometric and non-biometric, standard smart card devices includes a smart card host and smart card device reader, which is operable for receiving an Answer to Reset signal and determining whether the smart card device comprises a biometric or non-biometric, standard smart card device. If a biometric smart card device is detected, the smart card reader is operable for applying power used for standard smart card device operation to a first contact and applying power used by a biometric circuit to a second contact, and if a non-biometric, standard smart card device is detected, applying power only to the first contact. | 10-08-2009 |
20090321519 | SYSTEM AND METHOD FOR SENSING BIOMETRIC AND NON-BIOMETRIC SMART CARD DEVICES - A system of detecting biometric and non-biometric, standard smart card devices includes a smart card host and smart card device reader, which is operable for receiving an Answer to Reset signal and determining whether the smart card device comprises a biometric or non-biometric, standard smart card device. If a biometric smart card device is detected, the smart card reader is operable for applying power used for standard smart card device operation to a first contact and applying power used by a biometric circuit to a second contact, and if a non-biometric, standard smart card device is detected, applying power only to the first contact. | 12-31-2009 |
Jonathan (son) Hung Tran, Murphy, TX US
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20120079204 | Cache with Multiple Access Pipelines - Parallel pipelines are used to access a shared memory. The shared memory is accessed via a first pipeline by a processor to access cached data from the shared memory. The shared memory is accessed via a second pipeline by a memory access unit to access the shared memory. A first set of tags is maintained for use by the first pipeline to control access to the cache memory, while a second set of tags is maintained for use by the second pipeline to access the shared memory. Arbitrating for access to the cache memory for a transaction request in the first pipeline and for a transaction request in the second pipeline is performed after each pipeline has checked its respective set of tags. | 03-29-2012 |
20120191914 | PERFORMANCE AND POWER IMPROVEMENT ON DMA WRITES TO LEVEL TWO COMBINED CACHE/SRAM THAT IS CAUSED IN LEVEL ONE DATA CACHE AND LINE IS VALID AND DIRTY - This invention optimizes DMA writes to directly addressable level two memory that is cached in level one and the line is valid and dirty. When the level two controller detects that a line is valid and dirty in level one, the level two memory need not update its copy of the data. Level one memory will replace the level two copy with a victim writeback at a future time. Thus the level two memory need not store write a copy. This limits the number of DMA writes to level two directly addressable memory and thus improves performance and minimizes dynamic power. This also frees the level two memory for other master/requestors. | 07-26-2012 |
20120192027 | Robust Hamming Code Implementation for Soft Error Detection, Correction, and Reporting in a Multi-Level Cache System Using Dual Banking Memory Scheme - The invention is a memory system having two memory banks which can store and recall with memory error detection and correction on data of two different sizes. For writing separate parity generators form parity bits for respective memory banks. For reading separate parity detector/generators operate on data of separate memory banks. | 07-26-2012 |
20120198162 | Hazard Prevention for Data Conflicts Between Level One Data Cache Line Allocates and Snoop Writes - A comparator compares the address of DMA writes in the final entry of the FIFO stack to all pending read addresses in a monitor memory. If there is no match, then the DMA access is permitted to proceed. If the DMA write is to a cache line with a pending read, the DMA write access is stalled together with any DMA accesses behind the DMA write in the FIFO stack. DMA read accesses are not compared but may stall behind a stalled DMA write access. These stalls occur if the cache read was potentially cacheable. This is possible for some monitored accesses but not all. If a DMA write is stalled, the comparator releases it to complete once there are no pending reads to the same cache line. | 08-02-2012 |
20120198163 | Level One Data Cache Line Lock and Enhanced Snoop Protocol During Cache Victims and Writebacks to Maintain Level One Data Cache and Level Two Cache Coherence - This invention assures cache coherence in a multi-level cache system upon eviction of a higher level cache line. A victim buffer stored data on evicted lines. On a DMA access that may be cached in the higher level cache the lower level cache sends a snoop write. The address of this snoop write is compared with the victim buffer. On a hit in the victim buffer the write completes in the victim buffer. When the victim data passes to the next cache level it is written into a second victim buffer to be retired when the data is committed to cache. DMA write addresses are compared to addresses in this second victim buffer. On a match the write takes place in the second victim buffer. On a failure to match the controller sends a snoop write. | 08-02-2012 |
20120198310 | CONFIGURABLE SOURCE BASED/REQUESTOR BASED ERROR DETECTION AND CORRECTION FOR SOFT ERRORS IN MULTI-LEVEL CACHE MEMORY TO MINIMIZE CPU INTERRUPT SERVICE ROUTINES - This invention is a memory system with parity generation which selectively forms and stores parity bits of corresponding plural data sources. The parity generation and storage depends upon the state of a global suspend bit and a global enable bit, and parity detection/correction corresponding to each data source. | 08-02-2012 |
Khai Tran, Pearland, TX US
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20090134352 | VALVE FOR CONTROLLING THE FLOW OF FLUID BETWEEN AN INTERIOR REGION OF THE VALVE AND AN EXTERIOR REGION OF THE VALVE - Embodiments of the invention are directed to a valve. In one embodiment, the valve includes a body having a first biasing member and a sealing member configured to axially move inside the body against the first biasing member to provide a path for fluid to flow from an interior region of the body to an exterior region of the body at a first predetermined pressure difference across the sealing member. | 05-28-2009 |
20140284060 | CASING MOUNTED METERING DEVICE - The present invention relates to an inflow control device for controlling the flow of fluid into a tubular deployed in a wellbore comprising coupling between joints of tubulars. The inflow control device is mounted transversely through the coupling in any inflow can control devices the initial condition fluid flow between the exterior and interior of the tubular is prevented. As sufficient pressure is exerted upon the inflow control device from the interior of the tubular the inflow control device is actuated to allow fluid flow between the interior and exterior the tubular. A nozzle in the inflow control device allows fluid to pass at a preset rate. The present invention furthermore relates to a method of assembling an inflow control device according to the invention and to a completion system comprising an inflow control device according to the invention | 09-25-2014 |
Kim-Khanh V. Tran, Austin, TX US
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20120290928 | Management of Presentation Timing in a Distributed Presentation Environment - A data processing system invokes presentation of a presentation element of a distributed presentation by a plurality of devices. The data processing system receives progress reports from the plurality of devices, where the progress reports indicate progress in presenting the presentation element. The data processing system determines whether a quorum threshold of presentation progress has been achieved based upon the progress reports. In response to determining that the quorum threshold of presentation of presentation progress has been achieved, the data processing system presents an indication that a spoken presentation associated with the presentation element can commence. The notification is presented prior to completion of presentation of the presentation element by at least one of the plurality of devices. | 11-15-2012 |
Kim Meghan Tran, Houston, TX US
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20110203641 | Nighttime Solar Panel - Embodiments of the present disclosure provide an improved solar panel that will produce electricity at night. The improved solar panel generally includes an array of photovoltaic cells, a thermally-conductive, rigid backing, and an array of thermocouples sandwiched between and in thermal contact with the array of photovoltaic cells and the thermally conductive, rigid backing. | 08-25-2011 |
Lap T. Tran, Houston, TX US
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20080264627 | PERMANENT ANCHORING DEVICE - An anchoring device to secure a packer assembly within a casing, including a frangible ring having a plurality of grips on an outer circumference, wherein a first end of the frangible ring includes a plurality of circumferentially spaced slots, and an expansion ring having a plurality of castellations configured to engage the slots of the first end of the frangible ring is disclosed. A method to secure a packer assembly in a casing, including engaging a plurality of arcuate segments of a segmented ring with a plurality of slots in a first end of a frangible ring, engaging a plurality of castellations of an expansion ring with the plurality of slots on a second end of the frangible ring, and moving the expansion ring in an axial direction towards the frangible ring and splitting the frangible ring into a plurality of slip segments, thereby radially extending the plurality of slip segments and segmented ring into the casing is also disclosed. | 10-30-2008 |
20100326650 | DRILLABLE BRIDGE PLUG - A downhole tool for isolating zones in a well, the tool including a mandrel, a sealing element disposed around the mandrel, an upper cone disposed around the mandrel proximate an upper end of the sealing element, an upper slip assembly disposed around the mandrel adjacent a sloped surface of the upper cone, a lower cone disposed around the mandrel proximate a lower end of the sealing element, a lower slip assembly disposed around the mandrel adjacent a sloped surface of the lower cone, two element end rings, a first element end ring disposed adjacent the upper end of the sealing element and a second element end ring disposed adjacent the lower end of the sealing element, and two element barrier assemblies, each assembly disposed adjacent one of the two element end rings is disclosed. | 12-30-2010 |
Lap Tan Tran, Houston, TX US
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20130075106 | ELECTRICAL GENERATOR FOR A CEMENTING MANIFOLD - Apparatuses and methods comprising a cementing head comprising a stationary body comprising a toothed ring; a rotating body disposed below the stationary body, the rotating body comprising an armature disposed inside the toothed ring; a battery disposed on the rotating body; and a wire connected to the armature and the battery. | 03-28-2013 |
Lee Tran, Sugarland, TX US
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20100018202 | THERMOELECTRIC DEVICE FOR USE WITH STIRLING ENGINE - An exhaust gas manifold having thermoelectric devices in the exhaust manifold of a stirling engine is disclosed. | 01-28-2010 |
Mai Phuong Tran, Austin, TX US
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20100022361 | WEIGHTED ARTICLE WITH FILL SPOUT - An article ( | 01-28-2010 |
20140113778 | WEIGHTED ARTICLE WITH FILL SPOUT - An article ( | 04-24-2014 |
Michael Hai Tran, Houston, TX US
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20120325126 | DISASTER-PROOF DATA SAFE FOR HOUSING FUNCTIONAL ELECTRONIC DATA PROCESSING, STORAGE AND COMMUNICATIONS SYSTEMS - A disaster-proof data safe with multiple, insulated, surrounding solid structural metal walls for housing functioning digital electronic computing, data processing, data storage, communications and high power density blade server systems has one or more coaxial helical coil coolant tubes circulating a coolant liquid encircled around an interior hexahedral, housing space for removing heat generated in the housing space and insulating the housing space from sources of heat external to the safe. Features of the safe include a plurality of longitudinal heat sink bars thermally coupled to the encircling helical coil coolant tubes supported either by the helical coil coolant tubes or the interior structural metal sidewalls of the housing space. The helical coil coolant tubes and the heat sink bars are preferably composed from metals such as copper, aluminum and their alloys that have a high thermal conductivity and that retain structural integrity at temperature ranging up to 500° C. | 12-27-2012 |
Minh-Tuan R. Tran, Forth Worth, TX US
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20110124765 | Versatile Biodegradable Elastic Polymers Featured with Dual Crosslinking Mechanism for Biomedical Applications - The present invention provides a dual crosslinked biodegradable polymer and methods of making and using the polymer. The dual crosslinked biodegradable polymer composition includes a multifunctional monomer; a diol; and an unsaturated di-acid at least partially polymerized to form a network and photocrosslinked into a dual crosslinked polymer network. | 05-26-2011 |
Minh-Tuan Richard Tran, Fort Worth, TX US
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20120244108 | Compositions And Methods For Separating Tissue - In one aspect, methods for separating biological tissue are described herein. In some embodiments, a method for separating tissue comprises providing a first composition comprising a polymerizable material, providing a second composition comprising a polymerization initiator, disposing the first composition at a first site beneath a first tissue layer, disposing the second composition at the first site, polymerizing the polymerizable material at the first site, and separating the first tissue layer from a second tissue layer. | 09-27-2012 |
20140086866 | Methods For Endoscopic Mucosal Resection And Endoscopic Submucosal Dissection - In one aspect, methods for separating biological tissue are described herein. In some embodiments, a method for separating tissue comprises providing a first composition comprising a polymerizable material, providing a second composition comprising a polymerization initiator, disposing the first composition at a first site beneath a first tissue layer, disposing the second composition at the first site, polymerizing the polymerizable material at the first site, and separating the first tissue layer from a second tissue layer. | 03-27-2014 |
Nghia T. Tran, Houston, TX US
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20130220628 | High-Pressure Cap Equalization Valve - A cap for protecting a sealing surface of a hub of a subsea device includes an equalization valve and a fluid conduit. The equalization valve includes a valve body having a pressure equalization conduit, a sleeve disposed about the valve body and having a port allowing fluid communication across the sleeve, and a valve spring configured to bias the sleeve to a closed position. The sleeve is configured to move to an open position in response to a force that depresses the sleeve and causes the valve spring to compress and the port is fluidly isolated from the pressure equalization conduit in the closed position and is in fluid communication with the pressure equalization conduit in the open position. In the open position, an interior environment of the subsea device is in fluid communication with the environment outside the cap through the equalization valve. | 08-29-2013 |
Nhung Thuy Tran, Lewisville, TX US
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20120011278 | Systems and Methods for Removing Stale Mapping Entries for Network Element - A method may include updating a routing table on a first network element based on a shortest path first calculation in response to a network change event. For each deletion from the routing table, a message may be broadcasted to a second network element adjacent to the first network element indicative of such deletion, the message including a target identifier (TID) associated with such deleted entry, wherein the second network element is configured to invalidate its associated TID address resolution protocol (TARP) cache in response to receiving the message. For each deletion from the routing table, a local TARP cache of the first network element may be searched to determine if an entry exists in the local TARP cache mapping the TID associated with such entry to a NASP associated with such entry. The local TARP cache may be invalidated in response to determining that the entry exists. | 01-12-2012 |
Paul L. Tran, Arlington, TX US
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20140114528 | PORTABLE MAINTENANCE AID BASED PRELOAD TEST UNIT AND STRAY VOLTAGE DETECTOR - A Portable Maintenance Aid (PMA) having multiple applications for the electrical testing and data acquisition for various air/ground vehicle platforms is disclosed. The PMA includes an interface adapter that has a number of electrical testing interfaces and data collection ports in addition to a stray voltage detector. The portable testing aid also includes a user interface that transmits data to the interface adapter and a display that communicates the testing and maintenance information to the user. The portable testing aid also includes a communication system for transferring information between the user interface, the display, and the interface adapter. The PMA provides a preload tester/stray voltage tester that is sustainable, less replaceable and has capability of filling the test voids. | 04-24-2014 |
Phung M. Tran, Grand Prairie, TX US
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20100290604 | Power Distribution Module With Monitoring And Control Functions - A modular form factor power module system with monitoring and control functions is disclosed. The power module system is configured to power, monitor and/or control telecommunications equipment at the circuit level. | 11-18-2010 |
Phuong-Lan Tran, Las Colinas, TX US
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20080207006 | PROCESS FOR FABRICATING AN INTEGRATED CIRCUIT - The present disclosure is directed to a process for plasma treating a film comprising titanium, nitrogen and impurities on a substrate. The process comprises forming a plasma of nitrogen gas and hydrogen gas, the flow ratio of hydrogen gas to nitrogen gas ranging from about 0.01 to about 0.7. The film is contacted with the plasma for a time sufficient to reduce the concentration of impurities in the film. | 08-28-2008 |
Phuong-Lan Thi Tran, Las Colinas, TX US
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20120058614 | PRE-METAL DEPOSITION CLEAN PROCESS - A process of forming an integrated circuit including an MOS transistor, in which a pre-metal deposition cleanup prior to depositing metal for silicide formation includes an HF etch, a first SC | 03-08-2012 |
Quoc-Nam Tran, Beaumont, TX US
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20120122730 | Methods for Quantitative Analyses of Kinase Inhibitor Selectivity Using Small Size Panels - Methods for analyses of kinase inhibitor specificity and promiscuity using small subsets of kinases including a method comprising providing a set of kinases, ranking the kinases based upon their ability to overcome biases, utilizing a correlation-based feature selection algorithm to select a kinase inferential bases, and screening a kinase inhibitor against the kinase inferential bases. | 05-17-2012 |
Scott Tran, Plano, TX US
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20110294503 | Method and Controller for Redirection of Active Users From an Umbrella Cell to Capacity Cells - A radio network controller of a wireless telecommunications network having an umbrella cell base station for an umbrella cell and capacity cell base stations for capacity cells within the umbrella cell includes a network interface from which a message is sent to the umbrella base station of the umbrella cell to search for capacity cells within the umbrella cell to redirect traffic of an AT from the umbrella cell to at least one of the capacity cells, and at which eligible capacity cells to which traffic of the AT can be redirected is received. The controller includes a processing unit which selects target capacity cells from the eligible capacity cells to which traffic of the AT will be redirected. A method for a radio network controller of a wireless telecommunications network having an umbrella cell base station for an umbrella cell and capacity cell base stations for capacity cells within the umbrella cell. | 12-01-2011 |
Son Tran, Arlington, TX US
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20100016965 | Accommodative IOL with Toric Optic and Extended Depth of Focus - In one aspect, the present invention provides an intraocular lens (IOL), which comprises at least two optics disposed in tandem along an optical axis, and an accommodative mechanism that is coupled to at least one of the optics and is adapted to adjust a combined optical power of the optics in response to natural accommodative forces of an eye in which the optics are implanted so as to provide accommodation. At least one of the optics has a surface characterized by a first refractive region, a second refractive region and transition region therebetween, where an optical phase shift of incident light having a design wavelength (e.g., 550 nm) across the transition region corresponds to a non-integer fraction of that wavelength. | 01-21-2010 |
20110238174 | ACCOMMODATING INTRAOCULAR LENS USING TRAPEZOIDAL PHASE SHIFT - An accommodating intraocular lens (AIOL) includes an optic adapted to produce a trapezoidal phase shift and a plurality of haptics. Each haptic extends from a haptic-optic junction to at least one transverse arm contacting a capsular bag of the eye, and each haptic has sufficient length and rigidity to stretch a capsular bag of the eye to contact ciliary muscles of the eye. The haptic-optic junctions vault the optic forward relative to the haptics and compression of the haptics by the ciliary muscles moves the anterior optic forward. A combined accommodative power produced by the motion of the anterior optic and the trapezoidal phase shift is at least 0.5 Diopters. | 09-29-2011 |
20130110234 | DUAL OPTIC ACCOMMODATING IOL WITH LOW REFRACTIVE INDEX GAP MATERIAL | 05-02-2013 |
Son Nam Tran, Dallas, TX US
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20100094650 | Methods and system for capturing and managing patient consents to prescribed medical procedures - A method of capturing patient consents to a prescribed medical procedures. Patient accounts are created on a computerized patient consent management system. The system authenticates a login attempt by a patient and displays a visual representation of a prescribed medical procedure to the patient. The patient consent management system presents at least one consent request input field for accepting a consent input from the patient and stores the consent input as part of the patient account. The patient consent management system presents the consent input to at least one care giver in order to determine if the patient has given consent to the prescribed medical procedure. | 04-15-2010 |
Son Trung Tran, Arlington, TX US
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20080269881 | Intraocular Lens with Asymmetric Haptics - Asymmetric intraocular lenses (IOLs) are disclosed in which the centration of the optic and the pupil can be adjusted in order to reduce dsyphotopsia and/or the perception of dark shadows. For example, IOLs with uneven haptics are disclosed such that the center of the optic (i.e., the optical axis) is offset from a centerline of the overall device. | 10-30-2008 |
20090204209 | Accommodative Intraocular Lens System - A two-optic accommodative lens system. The first lens has a negative power and is located posteriorly within the capsular bag and lying against the posterior capsule. The periphery of the first lens is attached to a ring-like structure having sloping sides. The second lens is located anteriorly to the first lens within of the capsular bag and is of a positive power. The peripheral edge of the second lens contains a plurality of haptics that project posteriorly from the second lens and toward the first lens. The haptics are relatively firm, yet still flexible and ride within the sloping sides of the ring-like structure, so that flattening or steepening of the capsule in reaction to movement of the ciliary muscle and corresponding shrinkage of the capsular bag causes the second lens to move along the optical axis of the lens system. | 08-13-2009 |
20100262234 | Posterior chamber phakic intraocular lens - A posterior chamber phakic lens made from an elastomeric, foldable, highly biocompatible and permeable material. The lens has a generally circular optic and a plurality of integrally formed, filament-like haptics. The haptics project posteriorly from the optic and contain a raised feature or ridge that is sandwiched between the posterior iris and the zonules when implanted in an eye. Such a construction has a low vaulting force under compression, is size insensitive, provides for a stable lens once implanted in the eye, helps to avoid pupillary blockage and allows for improved aqueous flow around the natural lens. | 10-14-2010 |
20140172089 | Capsule Expander Devices, Systems, and Methods for Inhibiting Capsular Opacification and Stabilizing the Capsule - Disclosed herein is an implantable capsule expander device for insertion within a lens capsule of an eye of a patient. The device comprises an arcuate center portion including first and second rims and having a first height, an outermost peripheral portion including a second height that is less than the first height, and a receiving portion formed between the first and second rims. The center portion and the outermost peripheral portion are configured to stabilize the capsule expander device within the lens capsule and to expand the lens capsule. The receiving portion is sized to receive an artificial intraocular lens. | 06-19-2014 |
20140180404 | CURVATURE CHANGING ACCOMMODATIVE INTRAOCULAR LENS - A curvature changing accommodative intraocular lens for implantation into the eye of a patient includes a lens body having a base lens which has a base lens power, and a haptic structure including haptic elements projecting from the base lens. An actuator is placed into engagement with the lens body, and includes actuator haptic elements. At least one fluidic optical element is received between the actuator and base lens of the lens body and contains a fluid material therein. During accommodation of the patient's eye, the haptic elements of the lens body and actuator are engaged and apply a force to the fluidic optical element, causing the fluidic optical element to be deformed to generate an additional lens power to adjust the patient's vision. | 06-26-2014 |
Steve Tran, Houston, TX US
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20090287456 | Distributed Sensor System - A distributed sensor system includes a plug-in attachment, the plug-in attachment having a memory and at least one sensor; a modular node, the plug-in attachment being configured to connect to the modular node, the modular node being configured to read the memory and receive sensor data from the at least one sensor; a network, the network being connected to the modular node; and a central processor, the central processor being connected to the network and being in communication with the modular node through the network. A method for configuring and using a distributed sensor system includes connecting at least one plug-in assembly to a modular node, the at least one plug-in assembly having a memory and at least one sensor, the memory containing configuration data; connecting the modular node and a central processor to a network; configuring the modular node via the network; the modular node retrieving the configuration data and sending the configuration data via the network to the central processor; the modular node receiving sensor data from the at least one sensor, the modular node transmitting the sensor data via the network to the central processor. | 11-19-2009 |
Tam M. Tran, Austin, TX US
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20100027360 | INTEGRATED CIRCUIT HAVING AN ARRAY SUPPLY VOLTAGE CONTROL CIRCUIT - An integrated circuit comprises a plurality of memory cells and an array supply voltage control circuit. The plurality of memory cells are organized in rows and columns. A row comprises a word line and all of the memory cells coupled to the word line. A column comprises a bit line pair and all of the memory cells coupled to the bit line pair. The array supply voltage control circuit is coupled to the plurality of memory cells. The array supply voltage control circuit is for receiving a power supply voltage and for providing a reduced power supply voltage to memory cells of a selected column during a write operation in response to a voltage differential on the bit line pair of the selected column. | 02-04-2010 |
Thang Tran, Austin, TX US
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20110099355 | MULTI-THREADING PROCESSORS, INTEGRATED CIRCUIT DEVICES, SYSTEMS, AND PROCESSES OF OPERATION AND MANUFACTURE - A multi-threaded microprocessor ( | 04-28-2011 |
20110099393 | MULTI-THREADING PROCESSORS, INTEGRATED CIRCUIT DEVICES, SYSTEMS, AND PROCESSES OF OPERATION AND MANUFACTURE - A multi-threaded microprocessor ( | 04-28-2011 |
Thang M. Tran, Austin, TX US
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20100169578 | CACHE TAG MEMORY - A system comprises tag memories and data memories. Sources use the tag memories with the data memories as a cache. Arbitration of a cache request is replayed, based on an arbitration miss and way hit, without accessing the tag memories. A method comprises receiving a cache request sent by a source out of a plurality of sources. The sources use tag memories with data memories as a cache. The method further comprises arbitrating the cache request, and replaying arbitration, based on an arbitration miss and way hit, without accessing the tag memories. | 07-01-2010 |
20120221793 | SYSTEMS AND METHODS FOR RECONFIGURING CACHE MEMORY - A microprocessor system is disclosed that includes a first data cache that is shared by a first group of one or more program threads in a multi-thread mode and used by one program thread in a single-thread mode. A second data cache is shared by a second group of one or more program threads in the multi-thread mode and is used as a victim cache for the first data cache in the single-thread mode. | 08-30-2012 |
20120221796 | SYSTEMS AND METHODS FOR CONFIGURING LOAD/STORE EXECUTION UNITS - Systems and methods are disclosed for multi-threading computer systems. In a computer system executing multiple program threads in a processing unit, a first load/store execution unit is configured to handle instructions from a first program thread and a second load/store execution unit is configured to handle instructions from a second program thread. When the computer system executing a single program thread, the first and second load/store execution units are reconfigured to handle instructions from the single program thread, and a Level 1 (L1) data cache is reconfigured with a first port to communicate with the first load/store execution unit and a second port to communicate with the second load/store execution unit. | 08-30-2012 |
20120221835 | MICROPROCESSOR SYSTEMS AND METHODS FOR LATENCY TOLERANCE EXECUTION - An instruction unit provides instructions for execution by a processor. A decode unit decodes instructions received from the instruction unit. Queues are coupled to receive instructions from the decode unit. Each instruction in a same queue is executed in order by a corresponding execution unit. An arbiter is coupled to each queue and to the execution unit that executes instructions of a first instruction type. The arbiter selects a next instruction of the first instruction type from a bottom entry of the queue for execution by the first execution unit. | 08-30-2012 |
20120278592 | MICROPROCESSOR SYSTEMS AND METHODS FOR REGISTER FILE CHECKPOINTING - In a processor, a decode unit identifies instructions needing a checkpoint and enables selected checkpoints, and a register file unit includes a plurality of architectural registers; a first set of checkpoint registers corresponding to a first checkpoint, wherein each checkpoint register of the first set corresponds to a corresponding architectural register of the plurality of architectural registers; a first set of indicators corresponding to the first set of checkpoint registers which, for each checkpoint register in the first set of checkpoint registers, indicates whether the corresponding architectural register has been modified or is intended to be modified prior to enabling of the first checkpoint; and a second set of indicators corresponding to the first set of checkpoint registers which, for each checkpoint register in the first set of checkpoint registers, indicates whether the corresponding architectural register has been modified or is intended to be modified after enabling of the first checkpoint. | 11-01-2012 |
20120278596 | APPARATUS AND METHOD FOR CHECKPOINT REPAIR IN A PROCESSING DEVICE - A data processing device maintains register map information that maps accesses to architectural registers, as identified by instructions being executed, to physical registers of the data processing device. In response to determining that an instruction, such as a speculatively-executing conditional branch, indicates a checkpoint, the data processing device stores the register map information for subsequent retrieval depending on the resolution of the instruction. In addition, in response to the checkpoint indication the data processing device generates new register map information such that accesses to the architectural registers are mapped to different physical registers. The data processing device maintains a list, referred to as a free register list, of physical registers available to be mapped to an architectural registers. | 11-01-2012 |
20120303935 | MICROPROCESSOR SYSTEMS AND METHODS FOR HANDLING INSTRUCTIONS WITH MULTIPLE DEPENDENCIES - A processor includes an instruction unit which provides instructions for execution by the processor, a decode/issue unit which decodes instructions received from the instruction unit and issues the instructions, and a plurality of execution queues coupled to the decode/issue unit. Each issued instruction from the decode/issue unit is stored into an entry of at least one queue of the plurality of execution queues, wherein each entry of the plurality of execution queues is configured to store an issued instruction and a duplicate indicator corresponding to the issued instruction which indicates whether or not a duplicate instruction of the issued instruction is also stored in an entry of another queue of the plurality of execution queues. | 11-29-2012 |
20120303936 | DATA PROCESSING SYSTEM WITH LATENCY TOLERANCE EXECUTION - In a processor having an instruction unit, a decode/issue unit, and execution queues configured to provide instructions to correspondingly different types execution units, a method comprises maintaining a duplicate free list for the execution queues. The duplicate free list includes a plurality of duplicate dependent instruction indicators that indicate when a duplicate instruction for a dependent instruction is stored in at least one of the execution queues. One of the duplicate dependent instruction indicators is assigned to an execution queue for a dependent instruction. The dependent instruction is executed only when the one of the duplicate dependent instruction indicators is reset. | 11-29-2012 |
20120324209 | BRANCH TARGET BUFFER ADDRESSING IN A DATA PROCESSOR - A data processor includes a branch target buffer (BTB) having a plurality of BTB entries grouped in ways. The BTB entries in one of the ways include a short tag address and the BTB entries in another one of the ways include a full tag address. | 12-20-2012 |
20130046936 | DATA PROCESSING SYSTEM OPERABLE IN SINGLE AND MULTI-THREAD MODES AND HAVING MULTIPLE CACHES AND METHOD OF OPERATION - Systems and methods are disclosed for a computer system that includes a first load/store execution unit | 02-21-2013 |
20130046956 | SYSTEMS AND METHODS FOR HANDLING INSTRUCTIONS OF IN-ORDER AND OUT-OF-ORDER EXECUTION QUEUES - Systems and methods are disclosed that can include a processor having an instruction unit, a decode/issue unit, a first execution queue configured to provide instructions of a first instruction type to a first execution unit, and a second execution queue configured to provide instructions of a second instruction type to a second execution unit. A first instruction (IMUL) of the second instruction type is received. The first instruction is decoded by the decode/issue unit to determine operands of the first instruction. The operands of the first instruction are determined to include a dependency on a second instruction (Id) of the first instruction type stored in a first entry of the first execution queue. The first instruction is stored in a first entry of the second execution queue. In response to determining that the operands of the first instruction include the dependency on the second instruction: a synchronization indicator corresponding to the first instruction in a second entry of the first execution queue is set immediately adjacent the first entry of the first execution queue, which indicates that the first instruction is stored in another execution queue. A synchronization pending indicator is set in the first entry of the second execution queue to indicate that the first instruction has a corresponding synchronization indicator stored in another execution queue. | 02-21-2013 |
20130046957 | SYSTEMS AND METHODS FOR HANDLING INSTRUCTIONS OF IN-ORDER AND OUT-OF-ORDER EXECUTION QUEUES - Processing systems and methods are disclosed that can include an instruction unit which provides instructions for execution by the processor; a decode/issue unit which decodes instructions received from the instruction unit and issues the instructions; and a plurality of execution queues coupled to the decode/issue unit, wherein each issued instruction from the decode/issue unit can be stored into an entry of at least one queue of the plurality of execution queues. The plurality of queues can comprise an independent execution queue, a dependent execution queue, and a plurality of execution units coupled to receive instructions for execution from the plurality of execution queues. The plurality of execution units can comprise a first execution unit, coupled to receive instructions from the dependent execution queue and the independent execution queue which have been selected for execution. When a multi-cycle instruction at a bottom entry of the dependent execution queue is selected for execution, it may not be removed from the dependent execution queue until a result is received from the first execution unit. When a multi-cycle instruction at a bottom entry of the independent execution queue is selected for execution, it can be removed from the independent execution queue without waiting to receive a result from the first execution unit. | 02-21-2013 |
20130198490 | SYSTEMS AND METHODS FOR REDUCING BRANCH MISPREDICTION PENALTY - In a processing system capable of single and multi-thread execution, a branch prediciton unit can be configured to detect hard to predict branches and loop instructions. In a dual-threading (simultaneous multi-threading) configuration, one instruction queues (IQ) is used for each thread and instructions are alternately sent from each IQ to decode units. In single thread mode, the second IQ can be used to store the “not predicted path” of the hard-to-predict branch or the “fall-through” path of the loop. On mis-prediction, the mis-prediction penalty is reduced by getting the instructions from IQ instead of instruction cache. | 08-01-2013 |
20130212358 | DATA PROCESSING SYSTEM WITH LATENCY TOLERANCE EXECUTION - A data processing system comprises a processor unit that includes an instruction decode/issue unit including a re-order buffer having entries that include an execution queue tag that indicates an execution queue location of an instruction to which a re-order buffer entry is assigned, a result valid indicator to indicate that a corresponding instruction has executed with a status bit valid result, and a forward indicator to indicate that the status bit can be forwarded to an execution queue of an instruction pointed to that is waiting to receive the status bit. | 08-15-2013 |
20130290639 | APPARATUS AND METHOD FOR MEMORY COPY AT A PROCESSOR - A processor uses a dedicated buffer to reduce the amount of time needed to execute memory copy operations. For each load instruction associated with the memory copy operation, the processor copies the load data from memory to the dedicated buffer. For each store operation associated with the memory copy operation, the processor retrieves the store data from the dedicated buffer and transfers it to memory. The dedicated buffer is separate from a register file and caches of the processor, so that each load operation associated with a memory copy operation does not have to wait for data to be loaded from memory to the register file. Similarly, each store operation associated with a memory copy operation does not have to wait for data to be transferred from the register file to memory. | 10-31-2013 |
20130297912 | APPARATUS AND METHOD FOR DYNAMIC ALLOCATION OF EXECUTION QUEUES - A processor reduces the likelihood of stalls at an instruction pipeline by dynamically extending the size of a full execution queue. To extend the full execution queue, the processor temporarily repurposes another execution queue to store instructions on behalf of the full execution queue. The execution queue to be repurposed can be selected based on a number of factors, including the type of instructions it is generally designated to store, whether it is empty of other instruction types, and the rate of cache hits at the processor. By selecting the repurposed queue based on dynamic factors such as the cache hit rate, the likelihood of stalls at the dispatch stage is reduced for different types of program flows, improving overall efficiency of the processor. | 11-07-2013 |
20140025967 | TECHNIQUES FOR REDUCING PROCESSOR POWER CONSUMPTION THROUGH DYNAMIC PROCESSOR RESOURCE ALLOCATION - A technique for performing power management for configurable processor resources of a processor determining whether to increase, decrease, or maintain resource units for each of the configurable processor resources based on utilization of each of the configurable processor resources. A total weighted power number for the processor is substantially maintained while resource units for each of the configurable processor resources whose utilization is above a first level is increased and resource units for each of the configurable processor resources whose utilization is below a second level is decreased. The total weighted power number corresponds to a sum of weighted power numbers for the configurable processor resources. | 01-23-2014 |
20140040595 | SPACE EFFICIENT CHECKPOINT FACILITY AND TECHNIQUE FOR PROCESSOR WITH INTEGRALLY INDEXED REGISTER MAPPING AND FREE-LIST ARRAYS - A processor may efficiently implement register renaming and checkpoint repair even in instruction set architectures with large numbers of wide (bit-width) registers by (i) renaming all destination operand register targets, (ii) implementing free list and architectural-to-physical mapping table as a combined array storage with unitary (or common) read, write and checkpoint pointer indexing and (iiii) storing checkpoints as snapshots of the mapping table, rather than of actual register contents. In this way, uniformity (and timing simplicity) of the decode pipeline may be accentuated and architectural-to-physical mappings (or allocable mappings) may be efficiently shuttled between free-list, reorder buffer and mapping table stores in correspondence with instruction dispatch and completion as well as checkpoint creation, retirement and restoration. | 02-06-2014 |
20140095784 | Techniques for Utilizing Transaction Lookaside Buffer Entry Numbers to Improve Processor Performance - A technique for operating a processor includes translating, using an associated transaction lookaside buffer, a first virtual address into a first physical address through a first entry number in the transaction lookaside buffer. The technique also includes translating, using the transaction lookaside buffer, a second virtual address into a second physical address through a second entry number in the translation lookaside buffer. The technique further includes, in response to the first entry number being the same as the second entry number, determining that the first and second virtual addresses point to the same physical address in memory and reference the same data. | 04-03-2014 |
Thang Minh Tran, Austin, TX US
Patent application number | Description | Published |
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20090063820 | Application Specific Instruction Set Processor for Digital Radio Processor Receiving Chain Signal Processing - This invention is an application specific integrated processor to implement the complete fixed-rate DRX signal processing paths (FDRX) for a reconfigurable processor-based multi-mode 3G wireless application. This architecture is based on the baseline 16-bit RISC architecture with addition functional blocks (ADU) tightly coupled with the based processor's data path. Each ADU accelerates a computation-intensive tasks in FDRX signal path, such as multi-tap FIRs, IIRs, complex domain and vectored data processing. The ADUs are controlled through custom instructions based on the load/store architecture. The whole FDRX data path can be easily implemented by the software employing these custom instructions. | 03-05-2009 |
20110208950 | PROCESSES, CIRCUITS, DEVICES, AND SYSTEMS FOR SCOREBOARD AND OTHER PROCESSOR IMPROVEMENTS - A method of instruction issue ( | 08-25-2011 |
Thanh K. Tran, Austin, TX US
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20080228955 | Method and mechanism for cataloguing information on devices in a computing system - In a computing network containing multiple computing devices, a network card in a computing device provides the ability for the computing device to transmit specific types of information while the computing device is in an inactive state. The network card contains processing capabilities that enable it to detect and receive an inquiry directed to that device, process the inquiry, retrieve the requested data which is stored in the network card and transmit that information to the requester. The ability of the network card to perform this enables system administrators to perform certain system maintenance functions while a computer may be in a power off or hibernate state instead if having to power on the computing device. | 09-18-2008 |
20080240156 | Method and apparatus for adaptive bandwidth control with defined priorities for different networks - A computer implemented method, apparatus, and computer usable program code to receive data from a source at a plurality of gateways for distribution using a selected priority. The data is transmitted from the plurality of gateways to a plurality of receivers using the selected priority. Every gateway in the plurality of gateways has an adaptive bandwidth control process and a respective set of parameters for controlling the adaptive bandwidth control process for sending the data at the selected priority. Transmission of the data from each gateway for the selected priority has a different impact on other traffic at different gateways in the plurality gateways for the selected priority when different values are set for the set of parameters for the different gateways. | 10-02-2008 |
20080259803 | Method and Apparatus for Adaptive Bandwidth Control with a Bandwidth Guarantee - A computer implemented method, apparatus, and computer usable program code to monitor transmission of data to target. A determination is made as to whether the transmission of the data exceeds a threshold. The bandwidth used to transmit the data to the target is controlled using an adaptive bandwidth control process if the transmission of the data exceeds the threshold, wherein a minimum amount of bandwidth is guaranteed for the transmission of the data. | 10-23-2008 |
20100223395 | Method and Apparatus for Adaptive Bandwidth Control with Defined Priorities for Different Networks - A computer implemented method, apparatus, and computer usable program code to receive data from a source at a plurality of gateways for distribution using a selected priority. The data is transmitted from the plurality of gateways to a plurality of receivers using the selected priority. Every gateway in the plurality of gateways has an adaptive bandwidth control process and a respective set of parameters for controlling the adaptive bandwidth control process for sending the data at the selected priority. Transmission of the data from each gateway for the selected priority has a different impact on other traffic at different gateways in the plurality gateways for the selected priority when different values are set for the set of parameters for the different gateways. | 09-02-2010 |
20120075993 | METHOD AND APPARATUS FOR ADAPTIVE BANDWIDTH CONTROL WITH DEFINED PRIORITIES FOR DIFFERENT NETWORKS - A computer implemented method, apparatus, and computer usable program code to receive data from a source at a plurality of gateways for distribution using a selected priority. The data is transmitted from the plurality of gateways to a plurality of receivers using the selected priority. Every gateway in the plurality of gateways has an adaptive bandwidth control process and a respective set of parameters for controlling the adaptive bandwidth control process for sending the data at the selected priority. Transmission of the data from each gateway for the selected priority has a different impact on other traffic at different gateways in the plurality gateways for the selected priority when different values are set for the set of parameters for the different gateways. | 03-29-2012 |
20140355432 | Adaptive Bandwidth Control with Defined Priorities for Different Networks - A computer implemented method, apparatus, and computer usable program code to receive data from a source at a plurality of gateways for distribution using a selected priority. The data is transmitted from the plurality of gateways to a plurality of receivers using the selected priority. Every gateway in the plurality of gateways has an adaptive bandwidth control process and a respective set of parameters for controlling the adaptive bandwidth control process for sending the data at the selected priority. Transmission of the data from each gateway for the selected priority has a different impact on other traffic at different gateways in the plurality gateways for the selected-priority when different values are set for the set of parameters for the different gateways. | 12-04-2014 |
Thanh T. Tran, Houston, TX US
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20100142931 | System and Method for Processing Video - A system and method for allocating video processing tasks over multiple video processors include an apparatus. The apparatus includes a plurality of video processors. Each video processor includes a first processor that processes video data and manages buffers used in conversion and displaying video data. The video processor includes a second processor that performs video data signal processing and manages buffers used in processing video data. The apparatus also includes a switch coupled to each video processor, as well as video inputs and video outputs. A third processor coupled to the switch, and a memory coupled to each video processor and to the third processor, are also part of the apparatus. The switch selectively couples a video processor to a video input or a video output, the third processor configures the switch based on processing requirements of each video stream, and the memory buffers and stores video data. | 06-10-2010 |
Thanh Thien Tran, Houston, TX US
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20130050254 | HYBRID VIDEO AND GRAPHICS SYSTEM WITH AUTOMATIC CONTENT DETECTION PROCESS, AND OTHER CIRCUITS, PROCESSES, AND SYSTEMS - A computing device ( | 02-28-2013 |
20140092973 | SYSTEM AND METHOD FOR VIDEO TRANSCODING - A video transcoding system includes a video decoder, a video encoder, and a video interface. The video decoder is configured to decode a received video signal. The video encoder is configured to encode video data decoded from the received video signal by the video decoder. The video interface couples an output of the video decoder to an input of the video encoder and is configured to transfer video data having a first chroma subsampling ratio. The video decoder is further configured to provide video data having a second chroma subsampling ratio that includes fewer chrominance samples than the first chroma sampling ratio to the video interface, and to provide non-video information generated from decoding the received video signal to the video interface using video interface bandwidth usable based on a difference between the first chroma subsampling ratio and the second chroma subsampling ratio. | 04-03-2014 |
20140092989 | SYSTEM AND METHOD FOR TRANSFERRING NON-VIDEO DATA OVER A VIDEO INTERFACE - A video system includes a first video device. The first video device includes a video output port and an arbitrary data scrambler. The first video device transmits a video stream through the video output port. The video output port is configured to insert video timing reference values into the video stream. The arbitrary data scrambler is configured to scramble non-video data for transmission in the video stream such that unscrambled non-video data containing video timing reference values is transformed, without information loss, to scrambled non-video data containing no video timing reference values. | 04-03-2014 |
Thi N. Tran, Round Rock, TX US
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20080307287 | SYSTEMS AND METHODS FOR RECOVERY FROM HARDWARE ACCESS ERRORS - Systems, methods and media for recovering from a data scan error are disclosed. In one embodiment, a service processor determines the nature of the data scan error and, depending on the nature of the error, performs one of a plurality of data scan error recovery procedures. | 12-11-2008 |
20100077258 | GENERATE DIAGNOSTIC DATA FOR OVERDUE THREAD IN A DATA PROCESSING SYSTEM - Disclosed is a computer implemented method, computer program product, and apparatus for generating diagnostic data for a thread. A service processor may begin by executing the computer usable program code to allocate a first thread to a monitoring function. The service processor determines if a second thread is running, wherein the second thread is associated with an operation. The service processor obtains an object pointer from a list of running threads, wherein the object pointer references a time data structure associated with the second thread, the time data structure comprising a maximum running time interval and a check time. The service processor calculates the check time as a maximum running time interval added to an initially sampled timestamp. The service processor determines if a current time exceeds the check time. In addition, the service processor generates an error log, responsive to a determination that the current time exceeds the check time. | 03-25-2010 |
20110161739 | GENERATE DIAGNOSTIC DATA FOR OVERDUE THREAD IN A DATA PROCESSING SYSTEM - Disclosed is a computer implemented method, computer program product, and apparatus for generating diagnostic data for a thread. A service processor may begin by executing the computer usable program code to allocate a first thread to a monitoring function. The service processor determines if a second thread is running, wherein the second thread is associated with an operation. The service processor obtains an object pointer from a list of running threads, wherein the object pointer references a time data structure associated with the second thread, the time data structure comprising a maximum running time interval and a check time. The service processor calculates the check time as a maximum running time interval added to an initially sampled timestamp. The service processor determines if a current time exceeds the check time. In addition, the service processor generates an error log, responsive to a determination that the current time exceeds the check time. | 06-30-2011 |
20120239989 | Monitoring and Verifying a Clock State of a Chip - A mechanism is provided for monitoring and verifying a clock state of a chip that does not write out clock state information. Responsive to identifying an access to the chip, the access is scanned to identify a chip register and a clock domain that will be accessed. A determination is made as to whether a bit of a clock trust unit associated with the chip register and the clock domain indicates whether to trust a clock state associated with the bit in a logical clock state unit. Responsive to the bit of the clock trust unit indicating that the clock state associated with the bit in the logical clock state unit is trusted, the clock state from the logical clock state unit is identified. Responsive to the clock state matching the clock state required by the access, the access is forwarded to the chip for execution. | 09-20-2012 |
20140173250 | SELECTION OF A PRIMARY MICROPROCESSOR FOR INITIALIZATION OF A MULTIPROCESSOR SYSTEM - Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors. | 06-19-2014 |
20140173251 | SELECTION OF A PRIMARY MICROPROCESSOR FOR INITIALIZATION OF A MULTIPROCESSOR SYSTEM - Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors. | 06-19-2014 |
Thi Ngoc Tran, Round Rock, TX US
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20100017477 | Performance and Reduce Network Traffic for Remote Hardware Data Scan Operations - According to one embodiment of the present invention, multiple data scan operations are compacted into a single network message. A plurality of requests to perform a data scan operation on a remote node controller is received, forming a set of received data scan operation requests. A set of data scan operations are generated based on the set of received data scan operation requests, forming a set of generated data scan operations. A network message comprising the set of generated data scan operations is generated, forming a first compacted data scan operation network message. The first compacted data scan operation network message is sent to the remote node controller. A second compacted data scan operation network message is received from the remote node controller, wherein the second compacted data scan operation network message comprises a set of completed data scan operations. The set of completed data scan operations are separated into individual completed data scan operations. Each individual completed data scan operation is sent to the user that issued the request. | 01-21-2010 |
Thinh H. Tran, Austin, TX US
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20110258282 | OPTIMIZED UTILIZATION OF DMA BUFFERS FOR INCOMING DATA PACKETS IN A NETWORK PROTOCOL - A method, system and computer program product for facilitating network data packet management. In one embodiment, a controller is configured to receive data packets. Incoming data packets are stored in DMA mapped packet buffers. A time stamp is associated with the packet buffers. When the associated time stamp exceeds a defined threshold, the controller is configured to copy the packet buffers stored in DMA memory to non-DMA memory. Once copied, the DMA memory previously used to store the packet buffers is available to receive new data packets. The controller is configured to continue copying aged packet buffers to non-DMA memory until an unallocated amount DMA memory is reached. | 10-20-2011 |
20120093170 | Direct Memory Access Memory Management - A method, computer program product, and apparatus for managing data packets are presented. A data packet in the data packets is stored in a first portion of a memory in response to receiving the data packet at a device. The first portion of the memory is allocated to the device. A determination is made whether a size of the data packet is less than a threshold size. The data packet is copied from the first portion of the memory allocated to the device to a second portion of the memory in response to a determination that the size of the data packet stored in the memory is less than the threshold size. | 04-19-2012 |
Tin Tran, Crowley, TX US
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20120096570 | BASE FOR PROPAGATING AQUATIC ANIMALS - An aquatic animal such as coral is propagated on a base. The base has a top portion with a groove located therein. The groove has converging side walls. The groove intersects a depression that extends from the top portion to a bottom portion of the base. The depression has converging sides. An animal fragment is secured to the base by locating it in the groove, or alternatively in the groove and the depression. Water flow across the base may cause the fragment to move inside of the groove, wherein the fragment will sink down and become wedged in place, further securing or coupling the fragment to the base. The coral then grows and adheres itself to the base. | 04-19-2012 |
Toan Tran, Rowlett, TX US
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20080268589 | SHALLOW TRENCH DIVOT CONTROL POST - The disclosure provides a method of manufacturing a semiconductor device. The method comprises forming a shallow trench isolation structure, including performing a wet etch process to remove a patterned pad oxide layer located on a semiconductor substrate. The wet etch thereby produces a divot on upper lateral edges of a insulator-filled trench in the semiconductor substrate. Forming the shallow trench isolation structure also includes forming a nitride post on a vertical wall of the divot. Forming the nitride post includes depositing a nitride layer on the insulator, and dry etching the nitride layer. The dry etch is selective towards the nitride located adjacent the vertical wall such that a portion of the nitride layer remains on the vertical wall subsequent to the dry etching. | 10-30-2008 |
20090102501 | TEST STRUCTURES FOR E-BEAM TESTING OF SYSTEMATIC AND RANDOM DEFECTS IN INTEGRATED CIRCUITS - In accordance with the invention, there are electron beam inspection systems, electron beam testable semiconductor test structures, and methods for detecting systematic defects, such as, for example contact-to-gate shorts, worm hole leakage paths, holes printing issues, and anomalies in sparse holes and random defects, such as, current leakage paths due to dislocations and pipes during semiconductor processing. | 04-23-2009 |
20090212793 | STRUCTURES FOR TESTING AND LOCATING DEFECTS IN INTEGRATED CIRCUITS - A method for detecting defects during semiconductor device processing can include providing a substrate having a semiconductor comprising layer with electrically isolated application and test circuits are formed thereon, directing an electron current inducing beam to the test circuit; measuring a current between the first and the second contact pads in the test circuit; determining an electron beam induced current (EBIC); and identifying one or more defect locations in the test circuit based on the EBIC and a location of the electron beam corresponding to the EBIC. A test circuit can include a plurality of semiconductor devices connected in parallel, a first contact pad coupled to a first terminal of the semiconductor devices, and at least a second contact pad coupled to a substrate terminal associated with the semiconductor devices. | 08-27-2009 |
Tranh K. Tran, Austin, TX US
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20080247419 | Method and Apparatus for Adaptive Bandwidth Control With User Settings - A computer implemented method, apparatus, and computer usable program code to receive a user input defining settings at an application layer to form a set of received settings. An adaptive bandwidth control process is executed using the received settings to identify a transmission rate for transmitting data packets across a network. The data packets are transmitted across the network using the identified transmission rate. | 10-09-2008 |
Trung Tran, Wylie, TX US
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20130010049 | NEGOTIATE MULTI-STREAM CONTINUOUS PRESENCE - Described are embodiments for allowing the negotiation of a continuous presence layout. Specifically, in embodiments, an offer is generated by a client that includes attributes for displaying continuous presence video information. The attributes include, in some embodiments, one or more window identifiers, one or more bandwidth limit identifiers, one or more group numbers, and/or one or more ranks. The offer is sent to a server which transmits an answer to the offer. Once the attributes for the continuous presence layout has been negotiated, the server uses the attributes to format video content sent to the client. | 01-10-2013 |
Tu-Anh N. Tran, Austin, TX US
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20100270663 | Power Lead-on-Chip Ball Grid Array Package - A packaging assembly ( | 10-28-2010 |
20120025401 | INTEGRATED CIRCUIT PACKAGE WITH VOLTAGE DISTRIBUTOR - An integrated circuit package includes a semiconductor die attached to a package support. The die has a plurality of peripheral bond pads along a periphery of the die and a first bond pad on an interior portion of the die wherein the first bond pad is a power supply bond pad. A conductive distributor is over the die and within a perimeter of the die and has a first opening. The plurality of bond pads are located between the perimeter of the die and a perimeter of the conductive distributor. The first bond pad is in the first opening. A first bond wire is connected between the first bond pad and the conductive distributor. A second bond wire is connected between a first peripheral bond pad of the plurality of peripheral bond pads and the conductive distributor. | 02-02-2012 |
20130221076 | EMBEDDED ELECTRONIC COMPONENT - Forming an embedded electronic component includes attaching an electronic component to a first conductive layer and forming a layer stack with a first partially cured dielectric layer having a first opening and a substrate having a second opening. The partially cured dielectric layer is located over the first conductive layer and the substrate is located over the first partially cured dielectric layer such that the first and second openings surround the electronic component. Heat and pressure are applied to the layer stack such that the first partially cured dielectric layer flows for filling gaps within the first and second openings and becomes fully cured. | 08-29-2013 |
20140308779 | INTEGRATED CIRCUIT PACKAGE WITH VOLTAGE DISTRIBUTOR - An integrated circuit package includes a semiconductor die attached to a package support. The die has a plurality of peripheral bond pads along a periphery of the die and a first bond pad on an interior portion of the die wherein the first bond pad is a power supply bond pad. A conductive distributor is over the die and within a perimeter of the die and has a first opening. The plurality of bond pads are located between the perimeter of the die and a perimeter of the conductive distributor. The first bond pad is in the first opening. A first bond wire is connected between the first bond pad and the conductive distributor. A second bond wire is connected between a first peripheral bond pad of the plurality of peripheral bond pads and the conductive distributor. | 10-16-2014 |
20140367859 | TIN-BASED WIREBOND STRUCTURES - Tin-based wirebond structures and wirebonds formed thereon. In some embodiments, an electronic package includes a semiconductor die located over a substrate and a wire configured to couple a terminal of the semiconductor die to a bond pad on the substrate. A wire bond between the wire and the bond pad may include an amount of tin originated from a layer of tin alloy formed on the bond pad. In other embodiments, a wirebond structure may include a conductive layer and a layer of tin alloy located over a portion of the conductive layer. The layer of tin alloy may provide a wirebonding contact surface configured to receive a bond wire. | 12-18-2014 |
Tu Cam Tran, Grapevine, TX US
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20080255577 | Lens Delivery System Cartridge and Method of Manufacture - A cartridge for an IOL delivery system that has a straight thinned walled distal nozzle. The transition region between the tapered folding portion of the cartridge and the nozzle contain reinforcing gussets to help prevent splitting of the cartridge. Flow leaders in the nozzle direct the flow of material during molding at the 12:00 o'clock position, positioning the weld line of the flow front at the 6:00 o'clock position. | 10-16-2008 |
20100094414 | System and method to reduce surface contact between optic and haptic areas - Embodiments of the present invention provide an intraocular lens with an optic zone having a first surface topology and a haptic zone having a second surface topology. The surface roughness of the haptic zone may be greater than the surface roughness of the optic zone. The surface topology of the optic zone may have a first surface geometry and the surface topology of the haptic zone may have a second surface geometry. The first and second surface geometries may retain lubrication fluid in a space formed therein. The haptics formed by the manufacturing process may have a reduced ability to adhere to the optic zone, such as when the lens is folded or advanced through a cannula. | 04-15-2010 |
20140142586 | LENS DELIVERY SYSTEM - An intraocular lens delivery system includes an injector body having a bore surrounded by an inner wall. The system further includes a plunger configured to fit within the bore. The system also includes a plurality of deflectable members connected to the plunger and configured to contact the inner wall and to be deflected when the plunger is inserted within the bore. The deflectable members center the shaft and, when inserted within the injector body, contribute to producing a predetermined force resisting advancement of the plunger when deflected in the bore. | 05-22-2014 |
Vincent Minh-Tu Tran, Arlington, TX US
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20100090792 | THERMALLY DECOUPLING FUSE HOLDER AND ASSEMBLY - In one aspect of the present invention, subminiature fuses are soldered to a PCB via clips attached to the fuse end caps. The clips are physically attached to the PCB pads, enabling the fuse to be replaced if needed and providing thermal decoupling between the fuse and the heating sinking solder/PCB pads. The fuse and clips can also be picked and placed in one operation. In another aspect, improved fuse clips are provided that include tabs that separate the housing portions of the clips from the heating sinking solder/PCB pads. Such improved clips further enhance thermal decoupling. In a further aspect, an improved fuse is provided, in which the thermal decoupling tabs just described are provided directly with the fuse. In yet a further aspect, a thermally insulative fuse body is provided to further decouple the fuse element from its surroundings. | 04-15-2010 |
Vi (scott) T. Tran, Austin, TX US
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20120290928 | Management of Presentation Timing in a Distributed Presentation Environment - A data processing system invokes presentation of a presentation element of a distributed presentation by a plurality of devices. The data processing system receives progress reports from the plurality of devices, where the progress reports indicate progress in presenting the presentation element. The data processing system determines whether a quorum threshold of presentation progress has been achieved based upon the progress reports. In response to determining that the quorum threshold of presentation of presentation progress has been achieved, the data processing system presents an indication that a spoken presentation associated with the presentation element can commence. The notification is presented prior to completion of presentation of the presentation element by at least one of the plurality of devices. | 11-15-2012 |
Vit T. Tran, Austin, TX US
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20120047018 | IMMEDIATE UPDATING OF GLOBAL POSITIONING SYSTEM (GPS) GENERATED AREA MAPS ON WIRELESS COMPUTER CONTROLLED DISPLAYS - Immediate changes and updates in a Global Positioning System (GPS) providing wireless communication display devices with displayed maps of a defined areas with traffic and objects of interest information are implemented through broadcasting short range RF information relative to an object from an object located within the defined area. When this broadcast information is received by the transceiver of any wireless display device within RF broadcast range, the receiving device obtains the position of the object from a GPS satellite based upon the information received by the wireless display device and the object and the information are displayed. | 02-23-2012 |
Vu N. Tran, Austin, TX US
Ziep Tran, Austin, TX US
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20100013065 | STACKABLE MOLDED PACKAGES AND METHODS OF MAKING THE SAME - A first packaged integrated circuit (IC) includes a package substrate, at least one IC die attached to a first surface of the package substrate, a plurality of conductive members on the first surface at least partially surrounding the at least one IC die and electrically connected to the at least one IC die, an encapsulant over the first surface surrounding the at least one IC die and the plurality of conductive members, wherein at least a portion of each of the plurality of conductive members is exposed by the encapsulant. A second packaged IC may be stacked onto the first packaged IC. The second packaged IC includes at least one IC die and a plurality of conductive members, each conductive member of the plurality of conductive members of the second packaged IC is in contact with a corresponding conductive member of the plurality conductive members of the first packaged IC. | 01-21-2010 |