Patent application number | Description | Published |
20080276363 | SPRAY NOZZLE STRUCTURE FOR USE IN A MASSAGE BATHTUB - A spray nozzle structure for use in a massage bathtub comprises a housing including a sleeve member having a receiving compartment formed therein and a hollow L-shaped rod member extended upwardly therefrom; a fixing seat constructed in the form of a ring and fitted in the opening of the sleeve member of the housing; a motor including a rotary shaft with which an impeller is combined, and disposed in the receiving compartment; a guiding collar engaged in a retaining recess of the fixing seat; a cover member containing an inlet affixed at the center of the outer surface thereof, about which two opposite openings are formed, each having an air duct affixed at the side thereof and having a guiding piece selectively mounted on the outer side thereof, thereby obtaining a handing function and a proper water flowing angle. | 11-13-2008 |
20110102523 | COMPATIBLE INK CARTRIDGE FOR LARGE FORMAT INK JET PRINTERS - The present invention relates to a compatible ink cartridge for large format ink jet printers, consisting of an insertable cartridge and an ink container that can be integrated with said cartridge. The front end of said cartridge has a nozzle through which the large format ink jet printer's ink supply needle is inserted. Said ink container has a front end facing said nozzle of said cartridge, said front end having a soft plug through which the large format ink jet printer's ink supply needle can be inserted to access ink from said ink container. | 05-05-2011 |
20140361509 | BICYCLE FRAME ASSEMBLY - A bicycle frame assembly is formed of a head tube, a seat tube, a linking member, and a support holder. The linking member includes a first part, two second parts, and two positioning parts. The first part is connected with the seat tube. The two positioning parts are spaced from each other and extend in an interval toward the head tube from the first part to jointly form a limiting portion therebetween. The two second parts are connected with the head tube and located between the head tube and the two positioning parts. The support holder is movably mounted to the limiting portion relative to the linking member for accommodating a portable part or accessory. Therefore, the present invention facilitates that the rider can take or put the portable part or accessory from or into the support holder with his or her natural riding posture. | 12-11-2014 |
Patent application number | Description | Published |
20090230538 | SEMICONDUCTOR CHIP PACKAGE STRUCTURE FOR ACHIEVING FACE-UP ELECTRICAL CONNECTION WITHOUT USING A WIRE-BONDING PROCESS AND METHOD FOR MAKING THE SAME - A semiconductor chip package structure for achieving face-up electrical connection without using a wire-bonding process includes a package unit, a semiconductor chip, a substrate unit, a first insulative unit, a first conductive unit, a second conductive unit, and a second insulative unit. The package unit has a central receiving groove and an outer receiving groove formed around the central receiving groove. The semiconductor chip has a plurality of conductive pads. The first insulative unit has a first insulative layer formed between the conductive pads. The first conductive unit has a plurality of first conductive layers. The second conductive unit has a plurality of second conductive layers formed on the first conductive layers. The second insulative unit is formed between the first conductive layers and between the second conductive layers. | 09-17-2009 |
20090278159 | SEMICONDUCTOR CHIP PACKAGE STRUCTURE WITHOUT SUBSTRATES FOR ACHIEVING FACE-UP ELECTRICAL CONNECTION WITHOUT USING A WIRE-BONDING PROCESS AND METHOD FOR MAKING THE SAME - A semiconductor chip package structure without substrates for achieving face-up electrical connection without using a wire-bonding process includes a package unit, a semiconductor chip, a first insulative unit, a first conductive unit, a second conductive unit, and a second insulative unit. The package unit has a central receiving groove for receiving the semiconductor chip. The semiconductor chip has a plurality of conductive pads. The first insulative unit has a first insulative layer formed between the conductive pads. The first conductive unit has a plurality of first conductive layers. The second conductive unit has a plurality of second conductive layers formed on the first conductive layers. The second insulative unit is formed between the first conductive layers and between the second conductive layers. | 11-12-2009 |
20090283881 | SEMICONDUCTOR CHIP PACKAGE STRUCTURE FOR ACHIEVING FACE-DOWN ELECTRICAL CONNECTION WITHOUT USING A WIRE-BONDING PROCESS AND METHOD FOR MAKING THE SAME - A semiconductor chip package structure for achieving face-down electrical connection without using a wire-bonding process includes a package unit, a semiconductor chip, a substrate unit, a first insulative unit, a first conductive unit, a second conductive unit, and a second insulative unit. The semiconductor chip has a plurality of conductive pads. The first insulative unit has a first insulative layer formed between the conductive pads. The first conductive unit has a plurality of first conductive layers, and one side of each first conductive layer is electrically connected with the corresponding conductive pad. The second conductive unit has a plurality of second conductive layers respectively formed on the first conductive layers. The second insulative unit is formed between the first conductive layers and between the second conductive layers. | 11-19-2009 |
20110003434 | SEMICONDUCTOR CHIP PACKAGE STRUCTURE FOR ACHIEVING FACE-UP ELECTRICAL CONNECTION WITHOUT USING A WIRE-BONDING PROCESS AND METHOD FOR MAKING THE SAME - A semiconductor chip package structure for achieving face-up electrical connection without using a wire-bonding process includes a package unit, a semiconductor chip, a substrate unit, a first insulative unit, a first conductive unit, a second conductive unit, and a second insulative unit. The package unit has a central receiving groove and an outer receiving groove formed around the central receiving groove. The semiconductor chip has a plurality of conductive pads. The first insulative unit has a first insulative layer formed between the conductive pads. The first conductive unit has a plurality of first conductive layers. The second conductive unit has a plurality of second conductive layers formed on the first conductive layers. The second insulative unit is formed between the first conductive layers and between the second conductive layers. | 01-06-2011 |
20110155436 | CONDUCTIVE SUBSTRATE STRUCTURE WITH CONDUCTIVE CHANNELS FORMED BY USING A TWO-SIDED CUT APPROACH AND A METHOD FOR MANUFACTURING THE SAME - A conductive substrate structure includes a substrate unit, a conductive pad unit, and a conductive layer unit. The substrate unit has a top surface, a bottom surface, two opposite lateral surfaces, and a front surface. The conductive pad unit has at least two first conductive pads separated from each other and disposed on the top surface, and at least two second conductive pads separated from each other and disposed on the bottom surface. The conductive layer unit has at least two first conductive layers formed on the front surface and respectively electrically connected to two front sides of the two first conductive pads, and at least two second conductive layers respectively formed on the two opposite lateral surfaces and respectively electrically connected to two opposite lateral sides of the two second conductive pads. The two first conductive layers are respectively electrically connected with the two second conductive layers. | 06-30-2011 |
20110304020 | WAFER LEVEL DIODE PACKAGE STRUCTURE - A wafer level vertical diode package structure includes a first semiconductor layer, a second semiconductor layer, an insulative unit, a first conductive structure, and a second conductive structure. The second semiconductor layer is connected with one surface of the first semiconductor layer. The insulative unit is disposed around a lateral side of the first semiconductor layer and a lateral side of the second semiconductor layer. The first conductive structure is formed on a top surface of the first semiconductor layer and on one lateral side of the insulative layer. The second conductive structure is formed on a top surface of the second semiconductor layer and on another opposite lateral side of the insulative layer. | 12-15-2011 |
20120009699 | WAFER LEVEL LED PACKAGE STRUCTURE FOR INCREASE LIGHT-EMITTING EFFICIENCY AND METHOD FOR MAKING THE SAME - A wafer level LED package structure for increasing light-emitting efficiency includes: a light-emitting unit, an insulating unit, two first conductive units and two second conductive units. The light-emitting unit has a light-emitting body, a positive conductive layer, a negative conductive layer, and a reflecting insulating layer formed between the positive conductive layer and the negative conductive layer. The light-emitting body has a bottom material layer and a top material layer. The insulating unit is formed around an outer area of a top surface of the bottom material layer and formed on a top surface of the reflecting insulating layer. One first conductive unit is formed on one part of the positive conductive layer and the insulating unit, and another first conductive unit is formed on one part of the negative conductive layer and the insulating unit. The two second conductive units are respectively formed on the two first conductive units. | 01-12-2012 |
20120037937 | LED PACKAGE STRUCTURE AND METHOD OF MAKING THE SAME - An LED package structure includes a substrate unit, a conductive unit, a heat-dissipating unit, a light-emitting unit and a package unit. The substrate unit includes an insulating substrate. The conductive unit includes two top conductive pads disposed on top surface of the insulating substrate, two bottom conductive pads disposed on bottom surface of the insulating substrate, and a plurality of penetrating conductive posts passing the insulating substrate. The two top conducive pads respectively electrically connect the two bottom conductive pads through the penetrating conductive posts. The heat-dissipating unit includes a top heat-dissipating block and a bottom heat-dissipating block respectively disposed on top and bottom surfaces of the insulating substrate. The light-emitting unit includes a light-emitting element on the top heat-dissipating block and electrically connected between the two top conductive pads. The package unit includes a package resin on the conductive unit and the heat-dissipating unit to cover the light-emitting element. | 02-16-2012 |
20120096710 | CONDUCTIVE SUBSTRATE STRUCTURE WITH CONDUCTIVE CHANNELS FORMED BY USING A TWO-SIDED CUT APPROACH AND A METHOD FOR MANUFACTURING THE SAME - A conductive substrate structure includes a substrate unit, a conductive pad unit, and a conductive layer unit. The substrate unit has a top surface, a bottom surface, two opposite lateral surfaces, and a front surface. The conductive pad unit has at least two first conductive pads separated from each other and disposed on the top surface, and at least two second conductive pads separated from each other and disposed on the bottom surface. The conductive layer unit has at least two first conductive layers formed on the front surface and respectively electrically connected to two front sides of the two first conductive pads, and at least two second conductive layers respectively formed on the two opposite lateral surfaces and respectively electrically connected to two opposite lateral sides of the two second conductive pads. The two first conductive layers are respectively electrically connected with the two second conductive layers. | 04-26-2012 |
20120106171 | LED PACKAGE STRUCTURE - An LED package structure includes a conductive substrate unit, a first insulative unit, a second insulative unit, a light-emitting unit and a package unit. The conductive substrate unit includes at least two conductive bases and at least one gap is formed between the two conductive bases. The first insulative unit includes at least one first insulative layer filled in the gap to join the two conductive bases. The second insulative unit includes at least one second insulative layer disposed on the conductive substrate unit and a plurality of openings passing through the second insulative layer for exposing one part of the top surface of each conductive base. The light-emitting unit includes at least one light-emitting element passing one of the openings and electrically connected between the two conductive bases. The package unit includes a package resin body disposed on the second insulative unit to cover the light-emitting element. | 05-03-2012 |
20120119231 | LED PACKAGE STRUCTURE WITH A DEPOSITED-TYPE PHOSPHOR LAYER AND METHOD FOR MAKING THE SAME - An LED package structure with a deposited-type phosphor layer includes a substrate unit, a light-emitting unit and a package unit. The substrate unit includes at least one circuit substrate. The light-emitting unit includes a plurality of LED chips disposed on and electrically connected to the at least one circuit substrate. The package unit includes at least one package resin body formed by a mold structure. The at least one package resin body is formed on the at least one circuit substrate to cover the LED chips, and the at least one package resin body includes a continuous phosphor layer formed therein and deposited on outer surfaces of the LED chips by centrifugal force. Hence, the instant disclosure provides the continuous phosphor layer with the deposited phosphor powders for covering the outer surfaces of the LED chips, thus the light-emitting efficiency of the LED package structure can be increased actually. | 05-17-2012 |
20120122254 | WHITE LIGHT-EMITTING DIODE PACKAGE STRUCTURE FOR SIMPLIFYING PACKAGE PROCESS AND METHOD FOR MAKING THE SAME - A white light-emitting diode package structure for simplifying package process includes a substrate unit, a light-emitting unit, a phosphor unit and a conductive unit. The light-emitting unit is disposed on the substrate, and the light-emitting unit has a positive conductive layer and a negative conductive layer. The phosphor unit has a phosphor layer formed on the light-emitting unit and at least two openings for respectively exposing one partial surface of the positive electrode layer and one partial surface of the negative electrode layer. The conductive unit has at least two conductive wires respectively passing through the two openings in order to electrically connect the positive electrode layer with the substrate unit and electrically connect the negative electrode layer with the substrate unit. | 05-17-2012 |
Patent application number | Description | Published |
20100032706 | WAFER LEVEL LED PACKAGE STRUCTURE FOR INCREASING CONDUCTIVE AREA AND HEAT-DISSIPATING AREA AND METHOD FOR MAKING THE SAME - A wafer level LED package structure includes a light-emitting unit, a first conductive unit, a second conductive unit and an insulative unit. The light-emitting unit has a light-emitting body, a positive conductive layer and a negative conductive layer formed on the light-emitting body, and a first insulative layer formed between the positive conductive layer and the negative conductive layer. The first conductive unit has a first positive conductive layer formed on the positive conductive layer and a first negative conductive layer formed on the negative conductive layer. The second conductive unit has a second positive conductive layer formed on the first positive conductive layer and a second negative conductive layer formed on the first negative conductive layer. The insulative unit has a second insulative layer formed on the first insulative layer and disposed between the second positive conductive layer and the second negative conductive layer. | 02-11-2010 |
20100127292 | Wafer level led package structure for increasing light-emitting efficiency and method for making the same - A wafer level LED package structure for increasing light-emitting efficiency includes: a light-emitting unit, an insulating unit, two first conductive units and two second conductive units. The light-emitting unit has a light-emitting body, a positive conductive layer, a negative conductive layer, and a reflecting insulating layer formed between the positive conductive layer and the negative conductive layer. The light-emitting body has a bottom material layer and a top material layer. The insulating unit is formed around an outer area of a top surface of the bottom material layer and formed on a top surface of the reflecting insulating layer. One first conductive unit is formed on one part of the positive conductive layer and the insulating unit, and another first conductive unit is formed on one part of the negative conductive layer and the insulating unit. The two second conductive units are respectively formed on the two first conductive units. | 05-27-2010 |
20100176502 | Wafer level vertical diode package structure and method for making the same - A wafer level vertical diode package structure includes a first semiconductor layer, a second semiconductor layer, an insulative unit, a first conductive structure, and a second conductive structure. The second semiconductor layer is connected with one surface of the first semiconductor layer. The insulative unit is disposed around a lateral side of the first semiconductor layer and a lateral side of the second semiconductor layer. The first conductive structure is formed on a top surface of the first semiconductor layer and on one lateral side of the insulative layer. The second conductive structure is formed on a top surface of the second semiconductor layer and on another opposite lateral side of the insulative layer. | 07-15-2010 |
20100264435 | White light-emitting diode package structure for simplifying package process and method for making the same - A white light-emitting diode package structure for simplifying package process includes a substrate unit, a light-emitting unit, a phosphor unit and a conductive unit. The light-emitting unit is disposed on the substrate, and the light-emitting unit has a positive conductive layer and a negative conductive layer. The phosphor unit has a phosphor layer formed on the light-emitting unit and at least two openings for respectively exposing one partial surface of the positive electrode layer and one partial surface of the negative electrode layer. The conductive unit has at least two conductive wires respectively passing through the two openings in order to electrically connect the positive electrode layer with the substrate unit and electrically connect the negative electrode layer with the substrate unit. | 10-21-2010 |
Patent application number | Description | Published |
20090084758 | METHOD AND APPARATUS FOR SHAPING GAS PROFILE NEAR BEVEL EDGE - A method for etching a bevel edge of a substrate in a processing chamber is provided. The method includes flowing an inert gas into a center region of the processing chamber defined above a center region of the substrate and flowing a mixture of an inert gas and a processing gas over an edge region of the substrate. The method further includes striking a plasma in the edge region, wherein the flow of the inert gas and the flow of the mixture maintain a mass fraction of the processing gas substantially constant. A processing chamber configured to clean a bevel edge of a substrate is also provided. | 04-02-2009 |
20090088887 | OFFSET CORRECTION TECHNIQUES FOR POSITIONING SUBSTRATES WITHIN A PROCESSING CHAMBER - A method for aligning a substrate to a process center of a support mechanism is provided. The method includes determining substrate thickness after substrate processing at a plurality of orientations and at a plurality of radial distances from a geometric center of the substrate. The method also includes deriving a set of process rate values from substrate thickness and process duration. The method further includes creating for a process rate an off-centered plot which represents a substantially concentric circle whose points are a circumference of the off-centered plot having substantially the first process rate. The method yet also includes applying a curve-fitting equation to the off-centered plot to determine a set of parameters. The method yet further includes teaching a set of robot arms the set of parameters, thereby enabling the set of robot arms to align another substrate that is supported by the support mechanism with the process center. | 04-02-2009 |
20090279989 | DYNAMIC ALIGNMENT OF WAFERS USING COMPENSATION VALUES OBTAINED THROUGH A SERIES OF WAFER MOVEMENTS - Methods and systems to optimize wafer placement repeatability in semiconductor manufacturing equipment using a controlled series of wafer movements are provided. In one embodiment, a preliminary station calibration is performed to teach a robot position for each station interfaced to facets of a vacuum transfer module used in semiconductor manufacturing. The method also calibrates the system to obtain compensation parameters that take into account the station where the wafer is to be placed, position of sensors in each facet, and offsets derived from performing extend and retract operations of a robot arm. In another embodiment where the robot includes two arms, the method calibrates the system to compensate for differences derived from using one arm or the other. During manufacturing, the wafers are placed in the different stations using the compensation parameters. | 11-12-2009 |
20100010754 | Artificial Lateral Line - An artificial sensor comprises at least one substrate, and a plurality of flow sensors disposed on the at least one substrate for providing a plurality of spatial-temporally varying signals representing a hydrodynamic stimulus. The plurality of flow sensors are spatially distributed on the at least one substrate. A processor is coupled to the plurality of flow sensors for receiving the signals and determining spatial-temporal information from the received signals. | 01-14-2010 |
20100175830 | LOW-K DAMAGE AVOIDANCE DURING BEVEL ETCH PROCESSING - A method for etching a bevel edge of a substrate is provided. A patterned photoresist mask is formed over the etch layer. The bevel edge is cleaned comprising providing a cleaning gas comprising at least one of a CO | 07-15-2010 |
20110146703 | METHOD AND APPARATUS FOR PROCESSING BEVEL EDGE - A method and apparatus for processing a bevel edge is provided. A substrate is placed in a bevel processing chamber and a passivation layer is formed on the substrate only around a bevel region of the substrate using a passivation plasma confined in a peripheral region of the bevel processing chamber. The substrate may undergo a subsequent semiconductor process, during which the bevel edge region of the substrate is protected by the passivation layer. Alternatively, the passivation layer may be patterned using a patterning plasma formed in an outer peripheral region of the processing chamber, the patterning plasma being confined by increasing plasma confinement. The passivation layer on outer edge portion of the bevel region is removed, while the passivation layer on an inner portion of the bevel region is maintained. The bevel edge of the substrate may be cleaned using the patterned passivation layer as a protective mask. | 06-23-2011 |
20110232566 | METHOD AND APPARATUS FOR SHAPING A GAS PROFILE NEAR BEVEL EDGE - A method for etching a bevel edge of a substrate in a processing chamber is provided. The method includes flowing an inert gas into a center region of the processing chamber defined above a center region of the substrate and flowing a mixture of an inert gas and a processing gas over an edge region of the substrate. The method further includes striking a plasma in the edge region, wherein the flow of the inert gas and the flow of the mixture maintain a mass fraction of the processing gas substantially constant. A processing chamber configured to clean a bevel edge of a substrate is also provided. | 09-29-2011 |
20130299089 | LOW-K DAMAGE AVOIDANCE DURING BEVEL ETCH PROCESSING - An apparatus for etching a bevel edge of a substrate includes a bevel etch chamber and a controller including non-transitory computer readable media. The computer readable media includes computer readable code for providing a cleaning gas comprising at least one of a CO | 11-14-2013 |
Patent application number | Description | Published |
20090283877 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device and manufacturing method thereof are disclosed. The device comprises a semiconductor die, a passivation layer, a wiring redistribution layer (RDL), an Ni/Au layer, and a solder mask. The semiconductor die comprises a top metal exposed in an active surface thereof. The passivation layer overlies the active surface of the semiconductor die, and comprises a through passivation opening overlying the top metal. The wiring RDL, comprising an Al layer, overlies the passivation layer, and electrically connects to the top metal via the passivation opening. The solder mask overlies the passivation layer and the wiring RDL, exposing a terminal of the wiring RDL. | 11-19-2009 |
20110140248 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device and manufacturing method thereof are disclosed. The device comprises a semiconductor die, a passivation layer, a wiring redistribution layer (RDL), an Ni/Au layer, and a solder mask. The semiconductor die comprises a top metal exposed in an active surface thereof. The passivation layer overlies the active surface of the semiconductor die, and comprises a through passivation opening overlying the top metal. The wiring RDL, comprising an Al layer, overlies the passivation layer, and electrically connects to the top metal via the passivation opening. The solder mask overlies the passivation layer and the wiring RDL, exposing a terminal of the wiring RDL. | 06-16-2011 |
Patent application number | Description | Published |
20080245146 | Sealed fuel level detector - A fuel level detector has a float connected to an arm that rotates a pivot pin. The pivot pin rotates in a hole in the wall of the detector, and the hole is sealed by a sleeve. One end of the sleeve is sealed to the housing of the detector surrounding the hole, and the opposite end of the sleeve is sealed around the outer surface of the pin. | 10-09-2008 |
20080315821 | Device for finding a home position for a moveable member - A device for finding a home position of a moveable member includes a magnet mounted on the moveable member and two switch-type Hall effect detectors, one on each side of the home position and equally spaced from the home position. The device includes a device for measuring movement of the moveable member and a microprocessor with a memory that receives information from the two Hall effect detectors and the device for measuring movement. | 12-25-2008 |
20090104058 | Sealed pump - A liquid pump has an annular stator having wire windings that extend around a generally tubular central opening. An inner housing made of a non-ferrous material has an inner opening, an input end, and an output end such that liquid can enter the input end, pass through the inner opening and exit through the output end. A portion of the housing extends through the central opening of the stator and a brushless rotor mounted on a shaft is positioned entirely within the housing to thereby seal the shaft from leakage. A drive attached to the shaft urges the liquid from the input end of the housing to the output. | 04-23-2009 |
20090243788 | Fan Resistor - A fan resistor is formed with a resistive pattern of electrically conductive material sandwiched between two panels of thermally conductive material. An insulating barrier on each surface of the resistive pattern electrically insulates it from the thermally conductive panels. The resistive pattern is cut from a sheet of metal using a stamping machine and the cut resistive pattern is dropped on one of the panels, a surface of which has an electrically insulating barrier thereon. | 10-01-2009 |
20110287323 | Electrode and Insulator Structure for Battery and Method of Manufacture - A battery core is made from a strip of insulating material folded longitudinally to form parallel panels. In one embodiment there are four panels and in another five panels. A positive electrode strip has an exposed foil center strip and positive electrode material along both edges. The positive electrode is folded around one fold of the insulator with the strip of foil exposed at the fold. A negative electrode strip has an exposed center strip and negative electrode material along both edges. The negative electrode is folded around a different fold of the insulator with the strip of foil exposed. | 11-24-2011 |