Patent application number | Description | Published |
20080288809 | MEMORY CONTROLLER FOR WRITING DATA INTO AND READING DATA FROM A MEMORY - According to an aspect of an embodiment, a memory controller for writing data into and reading data from a memory, comprises an error detector for detecting an error of data stored in the memory when reading the data, a time stamper for generating first time information indicative of the time when data is written into the memory, the first time information being written together with the data into an address location of the memory where the error has been detected, a timer for measuring a time period from the time indicated by the first time information until the time of subsequent occurrence of an error of data stored in said address location and a counter for counting a number of accesses to the address location over the time period. | 11-20-2008 |
20090249152 | TRANSMISSION SYSTEM, TRANSMISSION METHOD AND COMMUNICATION DEVICE - A transmission method for transmitting information between a transmission device and a reception device, the method includes determining whether or not an error is detected in information from the transmission device, requesting the transmission device to re-transmit the error-detected information when an error is detected, re-transmitting information corresponding to a re-transmission request as re-transmission information from the transmission device when the re-transmission request is detected, registering the re-transmission information as a test pattern, transmitting the registered test pattern to the reception device, registering the re-transmission data received from the transmission device as a collation pattern, reading out the collation pattern corresponding to the received test pattern, and collating the test pattern and the collation pattern when a test pattern is received from the transmission device, and adjusting and setting a parameter of the reception device on the basis of a pattern collation result. | 10-01-2009 |
20090276659 | Method and apparatus for handling failure in address line - An address line failure handling apparatus includes a failed address line specifying unit that examines the address line connected to each bit and specifies a failed address line, an address line substituting unit in which an upper address line connected to an upper bit of the memory is connected with a branch address line branched off from a lower address line connected to a lower bit other than the upper bit, and that switches between an input from the upper address line and an input from the branch address line, and outputs any of the inputs to the upper bit, and an address line substitution instructing unit that instructs the address line substituting unit to switch from the upper address line to the branch address line branched off from the failed address line when the failed address line is specified. | 11-05-2009 |
20090291653 | Radio Transmission Apparatus - A radio transmission apparatus performs peak suppression processing in the two stages of pre-peak suppression processing and post-peak suppression processing. The gain adjustment processing of transmission power is performed in the two stages of coarse gain adjustment processing, prior to the pre-peak suppression processing, and fine gain adjustment processing prior to the post-peak suppression processing. The fine gain adjustment processing has a smaller adjustment step width than the coarse gain adjustment processing, and can adjust the transmission power in response to a small variation of the transmission power. In the pre-peak suppression processing, a peak suppression value corresponding to the gain set by the coarse gain adjustment processing is set on the basis of each value being preset in a table for each transmission power value. In the post-peak suppression processing, the peak suppression value corresponding to the gain modified by the fine gain adjustment processing is obtained by calculation. | 11-26-2009 |
20100023827 | SOFT ERROR CORRECTION METHOD, MEMORY CONTROL APPARATUS AND MEMORY SYSTEM - A soft error correction method is for a memory system having memory access controllers accessing memories for storing byte-sliced data in cycle synchronism, and a system controller receiving a memory access from an arbitrary one of MPUs and issuing a memory address to the memory access controllers. When a correctable error is detected in data read from one memory, an error address where the error was detected is held within a memory access controller, and an error notification is made to the system controller from the memory access controller. In response to the error notification, the memory access controller holds the error address from the system controller without intervention from the MPUs, and reads, corrects and rewrites the data to the error address. | 01-28-2010 |
20100073853 | Housing and electronic device - A housing includes a pair of housing walls that face each other with an inner space therebetween. The housing further includes: a first projection that projects from a first housing wall of the pair of housing walls toward a second housing wall of the pair of housing walls and abuts the second housing wall; and a second projection that projects from the second housing wall toward the first housing wall and engages in the first projection thereby preventing separation of the pair of housing walls. | 03-25-2010 |
20100073875 | Cooling unit and electronic device - A cooling unit includes: a heat-radiating section in which a coolant flows and which radiates heat caught by the coolant; and a path where the coolant flows through the heat-radiating section; a pump on the path to cause the coolant to flow; and heat absorbing sections disposed on the path to touch heat-producing elements having different heating values, in which the coolant runs to absorb heat produced by the heat-producing elements. One of the heat-absorbing sections is a maximum-heat-absorbing section that touches a maximum-heat-producing element and is disposed downstream from the pump and upstream from the heat-radiating section in a flow of the coolant on the path. Another one of the heat absorbing sections is a low-heat absorbing section that touches the heat-producing element except the maximum-heat-producing element and is disposed upstream from the pump and downstream from the heat-radiating section in the flow of the coolant on the path. | 03-25-2010 |
20100073901 | Electronic device - An electronic device includes: a board; a housing in which a concave section for accommodating the board is formed; and a holding sheet laid in the concave section and holds the board in the concave section by covering the board. | 03-25-2010 |
20100106901 | MEMORY REFRESHING APPARATUS AND METHOD FOR MEMORY REFRESH - The optimization of a refresh cycle is carried out in harmony with the error occurrence state in the memory with the presence of a normal patrol controlling section controlling a normal patrol operation that patrols the memory; an additional patrol controlling section controlling an additional patrol operation that patrols, if a first error in the memory is detected during the normal patrol operation, an error occurring area in which the first error occurs and which is included in the memory; a measuring section ( | 04-29-2010 |
20100300739 | ELECTRONIC APPARATUS AND REINFORCING COMPONENT - An electronic apparatus includes a substrate including a wire, an electronic component and a reinforcing component. The electronic component includes a plate-like external shape including a corner at an outer periphery, where the electronic component is mounted on the substrate and connected with the wire at a surface of the electronic component that faces the substrate. The reinforcing component includes a rigidity higher than a rigidity of the substrate, the reinforcing component includes a frame fixed to the substrate at a position where the frame surrounds the electronic component and a pressing portion that projects inward from the frame and that presses at least the corner of the electronic component against the substrate. | 12-02-2010 |
20100304694 | WIRELESS COMMUNICATION APPARATUS - A wireless communication apparatus configured to amplify a transmission signal at an amplifier and transmit the amplified transmission signal, the wireless communication apparatus includes a memory configured to store a distortion compensation coefficient for compensating a distortion characteristic of the amplifier, and an electrical-power measuring unit configured to measure electrical power of the transmission signal. The wireless communication apparatus includes a gain control unit configured to calculate a gain adjustment value for correcting the distortion compensation coefficient stored in the memory based on a power value measured by the electrical-power measuring unit, and a distortion-compensation processing unit configured to perform distortion compensation on the transmission signal based on the distortion compensation coefficient stored in the memory and the gain adjustment value. | 12-02-2010 |
20110124304 | TRANSMISSION APPARATUS AND ADJUSTMENT VALUE MEASUREMENT METHOD - A transmission apparatus performs distortion compensation on a power amplifier using a distortion compensator that includes an adaptive equalizer. The transmission apparatus includes a filter coefficient storage unit that stores filter coefficients that are each set in a digital filter of the adaptive equalizer; a filter coefficient setting unit that selects a filter coefficient from the filter coefficient storage unit according to a feedback signal from the power amplifier; an adjustment value storage unit that stores adjustment values in association with transmission frequencies, the adjustment values each being used by the filter coefficient setting unit to select the filter coefficient; and an initial value setting unit that reads an adjustment value corresponding to a transmission frequency, which is set in the transmission apparatus, from the adjustment value storage unit and sets the read adjustment value as an initial value of the adjustment value used for selecting the filter coefficient. | 05-26-2011 |
20110128977 | Data transfer device, data transmitting device, data receiving device, and data transfer method - The change of the transfer mode is notified using a predetermined bit in a header of a packet. Accordingly, the transfer mode can be dynamically switched from a DDR to a SDR, in which power consumption is low, without complicating the configuration. When the transfer mode is the SDR, further power saving is realized by changing the slew rate or stopping some circuits. | 06-02-2011 |
20110222630 | COMMUNICATION DEVICE AND POWER CORRECTION METHOD - A communication device that compensates a distortion of a transmission signal, amplifies the compensated transmission signal by an amplifier, and outputs the signal. The device includes a storage unit that stores a transmission characteristic of a transmission power of the communication device, a correcting unit that calculates a power value at a set transmission frequency by referring to the storage unit and that corrects a feedback signal of the transmission signal amplifier by the amplifier based on the calculated power value and a maximum transmission power defined by the communication device, and a calculating unit that calculates a distortion compensation coefficient based on the transmission signal and the feedback signal corrected. | 09-15-2011 |
20120176744 | SYSTEM AND EXPANSION APPARATUS - A system includes a first apparatus and a second apparatus. The first apparatus includes a first surface, a depression in the first surface, and a first connector disposed on the first surface. The depression has a bottom with a hole through which a screw for assembling the apparatus is passed and accommodates the head of the screw. The second apparatus includes a second surface facing the first surface when the first apparatus is detachably attached, a second connector disposed on the second surface and engaging with the first connector, and a protrusion fixed into the depression when the first apparatus is attached. | 07-12-2012 |
20120229435 | DISPLAY DEVICE AND ELECTRONIC DEVICE - A display device includes a display module including a display screen and displaying an image on the display screen; a chassis containing the display module, exposing the display screen, and holding the display screen so as to stand the display screen; a light receiving window disposed on a first part on the chassis, the first part being adjacent to a second part where the display screen is exposed, shifted toward a back side from a surface of the chassis on a periphery of the second part, and receiving incident light from outside of the chassis into the chassis; and an illumination sensor contained in the chassis, detecting illuminance of incident light through the light receiving window, and having an illuminance detection range having a center line extending in a direction inclined downward from a direction of a normal line of the display screen. | 09-13-2012 |