Patent application number | Description | Published |
20120239844 | DATA STORAGE SYSTEM FOR MANAGING SERIAL INTERFACE CONFIGURATION BASED ON DETECTED ACTIVITY - According to one aspect, a data storage system is disclosed. In one embodiment, the data storage system includes a storage backplane having a plurality of drive slots configured to operatively connect to a corresponding plurality of mass storage devices, a first serial interface operative to communicatively connect one or more sets of the plurality of drive slots to a host bus adapter (HBA), according to a first drive slot assignment, a second serial interface operative to communicatively connect one or more sets of the plurality of drive slots to the HBA, according to a second drive slot assignment, and a backplane controller operatively connected to the first serial interface and the second serial interface, operative to detect the activity status on the first serial interface and the activity status on the second serial interface and, if a change in the activity status is detected for at least one of the first serial interface and the second serial interface, modify the first drive slot assignment and the second drive slot assignment. | 09-20-2012 |
20120239845 | BACKPLANE CONTROLLER FOR MANAGING SERIAL INTERFACE CONFIGURATION BASED ON DETECTED ACTIVITY - According to one aspect, a backplane controller of a storage backplane is disclosed, the storage backplane having a plurality of drive slots configured to operatively connect to a corresponding plurality of mass storage devices. In one embodiment, the backplane controller is operative to perform functions that include detecting activity status on a first serial interface that is configured to operatively connect one or more sets of a plurality of drive slots on the storage backplane to a host bus adapter (HBA), according to a first drive slot assignment. The backplane controller is further operative to detect an activity status on a second serial interface that is configured to operatively connect one or more sets of a plurality of drive slots on the storage backplane to the HBA, according to a second drive slot assignment. The backplane controller is also operative to, if a change in the activity status is detected for at least one of the first serial interface and the second serial interface, modify the first drive slot assignment and the second drive slot assignment. | 09-20-2012 |
20120246385 | EMULATING SPI OR 12C PROM/EPROM/EEPROM USING FLASH MEMORY OF MICROCONTROLLER - In one aspect, a microcontroller is disclosed. In one embodiment, the microcontroller includes a system memory that has an erasable memory of a first type, with a first storage partition and a second, different storage partition. The system memory also has a random access memory (RAM). The microcontroller further includes a network interface that is configured to communicate management commands over a communications link, and a programmable processor that is operatively connected to the system memory and the network interface. The communications link includes an interface bus and is configured for one or more of I2C, SPI, and system management bus communications. The programmable processor is programmed to perform functions that include receiving a first management command configured for the erasable memory of the first type, causing the second storage partition of the erasable memory of the first type to emulate a second type of erasable memory, and receiving a second management command configured for the second type of erasable memory. | 09-27-2012 |
20130080697 | DRIVE MAPPING USING A PLURALITY OF CONNECTED ENCLOSURE MANAGEMENT CONTROLLERS - According to one aspect, a computing system having a plurality of enclosure management controllers (EMCs) is disclosed. In one embodiment, the EMCs are communicatively coupled to each other and each EMC is operatively connected to a corresponding plurality of drive slots and at least one of a plurality of drive slot status indicators. Each EMC is operative to receive enclosure management data, detect an operational status of the drive slots, and generate drive slot status data. One of the EMCs is configured to function at least partly as a master EMC to receive drive slot status data and, based on received enclosure management data and received drive slot status data, generate mapped data for each one of the EMCs for selectively activating at least one of the drive slot status indicators to indicate corresponding operational status. | 03-28-2013 |
20150100298 | TECHNIQUES FOR VALIDATING FUNCTIONALITY OF BACKPLANE CONTROLLER CHIPS - Present disclosure relates to a system for validating target backplane controller chips. The system includes a backplane controller chip validation board. In certain embodiments, the backplane controller chip validation board includes: (a) a program/verify/validate controller chip, (b) one or more backplane controller chip sockets for installing one or more target backplane controller chips, and (c) a backplane simulator. The program/verify/validate controller chip includes backplane controller chip firmware verification software, a USB interface, and a software storage. The backplane simulator is used to simulate functions of drives, LEDs, and other devices of a backplane for verifying all functions of target backplane controller chips. The backplane controller chip validation board is in communication with a host computer, and the host computer has a user interface, a backplane controller chip validation software, a USB interface, and a software storage to store backplane controller chip firmware. | 04-09-2015 |
20150100299 | TECHNIQUES FOR PROGRAMMING AND VERIFYING BACKPLANE CONTROLLER CHIP FIRMWARE - Present disclosure relates to a system for programming and verifying backplane controller chip firmware on target backplane controller chips. The system includes a backplane controller chip validation board. In certain embodiments, the backplane controller chip validation board includes: (a) a program/verify/validate controller chip, (b) one or more backplane controller chip sockets for installing one or more target backplane controller chips, and (c) a backplane simulator. The program/verify/validate controller chip includes backplane controller chip firmware verification software, a USB interface, and a software storage. The backplane simulator is used to simulate functions of drives, LEDs, and other devices of a backplane for verifying all functions of backplane controller chip firmware. The backplane controller chip validation board is in communication with a host computer, and host computer has a user interface, a backplane controller chip programming and verifying software, a USB interface, and a software storage to store backplane controller chip firmware. | 04-09-2015 |
20150149684 | HANDLING TWO SES SIDEBANDS USING ONE SMBUS CONTROLLER ON A BACKPLANE CONTROLLER - Present disclosure relates to a computer-implemented method for handling two SES sidebands using one SMBUS controller. The method includes one or more of following operations: (a) establishing communication between a backplane controller and a host computer through HBA, (b) receiving control commands and control data from host computer for monitoring and controlling at least one drive of first and second group of drives, (c) determining address and device number of drive to which received control commands and control data are directed, (d) forwarding control commands and control data to first or second SMBUS sideband handler based on address received, (e) controlling the blinking of the LEDs of the drive by first or second SMBUS sideband handler, (f) generating responses by the first or second SMBUS sideband handler, (g) receiving responses by the SMBUS controller, and (h) sending the responses back to the host computer within a predetermined time period. | 05-28-2015 |
Patent application number | Description | Published |
20090275265 | ENDPOINT DETECTION IN CHEMICAL MECHANICAL POLISHING USING MULTIPLE SPECTRA - A computer implemented method includes obtaining at least one current spectrum with an in-situ optical monitoring system, comparing the current spectrum to a plurality of different reference spectra, and determining based on the comparing whether a polishing endpoint has been achieved for the substrate having the outermost layer undergoing polishing. The current spectrum is a spectrum of light reflected from a substrate having an outermost layer undergoing polishing and at least one underlying layer. The plurality of reference spectra represent spectra of light reflected from substrates with outermost layers having the same thickness and underlying layers having different thicknesses. | 11-05-2009 |
20090318060 | CLOSED-LOOP CONTROL FOR EFFECTIVE PAD CONDITIONING - A method and apparatus for conditioning a polishing pad is provided. The conditioning element is held by a conditioning arm rotatably mounted to a base at a pivot point. An actuator pivots the arm about the pivot point. The conditioning element is urged against the surface of the polishing pad, and translated with respect to the polishing pad to remove material from the polishing pad and roughen its surface. The interaction of the abrasive conditioning surface with the polishing pad surface generates a frictional force. The frictional force may be monitored by monitoring the torque applied to the pivot point, and material removal controlled thereby. The conditioning time, down force, translation rate, or rotation of the conditioning pad may be adjusted based on the measured torque. | 12-24-2009 |
20110256812 | CLOSED-LOOP CONTROL FOR IMPROVED POLISHING PAD PROFILES - Embodiments described herein use closed-loop control (CLC) of conditioning sweep to enable uniform groove depth removal across the pad, throughout pad life. A sensor integrated into the conditioning arm enables the pad stack thickness to be monitored in-situ and in real time. Feedback from the thickness sensor is used to modify pad conditioner dwell times across the pad surface, correcting for drifts in the pad profile that may arise as the pad and disk age. Pad profile CLC enables uniform reduction in groove depth with continued conditioning, providing longer consumables lifetimes and reduced operating costs. | 10-20-2011 |
20110281501 | FEEDBACK FOR POLISHING RATE CORRECTION IN CHEMICAL MECHANICAL POLISHING - A substrate having a plurality of zones is polished and spectra are measured. For each zone, a first linear function fits a sequence of index values associated with reference spectra that best match the measured spectra. A projected time at which a reference zone will reach the target index value is determined based on the first linear function, and for at least one adjustable zone, a polishing parameter adjustment is calculated such that the adjustable zone has closer to the target index at the projected time than without such adjustment. The adjustment is calculated based on a feedback error calculated for a previous substrate. The feedback error for a subsequent substrate is calculated based on a second linear function that fits a sequence of index values associated with reference spectra that best match spectra measured after the polishing parameter is adjusted. | 11-17-2011 |
20120009847 | CLOSED-LOOP CONTROL OF CMP SLURRY FLOW - Embodiments of the present invention generally relate to methods for chemical mechanical polishing a substrate. The methods generally include measuring the thickness of a polishing pad having grooves or other slurry transport features on a polishing surface. Once the depth of the grooves on the polishing surface is determined, a flow rate of a polishing slurry is adjusted in response to the determined groove depth. A predetermined number of substrates are polished on the polishing surface. The method can then optionally be repeated. | 01-12-2012 |
20120028813 | Selecting Reference Libraries For Monitoring Of Multiple Zones On A Substrate - A method of configuring a polishing monitoring system includes receiving user input selecting a plurality of libraries, each library of the plurality of libraries comprising a plurality of reference spectra for use in matching to measured spectra during polishing, each reference spectrum of the plurality of reference spectra having an associated index value, for a first zone of a substrate, receiving user input selecting a first subset of the plurality of libraries, and for a second zone of the substrate, receiving user input selecting a second subset of the plurality of libraries. | 02-02-2012 |
20120100779 | APPARATUS AND METHOD FOR COMPENSATION OF VARIABILITY IN CHEMICAL MECHANICAL POLISHING CONSUMABLES - Apparatus and methods for conditioning a polishing pad in a CMP system are provided. In one embodiment, a method includes performing a pre-polish process including urging a conditioner disk against a polishing surface of a polishing pad disposed in a polishing station, moving the conditioner disk relative to the polishing pad in a sweep pattern across the polishing surface while monitoring a rotational force value required to move the conditioner disk relative to the polishing pad, determining a metric indicative of an interaction between the conditioner disk and the polishing surface from the rotational force value, adjusting a polishing recipe in response to the metric, and polishing one or more substrates using the adjusted polishing recipe. | 04-26-2012 |
20120196511 | Gathering Spectra From Multiple Optical Heads - A polishing apparatus includes a platen to hold a polishing pad having a plurality of optical apertures, a carrier head to hold a substrate against the polishing pad, a motor to generate relative motion between the carrier head and the platen, and an optical monitoring system. The optical monitoring system includes at least one light source, a common detector, and an optical assembly configured to direct light from the at least one light source to each of a plurality of separated positions in the platen, to direct light from each position of the plurality of separated positions to the substrate as the substrate passes over said each position, to receive reflected light from the substrate as the substrate passes over said each position, and to direct the reflected light from each of the plurality of separated positions to the common detector. | 08-02-2012 |
20120231701 | FEEDBACK FOR POLISHING RATE CORRECTION IN CHEMICAL MECHANICAL POLISHING - A substrate having a plurality of zones is polished and spectra are measured. For each zone, a first linear function fits a sequence of index values associated with reference spectra that best match the measured spectra. A projected time at which a reference zone will reach the target index value is determined based on the first linear function, and for at least one adjustable zone, a polishing parameter adjustment is calculated such that the adjustable zone has closer to the target index at the projected time than without such adjustment. The adjustment is calculated based on a feedback error calculated for a previous substrate. The feedback error for a subsequent substrate is calculated based on a second linear function that fits a sequence of index values associated with reference spectra that best match spectra measured after the polishing parameter is adjusted. | 09-13-2012 |
20140113524 | ENDPOINTING WITH SELECTIVE SPECTRAL MONITORING - A method of controlling polishing includes polishing a substrate, monitoring the substrate during polishing with an in-situ spectrographic monitoring system to generate a sequence of measured spectra, selecting less than all of the measured spectra to generate a sequence of selected spectra, generating a sequence of values from the sequence of selected spectra, and determining at least one of a polishing endpoint or an adjustment for a polishing rate based on the sequence of values. | 04-24-2014 |
20140242881 | FEED FORWARD PARAMETER VALUES FOR USE IN THEORETICALLY GENERATING SPECTRA - A method of controlling a polishing operation is described. A controller stores an optical model for a layer stack having a plurality of layers and a plurality of input parameters including a first parameter and a second parameter. The controller stores data defining a plurality of default values for the first parameter and measures an optical property of a substrate and generates a second value. Using the optical model and the second value and iterating over the first values, a number of reference spectra are calculated. A spectrum is measured and the measured spectrum is matched to the reference spectra and the best matched reference spectrum is determined. The first value of the best matched reference spectrum is determined and is used to adjust a polishing endpoint or a polishing parameter of a polishing apparatus. | 08-28-2014 |
20140273749 | DYNAMIC RESIDUE CLEARING CONTROL WITH IN-SITU PROFILE CONTROL (ISPC) - A method for controlling the residue clearing process of a chemical mechanical polishing (“CMP”) process is provided. Dynamic in-situ profile control (“ISPC”) is used to control polishing before residue clearing starts, and then a new polishing recipe is dynamically calculated for the clearing process. Several different methods are disclosed for calculating the clearing recipe. First, in certain implementations when feedback at T0 or T1 methods are used, a post polishing profile and feedback offsets are generated in ISPC software. Based on the polishing profile and feedback generated from ISPC before the start of the clearing process, a flat post profile after clearing is targeted. The estimated time for the clearing step may be based on the previously processed wafers (for example, a moving average of the previous endpoint times). The calculated pressures may be scaled to a lower (or higher) baseline pressure for a more uniform clearing. | 09-18-2014 |
20150147829 | Limiting Adjustment of Polishing Rates During Substrate Polishing - A method of controlling polishing includes polishing a region of a substrate at a first polishing rate, measuring a sequence characterizing values for the region of the substrate during polishing with an in-situ monitoring system, determining a polishing rate adjustment for each of a plurality of adjustment times prior to a polishing endpoint time, and adjusting a polishing parameter to polish the substrate at a second polishing rate. The time period is greater than a period between the adjustment times and the projected time is before the polishing endpoint time. The second polishing rate is the first polishing rate as adjusted by the polishing rate adjustment. | 05-28-2015 |
20150147940 | Adjustment of Polishing Rates During Substrate Polishing With Predictive Filters - A measured characterizing value dependent on a thickness of a region of a substrate is input into a first predictive filter. The first predictive filter generates a filtered characterizing value. A measured characterizing rate at which the measured characterizing value changes is input into a second predictive filter. The second predictive filter generates a filtered characterizing rate of the region of the substrate. The measured characterizing value and the measured characterizing rate are determined based on in-situ measurements made at or before a first time during a polishing process of the substrate. A desired characterizing rate is determined to be used for polishing the region of the substrate after the first time and before a second, later time based on the filtered characterizing value and the filtered characterizing rate. | 05-28-2015 |
Patent application number | Description | Published |
20080197412 | MULTI-LAYER SOURCE/DRAIN STRESSOR - A method for forming a semiconductor device includes forming a recess in a source region and a recess in a drain region of the semiconductor device. The method further includes forming a first semiconductor material layer in the recess in the source region and a second semiconductor material layer in the recess in the drain region, wherein each of the first semiconductor material layer and the second semiconductor material layer are formed using a stressor material having a first ratio of an atomic concentration of a first element and an atomic concentration of a second element, wherein the first element is silicon and a first level of concentration of a doping material. The method further includes forming additional semiconductor material layers overlying the first semiconductor material layer and the second semiconductor material layer that have a different ratio of the atomic concentration of the first element and the second element. | 08-21-2008 |
20080293192 | SEMICONDUCTOR DEVICE WITH STRESSORS AND METHODS THEREOF - A semiconductor device is formed in a semiconductor layer. A gate dielectric is formed over a top surface of the semiconductor layer. A gate stack is over the gate dielectric. A sidewall spacer is formed around the gate stack. Using the sidewall spacer as a mask, an implant is performed to form deep source/drain regions in the semiconductor layer. Silicon carbon regions are formed on the deep source/drain regions and a top surface of the gate stack. The silicon carbon regions are silicided with nickel. | 11-27-2008 |
20080299724 | METHOD OF MAKING A SEMICONDUCTOR DEVICE WITH EMBEDDED STRESSOR - A method for forming a semiconductor device includes providing a semiconductor substrate; forming a gate dielectric over the semiconductor substrate; forming a gate electrode over the gate dielectric; forming an insulating layer over a sidewall of the gate electrode; defining source and drain regions in the semiconductor substrate adjacent to the insulating layer; implanting a dopant in the source and drain regions of the semiconductor substrate to form doped source and drain regions; forming a sidewall spacer adjacent to the insulating layer; forming a recess in the semiconductor substrate in the source and drain regions, wherein the recess extends directly underneath the spacer a predetermined distance from a channel regions; and forming a stressor material in the recess. The method allows the stressor material to be formed closer to a channel region, thus improving carrier mobility in the channel while not degrading short channel effects. | 12-04-2008 |
20090146180 | LDMOS WITH CHANNEL STRESS - A method of forming a metal oxide semiconductor (MOS) device comprises defining an active area in an unstrained semiconductor layer structure, depositing a hard mask overlying the active area and a region outside of the active area, patterning the hard mask to expose the active area, selectively growing a strained semiconductor layer overlying the exposed active area, and forming a remainder of the MOS device. The active area includes a first doped region of first conductivity type and a second doped region of second conductivity type. The strained semiconductor layer provides a biaxially strained channel for the MOS device. During a portion of forming the remainder of the MOS device, dopant of the first conductivity type of the first doped region of the active area and dopant of the second conductivity type of the second doped region of the active area diffuses into overlying portions of the strained semiconductor layer to create a correspondingly doped strained semiconductor layer, thereby providing corresponding doping for the biaxially strained channel. | 06-11-2009 |
20090221119 | FABRICATION OF A SEMICONDUCTOR DEVICE WITH STRESSOR - In a semiconductor fabrication process, an epitaxial layer is formed overlying a substrate, wherein there is a lattice mismatch between the epitaxial layer and the substrate. A hard mask having an opening is formed overlying the epitaxial layer. A recess is formed through the epitaxial layer and into the substrate. The recess is substantially aligned to the opening in the hard mask. A channel region of a semiconductor device is formed in the recess. | 09-03-2009 |