Patent application number | Description | Published |
20080224030 | NON-CONTACT THERMAL IMAGING SYSTEM FOR HETEROGENEOUS COMPONENTS - A non-contact thermal imaging system for heterogeneous materials, the system including a translating head that is parallel to a reference plane; an infrared probe connected to data acquisition electronics in order to collect first data, the first data being nitrated intensity readings; a transmitter for sending one or more signals to a sample; and a receiver for receiving the one or more signals from the sample; wherein the transmitter and the receiver measure an intensity of the one or more signals reflected off the sample as second data; and wherein the first data and the second data are combined via software to calculate a temperature at every point on the sample. | 09-18-2008 |
20080230901 | STRUCTURE FOR CONTROLLED COLLAPSE CHIP CONNECTION WITH DISPLACED CAPTURED PADS - A structure, for controlled collapse chip connection (C4) between an integrated circuit (IC) and a substrate, that alleviates the adverse effects resulting from induced stresses in C4 solder joints, the structure includes: a first and second array defined on the ball limiting metallurgy (BLM) side of the IC; a first and second array of surface mount (SM) pads arranged on the substrate placement side; and wherein the reduction of the adverse effects resulting from the induced stress in the solder joints is facilitated by varying the relative alignment of the first and second arrays of SM pads to the first and second arrays of solder balls. | 09-25-2008 |
20090298206 | METHOD AND APPARATUS TO MINIMIZE STRESS DURING REFLOW PROCESS - Utilizing an appropriately configured laser interferometer, the warpage of a silicon chip can be easily monitored during the solder reflow attachment process in an effort to determine the amount of stress encountered by the chip. Warpage measurements can then be continuously monitored throughout the process and related data can be stored to easily suggest the level of warpage generated by various processing parameters. By dynamically monitoring warpage in conjunction with processing parameters, a correlation can be established between the various parameters chosen, and resulting warpage. Based upon this correlation, the evaluators can easily identify those parameters which produce minimum stress, thus avoiding potential for breakage and damage during reflow operations. | 12-03-2009 |
20120205424 | Methods and Systems Involving Soldering - A method includes applying solder to conductive pads of a semiconductor device, applying solder to conductive pads of a substrate, aligning the solder on the semiconductor device with the solder on the substrate such that portions of the solder on the semiconductor device contact corresponding portions of the solder on the substrate, heating the semiconductor device and the substrate to liquefy the solder, and exerting an oscillating force operative to oscillate the semiconductor device relative to the substrate at a frequency. | 08-16-2012 |
20130284495 | ADDITIVES FOR GRAIN FRAGMENTATION IN Pb-FREE Sn-BASED SOLDER - In one embodiment of the present invention, inert nano-sized particles having dimensions from 1 nm to 1,000 nm are added into a solder ball. The inert nano-sized particles may comprise metal oxides, metal nitrides, metal carbides, metal borides, etc. The inert nano-sized particles may be a single compound, or may be a metallic material having a coating of a different material. In another embodiment of the present invention, a small quantity of at least one elemental metal that forms stable high melting intermetallic compound with tin is added to a solder ball. The added at least one elemental metal forms precipitates of intermetallic compounds with tin, which are dispersed as fine particles in the solder. | 10-31-2013 |
20140030827 | UNDERFILL ADHESION MEASUREMENTS AT A MICROSCOPIC SCALE - Methods and systems to method to determine an adhesion force of an underfill material to a chip assembled in a flip-chip module are provided. A method includes forming a flip-chip module including a chip connected to a substrate with a layer of underfill material adhered to the chip and the substrate. The method also includes forming a block from the layer of underfill material. The method further includes measuring a force required to shear the block from a surface of the flip-chip module. | 01-30-2014 |
20140131855 | THERMOCOMPRESSION FOR SEMICONDUCTOR CHIP ASSEMBLY - A method of assembling a semiconductor chip to a substrate wherein at least one of the semiconductor chip and substrate comprise solder bumps. The method includes aligning the semiconductor chip with the substrate; applying a compression force to the semiconductor chip to cause the solder bumps to deform between the semiconductor chip pads and the substrate pads, the compression force being applied while the semiconductor chip and substrate are held at a temperature above room temperature and below a temperature at which any liquid will form in at least one of the solder bumps; then applying an underfill material to fill the gap between the chip and substrate; and then heating the assembled semiconductor chip and substrate to an elevated temperature to cause the solder bumps to melt and reflow and form a metallurgical bond between the semiconductor chip pads and the substrate pads. | 05-15-2014 |