Patent application number | Description | Published |
20080241386 | Atomic Layer Deposition Methods - The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated. | 10-02-2008 |
20080268591 | Methods of Forming Capacitors - A method of forming a capacitor includes forming a first capacitor electrode over a semiconductor substrate. A capacitor dielectric region is formed onto the first capacitor electrode. The capacitor dielectric region has an exposed oxide containing surface. The exposed oxide containing surface of the capacitor dielectric region is treated with at least one of a borane or a silane. A second capacitor electrode is deposited over the treated oxide containing surface. The second capacitor electrode has an inner metal surface contacting against the treated oxide containing surface. Other aspects and implementations are contemplated. | 10-30-2008 |
20090061080 | METHODS FOR FORMING CONDUCTIVE STRUCTURES AND STRUCTURES REGARDING SAME - A method for forming a metal/metal oxide structure that includes forming metal oxide regions, e.g. ruthenium oxide regions, at grain boundaries of a metal layer, e.g., platinum. Preferably, the metal oxide regions are formed by diffusion of oxygen through grain boundaries of the metal layer, e.g., platinum, to oxidize a metal layer thereon, e.g, ruthenium layer. The structure is particularly advantageous for use in capacitor structures and memory devices, such as dynamic random access memory (DRAM) devices. | 03-05-2009 |
20090215252 | Methods of Depositing Materials Over Substrates, and Methods of Forming Layers over Substrates - The invention includes methods of utilizing supercritical fluids to introduce precursors into reaction chambers. In some aspects, a supercritical fluid is utilized to introduce at least one precursor into a chamber during ALD, and in particular aspects the supercritical fluid is utilized to introduce multiple precursors into the reaction chamber during ALD. The invention can be utilized to form any of various materials, including metal-containing materials, such as, for example, metal oxides, metal nitrides, and materials consisting of metal. Metal oxides can be formed by utilizing a supercritical fluid can be utilized to introduce a metal-containing precursor into reaction chamber, with the precursor then forming a metal-containing layer over a surface of a substrate. Subsequently, the metal-containing layer can be reacted with oxygen to convert at least some of the metal within the layer to metal oxide. | 08-27-2009 |
20110147935 | METHOD AND SYSTEM FOR BINDING HALIDE-BASED CONTAMINANTS - A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided. | 06-23-2011 |
20120276750 | METHOD AND SYSTEM FOR BINDING HALIDE-BASED CONTAMINANTS - A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided. | 11-01-2012 |
20130231240 | METHOD AND SYSTEM FOR BINDING HALIDE-BASED CONTAMINANTS - A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided. | 09-05-2013 |
20140151857 | METHOD AND SYSTEM FOR BINDING HALIDE-BASED CONTAMINANTS - A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided. | 06-05-2014 |
Patent application number | Description | Published |
20110163416 | METHODS FOR FORMING SMALL-SCALE CAPACITOR STRUCTURES - The present disclosure provides small scale capacitors (e.g., DRAM capacitors) and methods of forming such capacitors. One exemplary implementation provides a method of fabricating a capacitor that includes sequentially forming a first electrode, a dielectric layer, and a second electrode. At least one of the electrodes may be formed by a) reacting two precursors to deposit a first conductive layer at a first deposition rate, and b) depositing a second conductive layer at a second, lower deposition rate by depositing a precursor layer of one precursor at least one monolayer thick and exposing that precursor layer to another precursor to form a nanolayer reaction product. The second conductive layer may be in contact with the dielectric layer and have a thickness of no greater than about 50 Å. | 07-07-2011 |
20120056206 | SOLID STATE LIGHTING DIES WITH QUANTUM EMITTERS AND ASSOCIATED METHODS OF MANUFACTURING - Solid state lighting dies and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting die includes a substrate material, a first semiconductor material, a second semiconductor material, and an active region between the first and second semiconductor materials. The second semiconductor material has a surface facing away from the substrate material. The solid state lighting die also includes a plurality of openings extending from the surface of the second semiconductor material toward the substrate material. | 03-08-2012 |
20120056219 | BACK-TO-BACK SOLID STATE LIGHTING DEVICES AND ASSOCIATED METHODS - Solid state lights (SSLs) including a back-to-back solid state emitters (SSEs) and associated methods are disclosed herein. In various embodiments, an SSL can include a carrier substrate having a first surface and a second surface different from the first surface. First and second through substrate interconnects (TSIs) can extend from the first surface of the carrier substrate to the second surface. The SSL can further include a first and a second SSE, each having a front side and a back side opposite the front side. The back side of the first SSE faces the first surface of the carrier substrate and the first SSE is electrically coupled to the first and second TSIs. The back side of the second SSE faces the second surface of the carrier substrate and the second SSE is electrically coupled to the first and second TSIs. | 03-08-2012 |
20120120549 | Mixed Composition Interface Layer and Method of Forming - An interface forming method includes forming a first layer containing a first chemical element and chemisorbing on the first layer an interface layer containing at least one monolayer of the first chemical element intermixed with a second chemical element different from the first chemical element. A second layer comprising the second chemical element can be formed on the interface layer. The first layer might not substantially contain the second chemical element, the second layer might not substantially contain the first chemical element, or both. An apparatus can include a first layer containing a first chemical element, an interface layer chemisorbed on the first layer, and a second layer containing a second element on the interface layer. The interface layer can contain at least one monolayer of the first chemical element intermixed with a second chemical element different from the first chemical element. | 05-17-2012 |
20120298950 | LIGHT EMITTING DEVICES WITH BUILT-IN CHROMATICITY CONVERSION AND METHODS OF MANUFACTURING - Various embodiments of light emitting devices with built-in chromaticity conversion and associated methods of manufacturing are described herein. In one embodiment, a method for manufacturing a light emitting device includes forming a first semiconductor material, an active region, and a second semiconductor material on a substrate material in sequence, the active region being configured to produce a first emission. A conversion material is then formed on the second semiconductor material. The conversion material has a crystalline structure and is configured to produce a second emission. The method further includes adjusting a characteristic of the conversion material such that a combination of the first and second emission has a chromaticity at least approximating a target chromaticity of the light emitting device. | 11-29-2012 |
20130049043 | ENGINEERED SUBSTRATES FOR SEMICONDUCTOR DEVICES AND ASSOCIATED SYSTEMS AND METHODS - Engineered substrates for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a transducer structure having a plurality of semiconductor materials including a radiation-emitting active region. The device further includes an engineered substrate having a first material and a second material, at least one of the first material and the second material having a coefficient of thermal expansion at least approximately matched to a coefficient of thermal expansion of at least one of the plurality of semiconductor materials. At least one of the first material and the second material is positioned to receive radiation from the active region and modify a characteristic of the light. | 02-28-2013 |
20130181231 | MICROPIPE-FREE SILICON CARBIDE AND RELATED METHOD OF MANUFACTURE - Micropipe-free, single crystal, silicon carbide (SiC) and related methods of manufacture are disclosed. The SiC is grown by placing a source material and seed material on a seed holder in a reaction crucible of the sublimation system, wherein constituent components of the sublimation system including the source material, reaction crucible, and seed holder are substantially free from unintentional impurities. By controlling growth temperature, growth pressure, SiC sublimation flux and composition, and a temperature gradient between the source material and the seed material or the SiC crystal growing on the seed material during the PVT process, micropipe-inducing process instabilities are eliminated and micropipe-free SiC crystal is grown on the seed material. | 07-18-2013 |
Patent application number | Description | Published |
20120329191 | SOLID STATE LIGHTING DEVICES WITH REDUCED CRYSTAL LATTICE DISLOCATIONS AND ASSOCIATED METHODS OF MANUFACTURING - Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a substrate material having a substrate surface and a plurality of hemispherical grained silicon (“HSG”) structures on the substrate surface of the substrate material. The solid state lighting device also includes a semiconductor material on the substrate material, at least a portion of which is between the plurality of HSG structures. | 12-27-2012 |
20130166057 | METHODS FOR FORMING SMALL-SCALE CAPACITOR STRUCTURES - The present disclosure provides small scale capacitors (e.g., DRAM capacitors) and methods of forming such capacitors. One exemplary implementation provides a method of fabricating a capacitor that includes sequentially forming a first electrode, a dielectric layer, and a second electrode. At least one of the electrodes may be formed by a) reacting two precursors to deposit a first conductive layer at a first deposition rate, and b) depositing a second conductive layer at a second, lower deposition rate by depositing a precursor layer of one precursor at least one monolayer thick and exposing that precursor layer to another precursor to form a nanolayer reaction product. The second conductive layer may be in contact with the dielectric layer and have a thickness of no greater than about 50 Å. | 06-27-2013 |
20140097441 | DEVICES, SYSTEMS, AND METHODS RELATED TO REMOVING PARASITIC CONDUCTION IN SEMICONDUCTOR DEVICES - Semiconductor devices and methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a stack of semiconductor materials from an epitaxial substrate, where the stack of semiconductor materials defines a heterojunction, and where the stack of semiconductor materials and the epitaxial substrate further define a bulk region that includes a portion of the semiconductor stack adjacent the epitaxial substrate. The method further includes attaching the stack of semiconductor materials to a carrier, where the carrier is configured to provide a signal path to the heterojunction. The method also includes exposing the bulk region by removing the epitaxial substrate. | 04-10-2014 |
20140239348 | METHODS, DEVICES, AND SYSTEMS RELATED TO FORMING SEMICONDUCTOR POWER DEVICES WITH A HANDLE SUBSTRATE - Methods of manufacturing device assemblies, as well as associated semiconductor assemblies, devices, systems are disclosed herein. In one embodiment, a method of forming a semiconductor device assembly includes forming a semiconductor device assembly that includes a handle substrate, a semiconductor structure having a first side and a second side opposite the first side, and an intermediary material between the semiconductor structure and the handle substrate. The method also includes removing material from the semiconductor structure to form an opening extending from the first side of the semiconductor structure to at least the intermediary material at the second side of the semiconductor structure. The method further includes removing at least a portion of the intermediary material through the opening in the semiconductor structure to undercut the second side of the semiconductor structure. | 08-28-2014 |
20140246683 | SOLID STATE LIGHTING DEVICES WITH REDUCED CRYSTAL LATTICE DISLOCATIONS AND ASSOCIATED METHODS OF MANUFACTURING - Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a substrate material having a substrate surface and a plurality of hemispherical grained silicon (“HSG”) structures on the substrate surface of the substrate material. The solid state lighting device also includes a semiconductor material on the substrate material, at least a portion of which is between the plurality of HSG structures. | 09-04-2014 |
20140361382 | SEMICONDUCTOR DEVICES HAVING COMPACT FOOTPRINTS AND RELATED DEVICES, SYSTEMS, AND METHODS - Semiconductor devices and methods for making semiconductor devices are disclosed herein. A semiconductor device configured in accordance with a particular embodiment includes a substrate having a source/drain region, an interconnect, and first and second electrodes extending between first and second sides of the substrate. The first electrode includes a first contact pad and a via extending through the substrate that connects the first contact pad with the interconnect. The second electrode includes a second contact pad and a conductive feature in the substrate that connects the second contact pad with the interconnect. | 12-11-2014 |
20150318388 | DEVICES, SYSTEMS, AND METHODS RELATED TO REMOVING PARASITIC CONDUCTION IN SEMICONDUCTOR DEVICES - Semiconductor devices and methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a stack of semiconductor materials from an epitaxial substrate, where the stack of semiconductor materials defines a heterojunction, and where the stack of semiconductor materials and the epitaxial substrate further define a bulk region that includes a portion of the semiconductor stack adjacent the epitaxial substrate. The method further includes attaching the stack of semiconductor materials to a carrier, where the carrier is configured to provide a signal path to the heterojunction. The method also includes exposing the bulk region by removing the epitaxial substrate. | 11-05-2015 |
20160027957 | LIGHT EMITTING DEVICES WITH BUILT-IN CHROMATICITY CONVERSION AND METHODS OF MANUFACTURING - Various embodiments of light emitting devices with built-in chromaticity conversion and associated methods of manufacturing are described herein. In one embodiment, a method for manufacturing a light emitting device includes forming a first semiconductor material, an active region, and a second semiconductor material on a substrate material in sequence, the active region being configured to produce a first emission. A conversion material is then formed on the second semiconductor material. The conversion material has a crystalline structure and is configured to produce a second emission. The method further includes adjusting a characteristic of the conversion material such that a combination of the first and second emission has a chromaticity at least approximating a target chromaticity of the light emitting device. | 01-28-2016 |
Patent application number | Description | Published |
20100242467 | SHIELDED STAMPED STATOR BLADE - A blade for a stator in a torque converter including: a first blade segment connected to first inner and outer circumferential sections; a second blade segment, separately formed from the first blade segment, connected to second inner and outer circumferential sections, and including first and second portions; and a channel disposed between the first and second blade segments. In a circumferential direction, the first and second portions are separated by the channel. | 09-30-2010 |
20110150662 | BLADE FAMILIES FOR TORQUE CONVERTERS - A blade family for torque converters with a first blade having a first shape and flow guiding surface and a second blade having a second shape and flow guiding surface. The first surface is different from the second surface and the first shape is the same as a portion of the second shape, or the second shape is the same as a portion of the second shape. In an example embodiment of the invention, at least one of the first or second blades includes holes or slots. In an example embodiment of the invention, the first blade includes more material than the second blade. The first and second blades may have respective mounting tabs, with the second blade having fewer mounting tabs than the first blade. Other example aspects of the present invention broadly comprise a torque converter with a plurality of first and/or second blades from the blade family. | 06-23-2011 |
20130160438 | EXTENDED TURBINE BLADE - A torque converter, including: an impeller and a turbine with: a shell; and at least one blade including: a blade body with a first edge connected to the shell; and a portion extending from the blade body. The torque converter includes a stator including: a stator body, and at least one stator blade axially disposed between the impeller and the turbine and connected to the stator body. A circumferential space is formed between the turbine shell and the stator body. At least a portion of the circumferential space is radially aligned with the portion of the at least one blade. | 06-27-2013 |
Patent application number | Description | Published |
20090264783 | SYSTEMS AND METHODS FOR IMPROVED ATRIAL FIBRILLATION (AF) MONITORING - Methods and systems described herein are especially useful wherein monitoring for atrial fibrillation (AF) is based on RR interval variability as measured from an electrocardiogram (ECG) signal. An activity threshold, which can be patient specific, is obtained. Patient activity is monitored. Based on the monitored patient activity and the activity threshold, there is a determination of when it is likely that AF monitoring based on RR interval variability is adversely affected by patient activity. When it has been determined that it is likely that AF monitoring based on RR interval variability is adversely affected by patient activity, whether and/or how AF monitoring is performed is modified. | 10-22-2009 |
20090270939 | DEVICE AND METHOD FOR DETECTING ATRIAL FIBRILLATION - Detection of atrial fibrillation involves detecting a plurality of ventricular events and obtaining a series of probabilities of AF, each corresponding to a probability of AF for a different beat window having a plurality of ventricular events. AF onset is detected when one or each of a plurality of consecutive AF probabilities satisfies an AF trigger threshold. AF termination is detected when one or each of a plurality of consecutive AF probabilities does not satisfy the AF trigger threshold. Upon detection of AF onset, ventricular events are processed to detect for a sudden onset of irregularity of the ventricular events. AF onset is confirmed when sudden onset is detected and overturned when sudden onset is not detected. | 10-29-2009 |
20110028848 | Methods and Apparatus for Detecting and Mapping Tissue Interfaces - A device for measuring a spatial location of a tissue surface, such as the interface between different types of tissues or between tissue and body fluids, generally includes an elongate catheter body having a distal end portion, a plurality of localization elements carried by the distal end portion, and at least one pulse-echo acoustic element carried by the distal end portion. The localization elements allow the catheter to be localized (e.g., position and/or orientation) within a localization field, while the acoustic element allows for the detection of tissue surfaces where incoming acoustic energy will reflect towards the acoustic element. A suitable controller can determine the location of the detected tissue surface from the localization of the distal end portion of the catheter body. Tissue thicknesses can be derived from the detected locations of multiple (e.g., near and far) tissue surfaces. Maps and models of tissue thickness can also be generated. | 02-03-2011 |
20110152957 | CHAOS-BASED DETECTION OF ATRIAL FIBRILLATION USING AN IMPLANTABLE MEDICAL DEVICE - Techniques are provided for detecting atrial fibrillation (AF) based on variations in ventricular intervals detected by a pacemaker, implantable cardioverter-defibrillator (ICD) or implantable cardiac monitor (ICM). In one example, ventricular beats are detected and intervals between the ventricular beats are measured, such as RR intervals. Irregular ventricular beats are identified, including ectopic beats, bigeminal beats, and the like. The degree of variability within the ventricular intervals is then determined while excluding any intervals associated with irregular beats. AF is then detected based on the degree of variability. That is, AF is detected based on variability occurring within ventricular intervals after ectopic beats and other irregular beats have been eliminated, thus mitigating detection problems that might arise if the variability were instead calculated based on all ventricular beat intervals. Techniques are also described herein for distinguishing AF from sinus tachycardia, which can also cause a high degree of variability in RR intervals. | 06-23-2011 |
20120158011 | PROXIMITY SENSOR INTERFACE IN A ROBOTIC CATHETER SYSTEM - A robotic catheter control system includes a proximity sensing function configured to generate a proximity signal that is indicative of the proximity of the medical device such as an electrode catheter to a nearest anatomic structure such as a cardiac wall. The control system includes logic that monitors the proximity signal during guided movement of the catheter to ensure that unintended contact with body tissue is detected and avoided. The logic includes a means for defining a plurality of proximity zones, such as a GREEN, YELLOW and RED designated zones, each having associated therewith a respective proximity (distance) criterion, with the RED zone being the nearest to the body tissue and the YELLOW zone being the next nearest to the body tissue. When the logic detects entry of the catheter into the RED zone, the logic terminates the operating power to the actuation units of the control system, to thereby stop movement of the catheter entirely. When the logic detects entry of the catheter into the YELLOW zone, the logic automatically reduces a pre-planned navigation speed of the catheter. | 06-21-2012 |
20140214110 | SYSTEMS AND METHODS TO MONITOR AND TREAT HEART FAILURE CONDITIONS - An implantable device monitors and treats heart failure, pulmonary edema, and hemodynamic conditions and in some cases applies therapy. In one implementation, the implantable device applies a high-frequency multi-phasic pulse waveform over multiple-vectors through tissue. The waveform has a duration less than the charging time constant of electrode-electrolyte interfaces in vivo to reduce intrusiveness while increasing sensitivity and specificity for trending parameters. The waveform can be multiplexed over multiple vectors and the results cross-correlated or subjected to probabilistic analysis or thresholding schemata to stage heart failure or pulmonary edema. In one implementation, a fractionation morphology of a sensed impedance waveform is used to trend intracardiac pressure to stage heart failure and to regulate cardiac resynchronization therapy. The waveform also provides unintrusive electrode integrity checks and 3-D impedancegrams. | 07-31-2014 |