Patent application number | Description | Published |
20120322058 | Analysis of nucleic acids - Provided herein are improved methods, compositions, and kits for analysis of nucleic acids. The improved methods, compositions, and kits can enable copy number estimation of a nucleic acid in a sample. Also provided herein are methods, compositions, and kits for determining the linkage of two or more copies of a target nucleic acid in a sample (e.g., whether the two or more copies are on the same chromosome or different chromosomes) or for phasing alleles. | 12-20-2012 |
20130310269 | HOT-START DIGITAL PCR - The present disclosure provides methods and compositions for performing nucleic acid reactions, such as hot-start digital polymerase chain reaction (dPCR). | 11-21-2013 |
20140051595 | Methods and Compositions for Determining Nucleic Acid Degradation - Described herein are methods, systems, compositions and kits to enable determination of a level of degradation of nucleic acids in a sample. For example, the determination of the amount of degradation of RNA in a sample can be accomplished by labeling one or both of the intact 5′- and/or 3′-ends of an mRNA molecule by taking advantage of the unique diol moiety present at these structures. Labeled nucleotides can then be partitioned into droplets and the amount of degradation can be determined by detecting label present in the partitions and making quantitative or qualitative comparisons with a reference sample. In some cases, the degree of degradation is also determined by factoring in the total concentration or quantity of RNA in the sample. | 02-20-2014 |
20140287937 | METHODS FOR ASSESSING CANCER - Provided herein are methods for assessing cancer, comprising analysis of sequence data from a set of cancer-related genes in a tumor sample from a subject, followed by monitoring of a subset of the set in circulating tumor-associated DNA in a fluid sample from the subject. Also provided are kits and systems for practicing any of them methods of the invention. | 09-25-2014 |
20140309128 | DIGITAL ASSAYS FOR MUTATION DETECTION - Provided herein are methods, compositions, and kits for detecting alleles using a single probe or a single primer set. Also, provided herein are methods, compositions, and kits for detecting allelic variants using a single probe or a single primer set. Also, provided herein are methods, compositions, and kits for determining a polymerization error rate. | 10-16-2014 |
Patent application number | Description | Published |
20080235439 | Methods for conversion of update blocks based on association with host file management data structures - A method for operating a memory system is provided. In this method, a sequential update block is provided and a write command is received to write data. The write command comprises a logical address associated with the data. If the logical address is associated with a host file management data structure, then the sequential update block is converted to a chaotic update block. After the conversion, the data are written to the chaotic update block. | 09-25-2008 |
20080235465 | Systems for conversion of update blocks based on association with host file management data structures - A non-volatile memory storage system is provided. The non-volatile memory storage system comprises a non-volatile memory cell array and a processor in communication with the non-volatile memory cell array. Here, the processor is configured to receive a write command to write data, where the write command comprises a logical address associated with the data. The processor is further configured to allocate a chaotic update block if the logical address is associated with a host file management data structure. After the allocation, the data are written to the chaotic update block. | 09-25-2008 |
20090070518 | Adaptive Block List Management - In a nonvolatile memory array, selected blocks are maintained as open blocks that are available to store additional data without being erased first. Nonsequential open blocks are selected from two lists, one list based on recency of the last write operation, and the other list based on frequency of writes to the block. Sequential open blocks are divided into blocks expected to remain sequential and blocks that are not expected to remain sequential. | 03-12-2009 |
20100172180 | Non-Volatile Memory and Method With Write Cache Partitioning - A portion of a nonvolatile memory is partitioned from a main multi-level memory array to operate as a cache. The cache memory is configured to store at less capacity per memory cell and finer granularity of write units compared to the main memory. In a block-oriented memory architecture, the cache has multiple functions, not merely to improve access speed, but is an integral part of a sequential update block system. Decisions to write data to the cache memory or directly to the main memory depend on the attributes and characteristics of the data to be written, the state of the blocks in the main memory portion and the state of the blocks in the cache portion. | 07-08-2010 |
20100174845 | Wear Leveling for Non-Volatile Memories: Maintenance of Experience Count and Passive Techniques - Wear leveling techniques for re-programmable non-volatile memory systems, such as a flash EEPROM system, are described. One set of techniques uses “passive” arrangements, where, when a blocks are selected for writing, blocks with relatively low experience count are selected. This can be done by ordering the list of available free blocks based on experience count, with the “coldest” blocks placed at the front of the list, or by searching the free blocks to find a block that is “cold enough”. In another, complementary set of techniques, usable for more standard wear leveling operations as well as for “passive” techniques and other applications where the experience count is needed, the experience count of a block or meta-block is maintained as a block's attribute along its address in the data management structures, such as address tables. | 07-08-2010 |
20100174846 | Nonvolatile Memory With Write Cache Having Flush/Eviction Methods - A portion of a nonvolatile memory is partitioned from a main multi-level memory array to operate as a cache. The cache memory is configured to store at less capacity per memory cell and finer granularity of write units compared to the main memory. In a block-oriented memory architecture, the cache has multiple functions, not merely to improve access speed, but is an integral part of a sequential update block system. Decisions to archive data from the cache memory to the main memory depend on the attributes of the data to be archived, the state of the blocks in the main memory portion and the state of the blocks in the cache portion. | 07-08-2010 |
20100174847 | Non-Volatile Memory and Method With Write Cache Partition Management Methods - A portion of a nonvolatile memory is partitioned from a main multi-level memory array to operate as a cache. The cache memory is configured to store at less capacity per memory cell and finer granularity of write units compared to the main memory. In a block-oriented memory architecture, the cache has multiple functions, not merely to improve access speed, but is an integral part of a sequential update block system. The cache memory has a capacity dynamically increased by allocation of blocks from the main memory in response to a demand to increase the capacity. Preferably, a block with an endurance count higher than average is allocated. The logical addresses of data are partitioned into zones to limit the size of the indices for the cache. | 07-08-2010 |
20120191927 | Wear Leveling for Non-Volatile Memories: Maintenance of Experience Count and Passive Techniques - Wear leveling techniques for re-programmable non-volatile memory systems, such as a flash EEPROM system, are described. One set of techniques uses “passive” arrangements, where, when a blocks are selected for writing, blocks with relatively low experience count are selected. This can be done by ordering the list of available free blocks based on experience count, with the “coldest” blocks placed at the front of the list, or by searching the free blocks to find a block that is “cold enough”. In another, complementary set of techniques, usable for more standard wear leveling operations as well as for “passive” techniques and other applications where the experience count is needed, the experience count of a block or meta-block is maintained as a block's attribute along its address in the data management structures, such as address tables. | 07-26-2012 |
Patent application number | Description | Published |
20080201642 | PROBLEM DETERMINATION IN DISTRIBUTED ENTERPRISE APPLICATIONS - A method, system and computer program are provided for problem determination in an enterprise computer system in a distributed environment. In the method, information is obtained regarding the enterprise applications, and high-level information is presented to a user, with one or more prompts are provided to the user for more detailed information. In response to a request from a user for more detailed information about the application, more detailed information is provided to the user. Several levels of more detailed information about applications, including information as to individual threads, is available. The method also includes the steps of receiving instructions from an administrator to establish an account for a user, associating one or more servers with the account, and providing access to the corresponding user only to the associated servers. In the method, searches may be conducted for strings and requests, and identified strings and requests may be sorted by a variety of criteria. | 08-21-2008 |
20090019441 | METHOD, SYSTEM, AND COMPUTER PROGRAM FOR MONITORING PERFORMANCE OF APPLICATIONS IN A DISTRIBUTED ENVIRONMENT - A method, system, and computer program include receiving a request string, and mapping the received request string to a distinguishable request string and a collapsible request string. The received request string may be in the form of a JSP, a servlet, and remote Enterprise Java Bean calls. A user may be prompted to create rules for mapping of a received request string to a distinguishable request string and a collapsible request string. | 01-15-2009 |
20090070462 | SYSTEM AND COMPUTER PROGRAM FOR MONITORING PERFORMANCE OF APPLICATIONS IN A DISTRIBUTED ENVIRONMENT - A system and computer program for monitoring the performance of applications running on a server in a distributed computing environment includes prompting the user to select information for monitoring, monitoring application performance in accordance with the selected information, and making the monitored performance information available to the user. | 03-12-2009 |
20110276594 | METHOD, SYSTEM, AND COMPUTER PROGRAM FOR MONITORING PERFORMANCE OF APPLICATIONS IN A DISTRIBUTED ENVIRONMENT - A method, system, and computer program include receiving a request string, and mapping the received request string to a distinguishable request string and a collapsible request string. The received request string may be in the form of a JSP, a servlet, and remote Enterprise Java Bean calls. A user may be prompted to create rules for mapping of a received request string to a distinguishable request string and a collapsible request string. | 11-10-2011 |
20120047255 | PROBLEM DETERMINATION IN DISTRIBUTED ENTERPRISE APPLICATIONS - Problem determination in an enterprise computer system in a distributed environment is provided. Information is obtained regarding the enterprise applications, and high-level information is presented to a user, with one or more prompts provided to the user for more detailed information. In response to a request from a user for more detailed information about the application, more detailed information is provided to the user. Several levels of more detailed information about applications, including information as to individual threads, is available. The method also includes the steps of receiving instructions from an administrator to establish an account for a user, associating one or more servers with the account, and providing access to the corresponding user only to the associated servers. In the method, searches may be conducted for strings and requests, and identified strings and requests may be sorted by a variety of criteria. | 02-23-2012 |
Patent application number | Description | Published |
20140114761 | PROVIDING PREVIOUSLY VIEWED CONTENT WITH SEARCH RESULTS - Methods for providing sponsored content on a web page include receiving a plurality of keywords of a search query issued by a user. The methods further include receiving a first identifier and second identifier that identifies a product the user has previously viewed content for and the content provider of the content. A previously stored first sponsored content item associated with the product and content provider may be selected for participation in an auction. A second sponsored content item may be selected for participation in the auction, based on the plurality of keywords. If the first sponsored content item is selected based on the auction, the first sponsored content item is selected for inclusion on the web page. | 04-24-2014 |
20140201181 | SELECTING AND PRESENTING CONTENT RELEVANT TO USER INPUT - Methods, systems, and apparatus, including computer programs encoded on computer storage media are provided. An example method includes receiving user input in a control, for example, one associated with a search engine. The user input includes a series of input characters that when completed would form a completed user request. The method further includes, while receiving the user input, evaluating the characters to identify completions for the completed request. The method further includes identifying, by one or more processors, a content item associated with the one or more completions and identifying display data associated with the content item for transmission to the user along with one or more completions in response to receiving the user input. | 07-17-2014 |
20140214540 | RETARGETING IN A SEARCH ENVIRONMENT - Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for retargeting content in a search environment. In one aspect, a method includes receiving a request for a content item to be provided with a search results page and determining that one or more retargeted content items are eligible for presentation with the search results page. Each of the retargeted content items is a content item that is eligible for presentation with the search results page based on: (1) the search query matching a targeting keyword for the retargeted content item, and (2) the user identifier matching a retargeted identifier that is included in a retargeting set for the retargeted content item. A responsive content item to be presented with the search results page is selected, based at least in part on bids that are associated with the retargeted content items, and data specifying the responsive content item are provided. | 07-31-2014 |
Patent application number | Description | Published |
20100135472 | AUTOMATED VOICE MAIL COMMUNICATION SYSTEM - Methods and systems for automating communication and interaction with voice mail systems are described. The systems comprise a platform capable of handling multiple types of communications with multiple users and systems. The platform contains a browser, one or more servers for handling communications between the platform and user devices that are external to the platform, a speech engine for converting text to speech and vice versa, a chat server, an email server, a text server, a data warehouse, a scheduler, a workflow/rules engine, a reports server, and integration APIs that can be integrated with 3 | 06-03-2010 |
20100306154 | METHODS AND SYSTEMS FOR CREATING, ACCESSING, AND COMMUNICATING CONTENT - Methods and systems for creating, accessing, and communicating content are described. The systems comprise a single platform that allows multiple coordinated communication channels with a single user device (or user system) or multiple user devices (or user systems) at the same time. The platforms contains a browser for communicating with a communications network, multiple types of servers for handling different communications between the platform and a user device external to the platform, a database for storing content, a speech engine for converting text to speech, for converting speech to text, or both, and a configuration engine for configuring the applications that users will use during interaction with the platform. The platform can accordingly communicate with a user (or a user system) using any desired number (or combination) of communication channels. Other embodiments are described. | 12-02-2010 |
20110047221 | MULTI CHANNEL, AUTOMATED COMMUNICATION AND RESOURCE SYNCHRONIZATION - Methods and systems that allow multiple channels of communication between multiple users via a platform that automatically integrates and synchronizes the resources of each user during the communication are described. The systems comprise a platform capable of handling multiple types of communications with multiple users and systems. The platform contains a browser, one or more servers for handling communications between the platform and user devices that are external to the platform, a speech engine for converting text to speech and vice versa, a chat server, an email server, a text server, a data warehouse, a scheduler, a workflow/rules engine, a reports server, and integration APIs that can be integrated with 3 | 02-24-2011 |
20140006061 | METHODS AND APPARATUS FOR PROCESSING INSURANCE CLAIMS | 01-02-2014 |
Patent application number | Description | Published |
20080247228 | NON-VOLATILE STORAGE WITH CURRENT SENSING OF NEGATIVE THRESHOLD VOLTAGES - A non-volatile storage device in which current sensing is performed for a non-volatile storage element with a negative threshold voltage. A control gate read voltage is applied to a selected word line of a non-volatile storage element, and source and p-well voltages are applied to a source and a p-well, respectively, associated with the non-volatile storage element. The source and p-well voltages exceed the control gate read voltage so that a positive control gate read voltage can be used. There is no need for a negative charge pump to apply a negative word line voltage even for sensing a negative threshold voltage. A programming condition of the non-volatile storage element is determined by sensing a voltage drop which is tied to a fixed current which flows in a NAND string of the non-volatile storage element. | 10-09-2008 |
20080247229 | NON-VOLATILE STORAGE USING CURRENT SENSING WITH BIASING OF SOURCE AND P-Well - A non-volatile storage device in which current sensing is performed for a non-volatile storage element. A voltage is applied to a selected word line of the first non-volatile storage element, and source and p-well voltages are applied to a source and a p-well, respectively, associated with the non-volatile storage element. The source and p-well voltages are regulated at respective positive DC levels to avoid a ground bounce, or voltage fluctuation, which would occur if the source voltage at least was regulated at a ground voltage. A programming condition of the non-volatile storage element is determined by sensing a current in a NAND string of the non-volatile storage element. The sensing can occur quickly since there is no delay in waiting for the ground bounce to settle. | 10-09-2008 |
20080247238 | METHOD FOR SENSING NEGATIVE THRESHOLD VOLTAGES IN NON-VOLATILE STORAGE USING CURRENT SENSING - Current sensing is performed in a non-volatile storage device for a selected non-volatile storage element with a negative threshold voltage. A control gate read voltage is applied to a selected word line of a non-volatile storage element, and source and p-well voltages are applied to a source and a p-well, respectively, associated with the non-volatile storage element. The source and p-well voltages exceed the control gate read voltage so that a positive control gate read voltage can be used. There is no need for a negative charge pump to apply a negative word line voltage even for sensing a negative threshold voltage. A programming condition of the non-volatile storage element is determined by sensing a voltage drop which is tied to a fixed current which flows in a NAND string of the non-volatile storage element. | 10-09-2008 |
20080247239 | METHOD FOR CURRENT SENSING WITH BIASING OF SOURCE AND P-WELL IN NON-VOLATILE STORAGE - Current sensing is performed in a non-volatile storage device for a non-volatile storage element. A voltage is applied to a selected word line of the first non-volatile storage element, and source and p-well voltages are applied to a source and a p-well, respectively, associated with the non-volatile storage element. The source and p-well voltages are regulated at respective positive DC levels to avoid a ground bounce, or voltage fluctuation, which would occur if the source voltage at least was regulated at a ground voltage. A programming condition of the non-volatile storage element is determined by sensing a current in a NAND string of the non-volatile storage element. The sensing can occur quickly since there is no delay in waiting for the ground bounce to settle. | 10-09-2008 |
20090086542 | High Voltage Generation and Control in Source-Side Injection Programming of Non-Volatile Memory - Non-volatile memory is programmed using source side hot electron injection. To generate a high voltage bit line for programming, the bit line corresponding to a selected memory cell is charged to a first level using a first low voltage. A second low voltage is applied to unselected bit lines adjacent to the selected bit line after charging. Because of capacitive coupling between the adjacent bit lines and the selected bit line, the selected bit line is boosted above the first voltage level by application of the second low voltage to the unselected bit lines. The column control circuitry for such a memory array does not directly apply the high voltage and thus, can be designed to withstand lower operating voltages, permitting low operating voltage circuitry to be used. | 04-02-2009 |
20110134694 | High Voltage Generation And Control In Source-Side Injection Programming Of Non-Volatile Memory - Non-volatile memory is programmed using source side hot electron injection. To generate a high voltage bit line for programming, the bit line corresponding to a selected memory cell is charged to a first level using a first low voltage. A second low voltage is applied to unselected bit lines adjacent to the selected bit line after charging. Because of capacitive coupling between the adjacent bit lines and the selected bit line, the selected bit line is boosted above the first voltage level by application of the second low voltage to the unselected bit lines. The column control circuitry for such a memory array does not directly apply the high voltage and thus, can be designed to withstand lower operating voltages, permitting low operating voltage circuitry to be used. | 06-09-2011 |
Patent application number | Description | Published |
20120160181 | REMOTE ANIMAL TRAINING SYSTEM USING VOLTAGE-TO-FREQUENCY CONVERSION - An animal training device and system which uses a voltage to frequency conversion technology (VFC) providing the capability to adjust in gradual incremental levels upward and downward for consistent and individual electronic control of separate output to an animal undergoing training to learn new behaviors which are desired by its owner/handler/trainer. The device is contained in a housing which is worn around the neck of an animal by means of a collar strap or attached to a harness that properly fits onto an animal. The primary use is with dogs, but all kinds of domestic animals may be trained using this device. This VFC technology is offered in a variety of electronic platforms. Whether one-way or two-way remote control with manual activation by the user, automatic activation by remote sensor detectors, or automatically activated by an on-board microprocessor circuitry sensing the animals own actions, either or all device outputs allow the animal's caretaker the unique capability to select an appropriate level of one of a variety of cue signals at a given moment allowing the animal not to be overwhelmed or to cause any over-reactions. | 06-28-2012 |
20120160182 | REMOTE ANIMAL TRAINING SYSTEM USING VOLTAGE-TO-FREQUENCY CONVERSION - An animal training device and system which uses a voltage to frequency conversion technology (VFC) providing the capability to adjust in gradual incremental levels upward and downward for consistent and individual electronic control of separate output to an animal undergoing training to learn new behaviors which are desired by its owner/handler/trainer. The device is contained in a housing which is worn around the neck of an animal by means of a collar strap or attached to a harness that properly fits onto an animal. The primary use is with dogs, but all kinds of domestic animals may be trained using this device. This VFC technology is offered in a variety of electronic platforms. Whether one-way or two-way remote control with manual activation by the user, automatic activation by remote sensor detectors, or automatically activated by an on-board microprocessor circuitry sensing the animals own actions, either or all device outputs allow the animal's caretaker the unique capability to select an appropriate level of one of a variety of cue signals at a given moment allowing the animal not to be overwhelmed or to cause any over-reactions. | 06-28-2012 |
20120160183 | REMOTE ANIMAL TRAINING SYSTEM USING VOLTAGE-TO-FREQUENCY CONVERSION - An animal training device and system which uses a voltage to frequency conversion technology (VFC) providing the capability to adjust in gradual incremental levels upward and downward for consistent and individual electronic control of separate output to an animal undergoing training to learn new behaviors. Whether one-way or two-way remote controller with manual activation by the user, automatic activation by remote sensor detectors, or automatically activated by an on-board microprocessor circuitry sensing the animals own actions, either or all device outputs allow the animal's caretaker the unique capability to select an appropriate level of one of a variety of cue signals at a given moment allowing the animal not to be overwhelmed or to cause any over-reactions. | 06-28-2012 |
20130112153 | REMOTE ANIMAL TRAINING SYSTEM USING VOLTAGE-TO-FREQUENCY CONVERSION - An animal training device and system which uses a voltage to frequency conversion technology (VFC) providing the capability to adjust in gradual incremental levels upward and downward for consistent and individual electronic control of separate output to an animal undergoing training to learn new behaviors which are desired by its owner/handler/trainer. The device is contained in a housing which is worn around the neck of an animal by means of a collar strap or attached to a harness that properly fits onto an animal. The primary use is with dogs, but all kinds of domestic animals may be trained using this device. This VFC technology is offered in a variety of electronic platforms. Whether one-way or two-way remote controller with manual activation by the user, automatic activation by remote sensor detectors, or automatically activated by an on-board microprocessor circuitry sensing the animals own actions, either or all device outputs allow the animal's caretaker the unique capability to select an appropriate level of one of a variety of cue signals at a given moment allowing the animal not to be overwhelmed or to cause any over-reactions. | 05-09-2013 |
Patent application number | Description | Published |
20100149713 | Current Limit Control with Current Limit Detector - Devices, such as mobile devices, may be exposed to short circuit and output overload events. To protect against such events, mobile devices typically include circuitry to limit currents so as not to exceed a pre-programmed current limit. Various embodiments of the present invention include devices and methods for detecting pre-programmed current limits and for limiting currents in response to such detection. In some embodiments, both the current limit detector and the current limit controller circuitry include scaled current switches. The scaling may be substantially similar between the programmed-current limit detector and the current limit controller circuitry. | 06-17-2010 |
20110273808 | System and Method for Detection of Multiple Current Limits - Devices, such as mobile devices, may be exposed to short circuit and output overload events. To protect against such events, mobile devices typically include current limit circuits. Some current limit circuits may involve user programmable function. User programmable function may need accurate current limit detectors. Various embodiments of the present invention include devices and methods for detecting one or more programmed current limits. Some embodiments allow for a user application to select among parallel or serial configurations of current detection circuitry. Each such configuration may include multiple resistive devices of different resistive values. | 11-10-2011 |
20130038974 | System and Method for Detection of Multiple Current Limits - Devices, such as mobile devices, may be exposed to short circuit and output overload events. To protect against such events, mobile devices typically include current limit circuits. Some current limit circuits may involve user programmable function. User programmable function may need accurate current limit detectors. Various embodiments of the present invention include devices and methods for detecting one or more programmed current limits. Some embodiments allow for a user application to select among parallel or serial configurations of current detection circuitry. Each such configuration may include multiple resistive devices of different resistive values. | 02-14-2013 |
Patent application number | Description | Published |
20140089722 | Single Wire Serial Interface - A single wire serial interface for power ICs and other devices is provided. To use the interface, a device is configured to include an EN/SET input pin. A counter within the device counts clock pulses sent to the EN/SET input pin. The output of the counter is passed to a ROM or other decoder circuit. The ROM selects an operational state for the device that corresponds to the value of the counter. In this way, control states may be selected for the device by sending corresponding clock pulses to the EN/SET pin. Holding the EN/SET pin high causes the device to maintain its operational state. Holding the EN/SET pin low for a predetermined timeout period resets the counter and causes the device to adopt a predetermined configuration (such as off) until new clock pulses are received at the EN/SET pin. | 03-27-2014 |
20150028771 | SINGLE WIRE SERIAL INTERFACE - A single wire serial interface for power ICs and other devices is provided. To use the interface, a device is configured to include an EN/SET input pin. A counter within the device counts clock pulses sent to the EN/SET input pin. The output of the counter is passed to a ROM or other decoder circuit. The ROM selects an operational state for the device that corresponds to the value of the counter. In this way, control states may be selected for the device by sending corresponding clock pulses to the EN/SET pin. Holding the EN/SET pin high causes the device to maintain its operational state. Holding the EN/SET pin low for a predetermined timeout period resets the counter and causes the device to adopt a predetermined configuration (such as off) until new clock pulses are received at the EN/SET pin. | 01-29-2015 |
20150028777 | SINGLE WIRE SERIAL INTERFACE UTILIZING COUNT OF ENCODED CLOCK PULSES WITH RESET - A single wire serial interface for power ICs and other devices is provided. To use the interface, a device is configured to include an EN/SET input pin. A counter within the device counts clock pulses sent to the EN/SET input pin. The output of the counter is passed to a ROM or other decoder circuit. The ROM selects an operational state for the device that corresponds to the value of the counter. In this way, control states may be selected for the device by sending corresponding clock pulses to the EN/SET pin. Holding the EN/SET pin high causes the device to maintain its operational state. Holding the EN/SET pin low for a predetermined timeout period resets the counter and causes the device to adopt a predetermined configuration (such as off) until new clock pulses are received at the EN/SET pin. | 01-29-2015 |
20150035455 | SINGLE WIRE SERIAL INTERFACE - A single wire serial interface for power ICs and other devices is provided. To use the interface, a device is configured to include an EN/SET input pin. A counter within the device counts clock pulses sent to the EN/SET input pin. The output of the counter is passed to a ROM or other decoder circuit. The ROM selects an operational state for the device that corresponds to the value of the counter. In this way, control states may be selected for the device by sending corresponding clock pulses to the EN/SET pin. Holding the EN/SET pin high causes the device to maintain its operational state. Holding the EN/SET pin low for a predetermined timeout period resets the counter and causes the device to adopt a predetermined configuration (such as off) until new clock pulses are received at the EN/SET pin. | 02-05-2015 |
Patent application number | Description | Published |
20080239801 | Load Management for Memory Device - Methods and apparatus for managing electrical loads of electronic devices are disclosed. According to one embodiment, a current load imposed by an electronic device, such as a memory device (or memory system), can be measured. Then, using the measured current load, the memory device can determine whether (and to what extent) operational performance should be limited. By limiting operational performance, the memory device is able to limit its current load so as to satisfy a specification criterion or other requirement. The electrical load management is well suited for use in portable memory products (e.g., memory cards) to manage current loads being drawn. | 10-02-2008 |
20080239802 | Device with Load-Based Voltage Generation - Method and device for providing voltage generation with load-based control are disclosed. The voltage generation can be provided within an electronic device, such as a memory system that provides data storage. In one embodiment, an electrical load imposed on a generated voltage can be monitored and used to dynamically control strength of the generated voltage. For example, for greater electrical loads, the generated voltage can be provided with a greater strength, and for lesser electrical loads, the generated voltage can be provided with a lesser strength. By compensating the generated voltage for the nature of the imposed electrical load, the generated voltage can be provided in a stable manner across a significant range of loads. In the case of a memory system, stability in the generated voltage provides for reduced voltage ripple and thus improved sensing margins. The voltage generation is well suited for use in portable memory products (e.g., memory cards) to generate one or more internal voltages. | 10-02-2008 |
20080239836 | Method for Managing Electrical Load of an Electronic Device - Methods and apparatus for managing electrical loads of electronic devices are disclosed. According to one embodiment, a current load imposed by an electronic device, such as a memory device (or memory system), can be measured. Then, using the measured current load, the memory device can determine whether (and to what extent) operational performance should be limited. By limiting operational performance, the memory device is able to limit its current load so as to satisfy a specification criterion or other requirement. The electrical load management is well suited for use in portable memory products (e.g., memory cards) to manage current loads being drawn. | 10-02-2008 |
20080239856 | Method for Load-Based Voltage Generation - Method and device for providing voltage generation with load-based control are disclosed. The voltage generation can be provided within an electronic device, such as a memory system that provides data storage. In one embodiment, an electrical load imposed on a generated voltage can be monitored and used to dynamically control strength of the generated voltage. For example, for greater electrical loads, the generated voltage can be provided with a greater strength, and for lesser electrical loads, the generated voltage can be provided with a lesser strength. By compensating the generated voltage for the nature of the imposed electrical load, the generated voltage can be provided in a stable manner across a significant range of loads. In the case of a memory system, stability in the generated voltage provides for reduced voltage ripple and thus improved sensing margins. The voltage generation is well suited for use in portable memory products (e.g., memory cards) to generate one or more internal voltages. | 10-02-2008 |
Patent application number | Description | Published |
20090254771 | USB Power Conservation Method and Apparatus - Embodiments of a method and system for conserving power used in a central processing unit (CPU) are described. An embodiment uses direct memory access (DMA) fetch suspend logic to allow the CPU to stay in a sleep state indefinitely until a break event occurs. Embodiments include power management monitoring and Universal Serial Bus (USB) descriptor monitoring logic. Power management monitor logic monitors the CPU sleep state and sets a status flag to the USB descriptor monitoring logic whenever the CPU is in a predefined sleep state. The USB descriptor monitoring logic monitors the fetching of linked descriptor lists. When the CPU status flag is raised, it causes monitoring of the descriptor fetch by the USB descriptor monitoring logic. If the USB controller has completed all of the descriptor fetches while the CPU sleep flag is true, this logic sets a flag to cause the USB controller to suspend DMA fetch operations. | 10-08-2009 |
20100287394 | NORTH-BRIDGE TO SOUTH-BRIDGE PROTOCOL FOR PLACING PROCESSOR IN LOW POWER STATE - A processor integrated circuit has one or more processor cores and a power management controller in a North-Bridge that generates a first power state recommendation for the one or more processor cores. The North-Bridge also receives a second power state recommendation from a South-Bridge integrated circuit. The North-Bridge determines a final power state for the one or more processor cores based on the first and second power state recommendations. | 11-11-2010 |
20130159750 | METHOD AND APPARATUS FOR TRANSITIONING A SYSTEM TO AN ACTIVE DISCONNECT STATE - A processor includes a processor core and a power management controller operable to receive a timer event, store the timer event, generate a hardware system sleep command to enter a hardware system sleep state, and restore the timer event upon exiting from the hardware system sleep state. | 06-20-2013 |
20130227196 | CIRCUIT AND METHOD FOR INITIALIZING A COMPUTER SYSTEM - A circuit for use in a computing system including and a bus interface unit and an autoload controller. The autoload controller has an input to receive an initialization signal. In response to receiving the initialization signal, autoload controller searches for a signature using the bus interface unit and, in response to finding the signature at a signature address, loads a plurality of base addresses corresponding to a plurality of controllers from memory locations having a predetermined relationship to the address, and provides the plurality of base addresses to a control output thereof. | 08-29-2013 |
20140136738 | EMULATED LEGACY BUS OPERATION OVER A BIT-SERIAL BUS - Legacy bus operations, such as x86 I/O instructions having an address space separate from memory address space, are supported in a system in which I/O devices are coupled to a microcontroller connected via an SPI bus or other bit-serial bus. Each legacy bus operation is recognized and trapped by an interface controller, such as a south-bridge controller, which maps the trapped legacy bus operation into a corresponding bit-serial bus transaction, and transacts this corresponding bit-serial bus transaction on the bit-serial bus. Existing software infrastructure using x86 I/O instructions can remain intact, with I/O transactions bound for the SPI bus. | 05-15-2014 |
20140157026 | METHODS AND APPARATUS FOR DYNAMICALLY ADJUSTING A POWER LEVEL OF AN ELECTRONIC DEVICE - Methods and apparatus for dynamically adjusting a power level of an electronic device ( | 06-05-2014 |
20140310552 | REDUCED-POWER SLEEP STATE S3 - Current computer systems support sleep states such as sleep state S | 10-16-2014 |
Patent application number | Description | Published |
20120259942 | Proxy server with byte-based include interpreter - According to this disclosure, a proxy server is enhanced to be able to interpret instructions that specify how to modify an input object to create an output object to serve to a requesting client. Typically the instructions operate on binary data. For example, the instructions can be interpreted in a byte-based interpreter that directs the proxy as to what order, and from which source, to fill an output buffer that is served to the client. The instructions specify what changes to make to a generic input file. This functionality extends the capability of the proxy server in an open-ended fashion and enables it to efficiently create a wide variety of outputs for a given generic input file. The generic input file and/or the instructions may be cached at the proxy. The teachings hereof have applications in, among other things, the delivery of web content, streaming media, and the like. | 10-11-2012 |
20120265853 | FORMAT-AGNOSTIC STREAMING ARCHITECTURE USING AN HTTP NETWORK FOR STREAMING - This patent document describes, among other things, distributed computer platforms for online delivery of multimedia, including HD video, at broadcast audience scale to a variety of runtime environments and client devices in both fixed line and mobile environments. The teachings hereof can be applied to deliver live and on-demand content streams via computer networks. The teachings also relate to the ingestion of content streams in a given source format and the serving of the stream in a given target format. For example, a system might have machines in a content delivery network that ingest live streams in a source format, use an intermediate format to transport the stream within the system, and output the stream in a target format to clients that have requested (e.g., with an HTTP request) the stream. The streams may be archived for later playback. | 10-18-2012 |
20150019633 | METHODS AND APPARATUS FOR MAKING BYTE-SPECIFIC MODIFICATIONS TO REQUESTED CONTENT - According to this disclosure, a proxy server is enhanced to be able to interpret instructions that specify how to modify an input object to create an output object to serve to a requesting client. Typically the instructions operate on binary data. For example, the instructions can be interpreted in a byte-based interpreter that directs the proxy as to what order, and from which source, to fill an output buffer that is served to the client. The instructions specify what changes to make to a generic input file. This functionality extends the capability of the proxy server in an open-ended fashion and enables it to efficiently create a wide variety of outputs for a given generic input file. The generic input file and/or the instructions may be cached at the proxy. The teachings hereof have applications in, among other things, the delivery of web content, streaming media, and the like. | 01-15-2015 |
Patent application number | Description | Published |
20090199302 | System and Methods for Granular Access Control - A method and system for granular access control. An access control system allows a user or administrator to restrict access to electronic documents on a granular basis. Access may be restricted for individual data objects, types of objects, or even on a byte-by-byte basis. When a user attempts to access the electronic document, the access control system determines what parts, if any, of the document the user is permitted to access, and retrieves only those parts for access by the user. Data objects may include, for example, audio, video, graphics, or text. | 08-06-2009 |
20120233250 | AUTO-UPDATABLE DOCUMENT PARTS WITHIN CONTENT MANAGEMENT SYSTEMS - Techniques are described for managing relationships between entities in a content management system. Embodiments of the invention identify a relationship between a first entity and a second entity in the content management system. Embodiments monitor the first entity in the content management system to detect an occurrence of a triggering event specified in one or more management rules. One or more actions specified by the one or more management rules are then performed on the second entity in the content management system, responsive to the detected occurrence of the triggering event. | 09-13-2012 |
20120284225 | AUTO-UPDATABLE DOCUMENT PARTS WITHIN CONTENT MANAGEMENT SYSTEMS - Techniques are described for managing relationships between entities in a content management system. Embodiments of the invention identify a relationship between a first entity and a second entity in the content management system. Embodiments monitor the first entity in the content management system to detect an occurrence of a triggering event specified in one or more management rules. One or more actions specified by the one or more management rules are then performed on the second entity in the content management system, responsive to the detected occurrence of the triggering event. | 11-08-2012 |
Patent application number | Description | Published |
20080215642 | System, Method, And Service For Migrating An Item Within A Workflow Process - An item migration system generates a workflow process comprising logical nodes and physical nodes. Candidate physical nodes are associated with the logical nodes. An item generated at an initial logical node within the workflow process is inserted into the workflow and logically migrated to a subsequent logical node. The system determines whether the item requires physical migration based on properties of the item, characteristics of the subsequent logical node, characteristics of candidate physical nodes, and weighting factors applied to the properties and characteristics. If the item requires physical migration, the system selects an optimum target physical node from the candidate physical nodes. The present system migrates the item to the physical location corresponding to the selected physical node. Otherwise, the present system performs logical migration to the logical node without physical migration. | 09-04-2008 |
20090055397 | Multi-Dimensional Access Control List - Methods and apparatus, including computer program products, implementing and using techniques for providing an access control list for an object in a computer system. A list of one or more subjects is defined. Each of the subjects is associated with a set of operations that the subject can perform on the object. A set of rules is defined that specify conditions at which a different set of operations is to be associated with one or more of the subjects in the list of subjects. An access control list is also described. | 02-26-2009 |
20110225202 | MULTI-DIMENSIONAL ACCESS CONTROL LIST - Methods and apparatus, including computer program products, implementing and using techniques for providing a dynamic access control list for an object in a computer- implemented content management system. A list of one or more subjects is received. Each of the subjects is associated with a set of operations that the subject has permission to perform on the object in accordance with a first rule-set. A set of dynamic evolution conditions is defined. The dynamic evolution conditions specify under what circumstances to evolve the access control list to a new state in which a second rule-set describes a different set of operations to be associated with one or more of the subjects. The dynamic evolution conditions, the subjects, and the operations are stored in a dynamic access control list on a server in the content management system. A content management system is also described. | 09-15-2011 |
20140146082 | AUGMENTED REALITY INFORMATION SYSTEM - In various example embodiments, a system and method for providing information in an augmented reality display are provided. In example embodiments, a continuous stream of image data captured by a client device is received. An object within the continuous stream of image data is identified. Based on an identification of the object from the continuous stream of image data, a search for information related to the object is performed. A result is determined by filtering the information related to the object. The result is formatted to be displayed over a real-time image of the object on the client device. | 05-29-2014 |
Patent application number | Description | Published |
20090261373 | LOW OPTICAL LOSS ELECTRODE STRUCTURES FOR LEDS - An electrode structure is disclosed for enhancing the brightness and/or efficiency of an LED. The electrode structure can have a metal electrode and an optically transmissive thick dielectric material formed intermediate the electrode and a light emitting semiconductor material. The electrode and the thick dielectric cooperate to reflect light from the semiconductor material back into the semiconductor so as to enhance the likelihood of the light ultimately being transmitted from the semiconductor material. Such LED can have enhanced utility and can be suitable for uses such as general illumination. | 10-22-2009 |
20100133575 | LOW OPTICAL LOSS ELECTRODE STRUCTURES FOR LEDS - An electrode structure is disclosed for enhancing the brightness and/or efficiency of an LED. The electrode structure can have a metal electrode and an optically transmissive thick dielectric material formed intermediate the electrode and a light emitting semiconductor material. The electrode and the thick dielectric cooperate to reflect light from the semiconductor material back into the semiconductor so as to enhance the likelihood of the light ultimately being transmitted from the semiconductor material. Such LED can have enhanced utility and can be suitable for uses such as general illumination. | 06-03-2010 |
20110006332 | LEDs with LOW OPTICAL LOSS ELECTRODE STRUCTURES - Semiconductor devices in which one or more LEDs are formed include a dielectric region formed on a n/p region of the semiconductor, and that a metallic electrode can be formed on (at least partially on) the region of dielectric material. A transparent layer of a material such as Indium Tin Oxide can be used to make ohmic contact between the semiconductor and the metallic electrode, as the metallic electrode is separated from physical contact with the semiconductor by one or more of the dielectric material and the transparent ohmic contact layer (e.g., ITO layer). The dielectric material can enhance total internal reflection of light and reduce an amount of light that is absorbed by the metallic electrode. | 01-13-2011 |
20110024782 | LOW OPTICAL LOSS ELECTRODE STRUCTURES FOR LEDS - An electrode structure is disclosed for enhancing the brightness and/or efficiency of an LED. The electrode structure can have a metal electrode and an dielectric material formed intermediate the electrode and a light emitting semiconductor material. Electrical continuity between the semiconductor material and the metal electrode is provided by an optically transmissive ohmic contact layer, such as a layer of Indium Tin Oxide. The metal electrode thus can be physically separated from the semiconductor material by one or more of the dielectric material and the ohmic contact layer. The dielectric layer can increase total internal reflection of light at the interface between the semiconductor and the dielectric layer, which can reduce absorption of light by the electrode. Such LED can have enhanced utility and can be suitable for uses such as general illumination. | 02-03-2011 |
20120235195 | LEDS WITH EFFICIENT ELECTRODE STRUCTURES - Aspects include electrodes that provide specified reflectivity attributes for light generated from an active region of a Light Emitting Diode (LED). LEDs that incorporate such electrode aspects. Other aspects include methods for forming such electrodes, LEDs including such electrodes, and structures including such LEDs. | 09-20-2012 |
20130270573 | LEDs with Efficient Electrode Structures - Aspects include Light Emitting Diodes that have a GaN-based light emitting region and a metallic electrode. The metallic electrode can be physically separated from the GaN-based light emitted region by a layer of porous dielectric, which provides a reflecting region between at least a portion of the metallic electrode and the GaN-based light emitting region. | 10-17-2013 |
20140346554 | LEDS WITH EFFICIENT ELECTRODE STRUCTURES - Aspects include Light Emitting Diodes that have a GaN-based light emitting region and a metallic electrode. The metallic electrode can be physically separated from the GaN-based light emitted region by a layer of porous dielectric, which provides a reflecting region between at least a portion of the metallic electrode and the GaN-based light emitting region. | 11-27-2014 |