Aarts
Arno Aarts, Leuven BE
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20090325424 | Connecting Scheme for Orthogonal Assembly of Microstructures - In the present disclosure a device for sensing and/or actuation purposes is presented in which microstructures ( | 12-31-2009 |
20100178810 | Connecting Scheme for Orthogonal Assembly of Microstructures - In the present disclosure a device for sensing and/or actuation purposes is presented in which microstructures ( | 07-15-2010 |
20120295520 | Method for Sharpening Microprobe Tips - The present disclosure is related to a method for sharpening the tip of a microprobe, in particular a neural probe or an array of neuroprobes having a common base portion. | 11-22-2012 |
Bastiaan Aarts, San Jose, CA US
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20120066668 | C/C++ LANGUAGE EXTENSIONS FOR GENERAL-PURPOSE GRAPHICS PROCESSING UNIT - A general-purpose programming environment allows users to program a GPU as a general-purpose computation engine using familiar C/C++ programming constructs. Users may use declaration specifiers to identify which portions of a program are to be compiled for a CPU or a GPU. Specifically, functions, objects and variables may be specified for GPU binary compilation using declaration specifiers. A compiler separates the GPU binary code and the CPU binary code in a source file using the declaration specifiers. The location of objects and variables in different memory locations in the system may be identified using the declaration specifiers. CTA threading information is also provided for the GPU to support parallel processing. | 03-15-2012 |
20130283015 | EXPRESSING PARALLEL EXECUTION RELATIONSHIPS IN A SEQUENTIAL PROGRAMMING LANGUAGE - Circuits, methods, and apparatus that provide parallel execution relationships to be included in a function call or other appropriate portion of a command or instruction in a sequential programming language. One example provides a token-based method of expressing parallel execution relationships. Each process that can be executed in parallel is given a separate token. Later processes that depend on earlier processes wait to receive the appropriate token before being executed. In another example, counters are used in place to tokens to determine when a process is completed. Each function is a number of individual functions or threads, where each thread performs the same operation on a different piece of data. A counter is used to track the number of threads that have been executed. When each thread in the function has been executed, a later function that relies on data generated by the earlier function may be executed. | 10-24-2013 |
20140096147 | SYSTEM AND METHOD FOR LAUNCHING CALLABLE FUNCTIONS - A system and method are provided for launching a callable function. A processing system includes a host processor, a graphics processing unit, and a driver for launching a callable function. The driver is adapted to recognize at load time of a program that a first function within the program is a callable function. The driver is further adapted to generate a second function. The second function is adapted to receive arguments and translate the arguments from a calling convention for launching a function into a calling convention for calling a callable function. The second function is further adapted to call the first function using the translated arguments. The driver is also adapted to receive from the host processor or the GPU a procedure call representing a launch of the first function and, in response, launch the second function. | 04-03-2014 |
Bastiaan Aarts, Santa Clara, CA US
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20150143347 | SOFTWARE DEVELOPMENT ENVIRONMENT AND METHOD OF COMPILING INTEGRATED SOURCE CODE - A software development environment (SDE) and a method of compiling integrated source code. One embodiment of the SDE includes: (1) a parser configured to partition an integrated source code into a host code partition and a device code partition, the host code partition including a reference to a device variable, (2) a translator configured to: (2a) embed device machine code, compiled based on the device code partition, into a modified host code, (2b) define a pointer in the modified host code configured to be initialized, upon execution of the integrated source code, to a memory address allocated to the device variable, and (2c) replace the reference with a dereference to the pointer, and (3) a host compiler configured to employ a host library to compile the modified host code. | 05-21-2015 |
Bastiaan Joannes Matheus Aarts, San Jose, CA US
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20090259828 | EXECUTION OF RETARGETTED GRAPHICS PROCESSOR ACCELERATED CODE BY A GENERAL PURPOSE PROCESSOR - One embodiment of the present invention sets forth a technique for translating application programs written using a parallel programming model for execution on multi-core graphics processing unit (GPU) for execution by general purpose central processing unit (CPU). Portions of the application program that rely on specific features of the multi-core GPU are converted by a translator for execution by a general purpose CPU. The application program is partitioned into regions of synchronization independent instructions. The instructions are classified as convergent or divergent and divergent memory references that are shared between regions are replicated. Thread loops are inserted to ensure correct sharing of memory between various threads during execution by the general purpose CPU. | 10-15-2009 |
20090259829 | THREAD-LOCAL MEMORY REFERENCE PROMOTION FOR TRANSLATING CUDA CODE FOR EXECUTION BY A GENERAL PURPOSE PROCESSOR - One embodiment of the present invention sets forth a technique for translating application programs written using a parallel programming model for execution on multi-core graphics processing unit (GPU) for execution by general purpose central processing unit (CPU). Portions of the application program that rely on specific features of the multi-core GPU are converted by a translator for execution by a general purpose CPU. The application program is partitioned into regions of synchronization independent instructions. The instructions are classified as convergent or divergent and divergent memory references that are shared between regions are replicated. Thread loops are inserted to ensure correct sharing of memory between various threads during execution by the general purpose CPU. | 10-15-2009 |
20090259832 | RETARGETTING AN APPLICATION PROGRAM FOR EXECUTION BY A GENERAL PURPOSE PROCESSOR - One embodiment of the present invention sets forth a technique for translating application programs written using a parallel programming model for execution on multi-core graphics processing unit (GPU) for execution by general purpose central processing unit (CPU). Portions of the application program that rely on specific features of the multi-core GPU are converted by a translator for execution by a general purpose CPU. The application program is partitioned into regions of synchronization independent instructions. The instructions are classified as convergent or divergent and divergent memory references that are shared between regions are replicated. Thread loops are inserted to ensure correct sharing of memory between various threads during execution by the general purpose CPU. | 10-15-2009 |
20090259996 | PARTITIONING CUDA CODE FOR EXECUTION BY A GENERAL PURPOSE PROCESSOR - One embodiment of the present invention sets forth a technique for translating application programs written using a parallel programming model for execution on multi-core graphics processing unit (GPU) for execution by general purpose central processing unit (CPU). Portions of the application program that rely on specific features of the multi-core GPU are converted by a translator for execution by a general purpose CPU. The application program is partitioned into regions of synchronization independent instructions. The instructions are classified as convergent or divergent and divergent memory references that are shared between regions are replicated. Thread loops are inserted to ensure correct sharing of memory between various threads during execution by the general purpose CPU. | 10-15-2009 |
20090259997 | VARIANCE ANALYSIS FOR TRANSLATING CUDA CODE FOR EXECUTION BY A GENERAL PURPOSE PROCESSOR - One embodiment of the present invention sets forth a technique for translating application programs written using a parallel programming model for execution on multi-core graphics processing unit (GPU) for execution by general purpose central processing unit (CPU). Portions of the application program that rely on specific features of the multi-core GPU are converted by a translator for execution by a general purpose CPU. The application program is partitioned into regions of synchronization independent instructions. The instructions are classified as convergent or divergent and divergent memory references that are shared between regions are replicated. Thread loops are inserted to ensure correct sharing of memory between various threads during execution by the general purpose CPU. | 10-15-2009 |
Igor Matheus Petronella Aarts, Chester, NY US
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20150212425 | Quantitative Reticle Distortion Measurement System - A lithographic apparatus includes an illumination system configured to condition a radiation beam, a support constructed to hold a patterning device, the patterning device being capable of imparting the radiation beam with a pattern in its cross-section to form a patterned radiation beam, a substrate table constructed to hold a substrate, and a projection system configured to project the patterned radiation beam onto a target portion of the substrate. The lithographic apparatus further includes an encoder head designed to scan over a surface of the patterning device to determine a distortion in a first direction along a length of the patterning device and a distortion in a second direction substantially perpendicular to the surface of the patterning device. | 07-30-2015 |
Maarten Aarts, Hutten CH
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20090131568 | HALOGEN-FREE, FLAME-RETARDANT WIRE-AND-CABLE COMPOSITION AND RELATED ARTICLES - This invention relates to a flame-retardant composition useful for preparing a coated automotive wire with high scrape abrasion resistance and flexibility. The present invention is a halogen-free, flame-retardant composition made from or containing an ethylene/alpha-olefin copolymer, a halogen-free inorganic flame retardant, a coupling agent for coupling the inorganic flame retardant to the copolymer, and a processing aid. | 05-21-2009 |
20090312499 | CHLORINATED ETHYLENE-BASED POLYMERS AND COMPOSITIONS AND ARTICLES PREPARED THEREFROM - The invention provides a chlorinated ethylene-based polymer, process for preparing the same, and compositions and articles prepared from the same. The chlorinated ethylene-based polymer has a low residual crystallinity, for example, less than 8 percent, a relatively high crystallization temperature, Tc, for example greater than, or equal to, 25° C., and a medium weight average molecular weight, Mw, for example, less than, or equal to, 325,000 g/mole. | 12-17-2009 |
Maarten W. Aarts, Hutten CH
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20100120953 | Highly Filled, Propylene-Ethylene Copolymer Compositions - Compositions comprising, based on the weight of the composition: | 05-13-2010 |
20110147639 | Reactively Processed, High Heat Resistant Composition of Polypropylene and an Olefinic Interpolymer - A propylene polymer is coupled with an olefinic interpolymer by a process comprising contacting under reactive processing conditions at least: A. 10 wt % of at least one propylene polymer; B. 10 wt % of at least one olefinic interpolymer; C. 35 wt % of at least one metal hydrate; and D. A coupling amount of a coupling agent, each weight percent based on the combined weight of the propylene polymer, olefinic interpolymer and metal hydrate. Wire and cable insulation sheaths made from compositions comprising the coupled polymer exhibit desirable heat resistance. | 06-23-2011 |
Martinus A. Aarts, Huetten CH
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20080257482 | Composite Pipes and Method Making Same - Reinforced composite pipes and methods for making the same, generally employ at least one polymeric reinforcement phase, typically provided as an intermediate form | 10-23-2008 |
Martinus W. Aarts, Huetten CH
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20110114215 | COMPOSITE PIPES AND METHOD MAKING SAME - Reinforced composite pipes and methods for making the same, generally employ at least one polymeric reinforcement phase, typically provided as an intermediate form. The intermediate form is typically applied over a core pipe, and may be consolidated. An optional jacket may be employed. | 05-19-2011 |
Petrus Arnoldus Johannes Jacobus Aarts, San Jose CA
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20150302636 | 3D MODELING AND RENDERING FROM 2D IMAGES - A method of converting an image from one form to another form by a conversion apparatus having a memory and a processor, the method including the steps of receiving a captured image, extracting at least one image dimension attribute from the image, calculating at least one dimension attribute of the image based on the image dimension attribute, modifying the image based on the calculated dimension attribute and the extracted dimension attribute, and displaying the modified image on a display unit. | 10-22-2015 |
Robert Aarts, Espoo FI
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20080256216 | METHOD OF SUPPLYING ADVERTISING CONTENT - A method of supplying advertising content, a method comprising the steps of receiving content data, the data comprising metadata identifying an advertisement service, transmitting a data request to the advertisement service in accordance with the metadata, transmitting an authentication request to an authentication server, receiving an authentication response, the authentication response comprising user information, and transmitting advertisement information in accordance with the user information. | 10-16-2008 |
Robert Jan Aarts, Espoo FI
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20120036155 | ON-LINE SEARCHING SYSTEMS - A method of identifying within a database of node pairs, one or more complete paths connecting a start search node to a finish search node. The method includes sending a search query from a client terminal to a network: receiving the search query at a server, identifying node pairs having a finish node matching a start search node, sending a response from the server to the client terminal identifying any matching node pairs, and storing responses of any matching node pairs that have as a start node the finish search node. Further search queries are distributed across all servers, and node pairs having a finish node matching the start node contained in the query are identified. A response is sent from the server to the client terminal identifying any matching node pairs | 02-09-2012 |
Thomas W. Aarts, Leander, TX US
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20140156252 | HYBRID PLATFORM-DEPENDENT SIMULATION INTERFACE - According to one aspect of the present disclosure a system and technique for a hybrid platform-dependent simulation interface is disclosed. The system includes a processor and a simulation engine executable by the processor to provide a simulation environment for an application, the simulation engine simulating a non-simulation environment for hosting the application. The application comprises a library having a platform-independent application programming interface (API) for interacting with the simulation engine and a platform-dependent API providing an interface to the simulation engine using a platform-dependent hardware element, the platform-dependent hardware element unaffecting a non-simulation environment when the application is running in the non-simulation environment. | 06-05-2014 |
20140157289 | HYBRID PLATFORM-DEPENDENT SIMULATION INTERFACE - According to one aspect of the present disclosure, a method and technique for a hybrid platform-dependent simulation interface is disclosed. The method includes: encoding an application with a library having a platform-independent application programming interface (API) for interacting with a simulation engine, the simulation engine providing a simulated environment for hosting the application; and encoding the library with a platform-dependent API providing an interface to the simulation engine using a platform-dependent hardware element, the platform-dependent hardware element unaffecting a non-simulation environment when the application is running in the non-simulation environment. | 06-05-2014 |
Thomas W. Aarts, Mantorville, MN US
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20120041741 | Dynamically Adjusting Simulation Fidelity in a Self-Optimized Simulation of a Complex System - Mechanisms are provided for controlling a fidelity of a simulation of a system. A model of the system is received, the model of the system having a plurality of individual components of the system. Fidelity values are assigned to models of the individual components of the system. A required fidelity value is assigned to transactions between components in the plurality of individual components of the system. A simulation of the system is executed using the model of the system and the models of the individual components of the system. The fidelity values of one or more of the models of the individual components of the system are dynamically adjusted during the execution of the simulation based on the required fidelity values assigned to the transactions. | 02-16-2012 |
20120041742 | Dynamically Adjusting Simulation Fidelity Based on Changes in Activity Levels of Components - Mechanisms are provided for controlling a fidelity of a simulation of a system. A model of the system is received, the model of the system having a plurality of individual components of the system. Fidelity values are assigned to models of the individual components of the system. A simulation of the system is executed using the model of the system and the models of the individual components of the system. For each component in the plurality of individual components of the system, an activity level of the component during execution of the simulation is determined. The fidelity values of one or more of the models of the individual components of the system are dynamically adjusted during the execution of the simulation based on changes in individual activity levels of the individual components. | 02-16-2012 |
20120041747 | Dynamically Adjusting Simulation Fidelity Based on Checkpointed Fidelity State - Mechanisms are provided for controlling a fidelity of a simulation of a system. A model of the system is received, the model of the system having a plurality of individual components of the system. Fidelity values are assigned to models of the individual components of the system. A simulation of the system is executed using the model of the system and the models of the individual components of the system. The fidelity values of one or more of the models of the individual components of the system are dynamically adjusted during the execution of the simulation by creating a checkpoint of a state of the simulation and modifying one or more fidelity values of one or more of the models of the individual components after generating the checkpoint, thereby generating a modified fidelity value state. | 02-16-2012 |
20120041749 | Determining Simulation Fidelity in a Self-Optimized Simulation of a Complex System - Mechanisms are provided for controlling a fidelity of a simulation of a computer system. A model of the system is received that has a plurality of components. A representation of the plurality of individual components of the system is generated. A component is assigned to be a fidelity center having a highest possible associated fidelity value. Fidelity values are assigned to each other component in the plurality of individual components based on an affinity of the other component to the fidelity center. The system is simulated based on assigned fidelity values to the components in the plurality of individual components. | 02-16-2012 |
20120041750 | Dynamically Predicting Simulation Fidelity in a Self-Optimized Simulation of a Complex System - Mechanisms are provided for controlling a fidelity of a simulation of a system. A model of the system is received, where the model has a plurality of individual components of the system. Fidelity values are assigned to models of the individual components of the system and a simulation of the system is executed using the model of the system and the models of the individual components of the system. The simulation comprises a plurality of transactions targeting a receiver component. A history of mismatches between a fidelity value associated with the receiver component and required fidelity values of the plurality of transactions targeting the receiver component is maintained. A prediction of a fidelity value to be assigned to the receiver component based on the history of mismatches is performed. A fidelity value of the receiver component is adjusted based on results of predicting the fidelity value to be assigned to the receiver component. | 02-16-2012 |
20130253899 | Determining Simulation Fidelity in a Self-Optimized Simulation of a Complex System - Mechanisms are provided for controlling a fidelity of a simulation of a computer system. A model of the system is received that has a plurality of components. A representation of the plurality of individual components of the system is generated. A component is assigned to be a fidelity center having a highest possible associated fidelity value. Fidelity values are assigned to each other component in the plurality of individual components based on an affinity of the other component to the fidelity center. The system is simulated based on assigned fidelity values to the components in the plurality of individual components. | 09-26-2013 |
Thomas William Aarts, Leander, TX US
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20150088482 | SIMULATED COMPONENT CONNECTOR DEFINITION AND CONNECTION PROCESS - A dataset comprising a plurality of hardware component entries and one or more connection entries is processed. Each hardware component entry indicates a hardware component for simulation. Each connection entry indicates a plurality of hardware components to be connected. A plurality of simulated hardware components is created based, at least in part, on the plurality of hardware component entries. A simulated connection between a first simulated hardware component of the plurality of simulated hardware components and a second simulated hardware component of the plurality of simulated hardware components is created based, at least in part, on a connection entry of the one or more connection entries. | 03-26-2015 |
20150088483 | SIMULATED COMPONENT CONNECTOR DEFINITION AND CONNECTION PROCESS - A dataset comprising a plurality of hardware component entries and one or more connection entries is processed. Each hardware component entry indicates a hardware component for simulation. Each connection entry indicates a plurality of hardware components to be connected. A plurality of simulated hardware components is created based, at least in part, on the plurality of hardware component entries. A simulated connection between a first simulated hardware component of the plurality of simulated hardware components and a second simulated hardware component of the plurality of simulated hardware components is created based, at least in part, on a connection entry of the one or more connection entries. | 03-26-2015 |