Patent application number | Description | Published |
20080227369 | Apparatus and Method for Confined Area Planarization - A proximity head and associated method of use is provided for performing confined area planarization of a semiconductor wafer. The proximity head includes a chamber defined to maintain an electrolyte solution. A cathode is disposed within the chamber in exposure to the electrolyte solution. A cation exchange membrane is disposed over a lower opening of the chamber. A top surface of the cation exchange membrane is in direct exposure to the electrolyte solution to be maintained within the chamber. A fluid supply channel is defined to expel fluid at a location adjacent to a lower surface of the cation exchange membrane. A vacuum channel is defined to provide suction at a location adjacent to the lower surface of the cation exchange membrane, such that the fluid to be expelled from the fluid supply channel is made to flow over the lower surface of the cation exchange membrane. | 09-18-2008 |
20080251148 | Fluid Handling System for Wafer Electroless Plating and Associated Methods - A chemical fluid handling system is defined to supply a number of chemicals to a number of fluid inputs of a mixing manifold. The chemical fluid handling system includes a number of fluid recirculation loops for separately pre-conditioning and controlling the supply of each of the number of chemicals. Each of the fluid recirculation loops is defined to degas, heat, and filter a particular one of the number of chemical components. The mixing manifold is defined to mix the number of chemicals to form the electroless plating solution. The mixing manifold includes a fluid output connected to a supply line. The supply line is connected to supply the electroless plating solution to a fluid bowl within an electroless plating chamber. | 10-16-2008 |
20080254225 | Method and Apparatus for Wafer Electroless Plating - A semiconductor wafer electroless plating apparatus includes a platen and a fluid bowl. The platen has a top surface defined to support a wafer, and an outer surface extending downward from a periphery of the top surface to a lower surface of the platen. The fluid bowl has an inner volume defined by an interior surface so as to receive the platen, and wafer to be supported thereon, within the inner volume. A seal is disposed around the interior surface of the fluid bowl so as to form a liquid tight barrier when engaged between the interior surface of the fluid bowl and the outer surface of the platen. A number of fluid dispense nozzles are positioned to dispense electroplating solution within the fluid bowl above the seal so as to rise up and flow over the platen, thereby flowing over the wafer when present on the platen. | 10-16-2008 |
20080254621 | Wafer Electroless Plating System and Associated Methods - A dry-in/dry-out system is disclosed for wafer electroless plating. The system includes an upper zone for wafer ingress/egress and drying operations. Proximity heads are provided in the upper zone to perform the drying operations. The system also includes a lower zone for electroless plating operations. The lower zone includes an electroless plating apparatus that implements a wafer submersion by fluid upwelling method. The upper and lower zones of the system are enclosed by a dual-walled chamber, wherein the inner wall is a chemically inert plastic and the outer wall is a structural metal. The system interfaces with a fluid handling system which provides the necessary chemistry supply and control for the system. The system is ambient controlled. Also, the system interfaces with an ambient controlled managed transfer module (MTM). | 10-16-2008 |
20080260940 | APPARATUS AND METHOD FOR INTEGRATED SURFACE TREATMENT AND DEPOSITION FOR COPPER INTERCONNECT - A method and system for depositing films on a substrate for copper interconnect in an integrated system is provided. The method includes moving the substrate into a processing chamber having a plurality of proximity heads. Selected ones of the proximity heads is configured to perform at least one of surface treatments and atomic layer depositions (ALDs). The processing chamber is part of the integrated system. Within the processing chamber, barrier layer deposition is performed over a surface of the substrate using one of the plurality of proximity heads functioning to perform barrier layer ALD. In addition, the method includes moving the substrate from the processing chamber, through a transfer module of the integrated system and into a processing module for performing copper seed layer deposition. The processing module for performing copper seed layer deposition is part of the integrated system. Within the processing module for performing copper seed layer deposition, copper seed layer deposition is performed over the surface of the substrate. The integrated system enables controlled-ambient transitions within the integrated system to limit exposure of the substrate to uncontrolled ambient conditions outside of the integrated system. | 10-23-2008 |
20080260963 | APPARATUS AND METHOD FOR PRE AND POST TREATMENT OF ATOMIC LAYER DEPOSITION - The embodiments fill the needs of systems and processes that perform substrate surface treatment to provide homogenous, clean, and sometimes activated surface in order to provide good adhesion between layers to improve metal migration and void propagation. In an exemplary embodiment, a proximity head for treating a substrate surface is provided. The proximity head is configured to dispense a treatment gas to treat an active process region of a substrate surface under the proximity head. The proximity head covers the action process region of the substrate surface and the proximity head includes at least one vacuum channel to pull excess treatment gas from a reaction volume between the proximity head and the substrate. The proximity head has an excitation chamber to excite the treatment gas before the treatment gas being dispensed on the active process region portion of the substrate surface. | 10-23-2008 |
20080260967 | APPARATUS AND METHOD FOR INTEGRATED SURFACE TREATMENT AND FILM DEPOSITION - The embodiments fill the needs of systems and processes that perform substrate surface treatment to provide homogenous, clean, and sometimes activated surface in order to provide good adhesion between layers to improve metal migration and void propagation. In one exemplary embodiment, a chamber for performing surface treatment and film deposition is provided. The chamber includes a first proximity head for substrate surface treatment configured to dispense a first treatment gas to treat a portion of a surface of a substrate under the first proximity head for substrate surface treatment. The chamber also includes a first proximity head for atomic layer deposition (ALD) configured to sequentially dispensing a first reactant gas and a first purging gas to deposit a first ALD film under the second proximity head for ALD. | 10-23-2008 |
20080261412 | APPARATUS AND METHOD FOR ATOMIC LAYER DEPOSITION - The embodiments provide apparatus and methods of depositing conformal thin film on interconnect structures by providing processes and systems using an atomic layer deposition (ALD). More specifically, each of the ALD systems includes a proximity head that has a small reaction volume right above an active process region of the substrate surface. The proximity head small amount of reactants and purging gas to be distributed and pumped away from the small reaction volume between the proximity head and the substrate in relatively short periods, which increases the through-put. In an exemplary embodiment, a proximity head for dispensing reactants and purging gas to deposit a thin film by atomic layer deposition (ALD) is provided. The proximity head is configured to sequentially dispensing a reactant gas and a purging gas to deposit a thin ALD film under the proximity head. The proximity head covers an active process region of a substrate surface. The proximity head also includes at least one vacuum channel to pull excess reactant gas, purging gas, or deposition byproducts from a reaction volume between a surface of the proximity head facing the substrate and the substrate. The proximity includes a plurality of sides, each side being configured to dispense either a reactant gas or a purging gas on the substrate surface underneath the proximity head. Each side has at least one vacuum channel. | 10-23-2008 |
20080280456 | Thermal methods for cleaning post-CMP wafers - Methods for cleaning semiconductor wafers following chemical mechanical polishing are provided. An exemplary method exposes a wafer to a thermal treatment in an oxidizing environment followed by a thermal treatment in a reducing environment. The thermal treatment in the oxidizing environment both removes residues and oxidizes exposed copper surfaces to form a cupric oxide layer. The thermal treatment in the reducing environment then reduces the cupric oxide to elemental copper. This leaves the exposed copper clean and in condition for further processing, such as electroless plating. | 11-13-2008 |
20080314756 | Methods and systems for three-dimensional integrated circuit through hole via gapfill and overburden removal - Presented are methods and systems for fabricating three-dimensional integrated circuits having large diameter through-hole vias. One embodiment of the present invention provides a method of processing a wafer having holes for through-hole vias. The method comprises plating a gapfill metal on the wafer. The method also comprises chemically or electrochemically deplating a portion of the overburden metal. The method further comprises using chemical mechanical planarization to planarize the gapfill metal and to remove the remaining overburden metal. Another embodiment of the present invention is an integrated system comprising a process chamber for containing the wafer, a plating component integrated with the process chamber, and a deplating component integrated with the process chamber. The plating component is configured to electrochemically plate a gapfill metal onto the wafer to a least partially fill the holes. The deplating component is configured to chemically or to electrochemically remove a portion of the overburden metal formed by the plating component. | 12-25-2008 |
20080315418 | Methods of post-contact back end of line through-hole via integration - Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. In one embodiment, the method comprises forming metal plug contacts through a hard mask and a premetal dielectric to transistors in the semiconductor. The method also includes etching a hole for a through-hole via through the hard mask to the semiconductor using a patterned photoresist process, removing the patterned photoresist and using a hard mask process to etch the hole to an amount into the semiconductor. The method further includes depositing a dielectric liner to isolate the hole from the semiconductor, depositing a gapfill metal to fill the hole, and planarizing the surface of the substrate to the hard mask. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention. | 12-25-2008 |
20080315422 | Methods and apparatuses for three dimensional integrated circuits - Methods and apparatuses for fabricating three-dimensional integrated circuits having through hole vias are provided. One aspect of the present invention is a method of gapfill for through hole vias for three-dimensional integrated circuits. The method comprises providing a semiconductor wafer having a plurality of holes for through hole vias and depositing a conformal metal layer to partially fill the holes to leave open voids. The method also includes purging the voids and cleaning the surface of the voids and using a dry deposition process to fill or close the voids. Another aspect of the present invention is an electronic device structure for a three-dimensional integrated circuit. | 12-25-2008 |
20090095198 | ELECTROLESS DEPOSITION FROM NON-AQUEOUS SOLUTIONS - A non-aqueous electroless copper plating solution that includes an anhydrous copper salt component, an anhydrous cobalt salt component, a non-aqueous complexing agent, and a non-aqueous solvent is provided. | 04-16-2009 |
20090134520 | PROCESS INTEGRATION SCHEME TO LOWER OVERALL DIELECTRIC CONSTANT IN BEOL INTERCONNECT STRUCTURES - Back-End of Line (BEoL) interconnect structures, and methods for their manufacture, are provided. The structures are characterized by narrower conductive lines and reduced overall dielectric constant values. Conformal diffusion barrier layers, and selectively formed capping layers, are used to isolate the conductive lines and vias from surrounding dielectric layers in the interconnect structures. The methods of the invention employ techniques to narrow the openings in photoresist masks in order to define narrower vias. More narrow vias increase the amount of misalignment that can be tolerated between the vias and the conductive lines. | 05-28-2009 |
20090242413 | Electroplating Head and Method for Operating the Same - An electroplating head is disposed above and proximate to an upper surface of a wafer. Cations are transferred from an anode to an electroplating solution within the electroplating head. The electroplating solution flows downward through a porous electrically resistive material at an exit of the electroplating head to be disposed on the upper surface of the wafer. An electric current is established between the anode and the upper surface of the wafer through the electroplating solution. The electric current is uniformly distributed by the porous electrically resistive material present between the anode and the upper surface of the wafer. The electric current causes the cations to be attracted to the upper surface of the wafer. | 10-01-2009 |
20090304914 | Self assembled monolayer for improving adhesion between copper and barrier layer - The embodiments fill the need enabling deposition of a thin and conformal barrier layer, and a copper layer in the copper interconnect with good electro-migration performance and with reduced risk of stress-induce voiding of copper interconnect. Electromigration and stress-induced voiding are affected by the adhesion between the barrier layer and the copper layer. A functionalization layer is deposited over the barrier layer to enable the copper layer being deposit in the copper interconnect. The functionalization layer forms strong bonds with barrier layer and with copper to improve adhesion property between the two layers. An exemplary method of preparing a substrate surface of a substrate to deposit a functionalization layer over a metallic barrier layer of a copper interconnect to assist deposition of a copper layer in the copper interconnect in order to improve electromigration performance of the copper interconnect is provided. The method includes depositing the metallic barrier layer to line the copper interconnect structure in the integrated system, and oxidizing a surface of the metallic barrier layer. The method also includes depositing the functionalization layer over the oxidized surface of the metallic barrier layer, and depositing the copper layer in the copper interconnect structure after the funcationalization layer is deposited over the metallic barrier layer. | 12-10-2009 |
20090320749 | APPARATUS FOR INTEGRATED SURFACE TREATMENT AND DEPOSITION FOR COPPER INTERCONNECT - An integrated system for depositing films on a substrate for copper interconnect is provided. The system includes a processing chamber with a plurality of proximity heads, and a vacuum transfer module coupled to the processing chamber. Selected ones of the proximity heads are used for surface treatments and atomic layer depositions (ALDs). The system further includes a processing module for copper seed layer deposition, which is integrated with a rinse/dryer to enable dry-in/dry-out process capability and is filled with an inert gas to limit the exposure of the substrate to oxygen. Additionally, the system includes a controlled-ambient transfer module coupled to the processing module for copper seed layer deposition. Further, the system includes a loadlock coupled to the vacuum transfer module and to the controlled-ambient transfer module. The integrated system enables controlled-ambient transitions within the system to limit exposure of the substrate to uncontrolled ambient conditions outside of the system. | 12-31-2009 |
20100009535 | METHODS AND SYSTEMS FOR BARRIER LAYER SURFACE PASSIVATION - This invention pertains to methods and systems for fabricating semiconductor devices. One aspect of the present invention is a method of depositing a gapfill copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the method includes forming the barrier layer on a surface of a substrate and subjecting the barrier layer to a process condition so as to form a removable passivated surface on the barrier layer. The method further includes removing the passivated surface from the barrier layer and depositing the gapfill copper layer onto the barrier layer. Another aspect of the present invention is an integrated system for depositing a copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the integrated system comprises at least one process module configured for barrier layer deposition and passivated surface formation and at least one other process module configured for passivated surface removal and deposition of copper onto the barrier layer. The system further includes at least one transfer module coupled so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment. | 01-14-2010 |
20100044867 | METHODS OF POST-CONTACT BACK END OF LINE THROUGH-HOLE VIA INTEGRATION - Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention. | 02-25-2010 |
20100108491 | METHODS FOR REMOVING A METAL OXIDE FROM A SUBSTRATE - A method for generating plasma for removing metal oxide from a substrate is provided. The method includes providing a powered electrode assembly, which includes a powered electrode, a dielectric layer, and a wire mesh disposed between the powered electrode and the dielectric layer. The method also includes providing a grounded electrode assembly disposed opposite the powered electrode assembly to form a cavity wherein the plasma is generated. The wire mesh is shielded from the plasma by the dielectric layer when the plasma is present in the cavity, which has an outlet at one end for providing the plasma to remove the metal oxide. The method further includes introducing at least one inert gas and at least one process gas into the cavity. The method yet also includes applying an rf field to the cavity using the powered electrode to generate the plasma from the inert and the process gas. | 05-06-2010 |
20100136788 | THERMAL METHODS FOR CLEANING POST-CMP WAFERS - Methods for cleaning semiconductor wafers following chemical mechanical polishing are provided. An exemplary method exposes a wafer to a thermal treatment in an oxidizing environment followed by a thermal treatment in a reducing environment. The thermal treatment in the oxidizing environment both removes residues and oxidizes exposed copper surfaces to form a cupric oxide layer. The thermal treatment in the reducing environment then reduces the cupric oxide to elemental copper. This leaves the exposed copper clean and in condition for further processing, such as electroless plating. | 06-03-2010 |
20100170803 | Method and Apparatus for Plating Semiconductor Wafers - First and second electrodes are disposed at first and second locations, respectively, proximate to a periphery of a wafer support, wherein the first and second location are substantially opposed to each other relative to the wafer support. Each of the first and second electrodes can be moved to electrically connect with and disconnect from a wafer held by the wafer support. An anode is disposed over and proximate to the wafer such that a meniscus of electroplating solution is maintained between the anode and the wafer. As the anode moves over the wafer from the first location to the second location, an electric current is applied through the meniscus between the anode and the wafer. Also, as the anode is moved over the wafer, the first and second electrodes are controlled to connect with the wafer while ensuring that the anode does not pass over an electrode that is connected. | 07-08-2010 |
20100239767 | Apparatus for Applying a Plating Solution for Electroless Deposition - An electroless plating chamber is provided. The electroless plating chamber includes a chuck configured to support a substrate and a bowl surrounding a base and a sidewall of the chuck. The base has an annular channel defined along an inner diameter of the base. The chamber includes a drain connected to the annular channel. The drain is capable of removing fluid collected from the chuck. A proximity head capable of cleaning and substantially drying the substrate is included in the chamber. A method for performing an electroless plating operation is also provided. | 09-23-2010 |
20100267229 | METHODS AND SYSTEMS FOR LOW INTERFACIAL OXIDE CONTACT BETWEEN BARRIER AND COPPER METALLIZATION - The present invention relates to methods and systems for the metallization of semiconductor devices. One aspect of the present invention is a method of depositing a copper layer onto a barrier layer so as to produce a substantially oxygen free interface therebetween. In one embodiment, the method includes providing a substantially oxide free surface of the barrier layer. The method also includes depositing an amount of atomic layer deposition (ALD) copper on the oxide free surface of the barrier layer effective to prevent oxidation of the barrier layer. The method further includes depositing a gapfill copper layer over the ALD copper. Another aspect of the present invention is a system for depositing a copper layer onto barrier layer so as to produce a substantially oxygen-free interface therebetween. In one embodiment, the integrated system includes at least one barrier deposition module. The system also includes an ALD copper deposition module configured to deposit copper by atomic layer deposition. The system further includes a copper gapfill module and at least one transfer module coupled to the at least one barrier deposition module and to the ALD copper deposition module. The transfer module is configured so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment. | 10-21-2010 |
20110011335 | Electroless Plating Method and Apparatus - An electroless plating system is provided. The system includes a first vacuum chuck supporting a first wafer and a second vacuum chuck supporting a second wafer such that a top surface of the second wafer is opposing a top surface of the first wafer. The system also includes a fluid delivery system configured to deliver a plating solution to the top surface of the first wafer, wherein in response to delivery of the plating solution, the top surface of the second wafer is brought proximate to the top surface of the first wafer so that the plating solution contacts both top surfaces. A method for applying an electroless plating solution to a substrate is also provided. | 01-20-2011 |
20110081779 | Method and Apparatus for Material Deposition - Broadly speaking, a method and an apparatus are provided for depositing a material on a semiconductor wafer (“wafer”). More specifically, the method and apparatus provide for selective heating of a surface of the wafer exposed to an electroless plating solution. The selective heating is provided by applying radiant energy to the wafer surface. The selective heating of the wafer surface causes a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase at the interface in turn causes a plating reaction to occur at the wafer surface. Thus, material is deposited on the wafer surface through an electroless plating reaction that is initiated and controlled by varying the temperature of the wafer surface using an appropriately defined radiant energy source. | 04-07-2011 |
20110306203 | INTERCONNECT STRUCTURE AND METHOD OF MANUFACTURING A DAMASCENE STRUCTURE - An interconnect structure is provided, including a layer of dielectric material having at least one opening and a first barrier layer on sidewalls defining the opening. A ruthenium-containing second barrier layer overlays the first barrier layer, the second barrier layer having a ruthenium zone, a ruthenium oxide zone, and a ruthenium-rich zone. The ruthenium zone is interposed between the first barrier layer and the ruthenium oxide zone. The ruthenium oxide zone is interposed between the ruthenium zone and the ruthenium-rich zone. | 12-15-2011 |
20120024230 | APPARATUSES AND SYSTEMS FOR FABRICATING THREE DIMENSIONAL INTEGRATED CIRCUITS - The present invention pertains to methods, apparatuses, and systems for fabricating three-dimensional integrated circuits. One or more embodiments of systems, apparatuses, and/or methods according to the present invention are presented. | 02-02-2012 |
20120045897 | Wafer Electroless Plating System and Associated Methods - A dry-in/dry-out system is disclosed for wafer electroless plating. The system includes an upper zone for wafer ingress/egress and drying operations. Proximity heads are provided in the upper zone to perform the drying operations. The system also includes a lower zone for electroless plating operations. The lower zone includes an electroless plating apparatus that implements a wafer submersion by fluid upwelling method. The upper and lower zones of the system are enclosed by a dual-walled chamber, wherein the inner wall is a chemically inert plastic and the outer wall is a structural metal. The system interfaces with a fluid handling system which provides the necessary chemistry supply and control for the system. The system is ambient controlled. Also, the system interfaces with an ambient controlled managed transfer module (MTM). | 02-23-2012 |
20120152147 | Electroless Deposition from Non-Aqueous Solutions - A non-aqueous electroless copper plating solution that includes an anhydrous copper salt component, an anhydrous cobalt salt component, a non-aqueous complexing agent, and a non-aqueous solvent is provided. | 06-21-2012 |
20120205807 | DEVICE WITH POST-CONTACT BACK END OF LINE THROUGH-HOLE VIA INTEGRATION - Presented are device structures and methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention. | 08-16-2012 |
20120248219 | APPARATUS AND METHOD FOR ATOMIC LAYER DEPOSITION - A proximity heads for dispensing reactants and purging gas to deposit a thin film by Atomic Layer Deposition (ALD) includes a plurality of sides. Extending over a portion of the substrate region and being spaced apart from the portion of the substrate region when present, the proximity head is rotatable so as to place each side in a direction of the substrate region, and is disposed in a vacuum chamber coupled to a carrier gas source to sustain a pressure for the proximity head during operation. Each side of the proximity head includes a gas conduit through which the reactant gas and the purging gas are sequentially dispensed, and at least two separate vacuum conduits on each side of the gas conduit to pull excess reactant gas, purging gas, or deposition byproducts from a reaction volume between a surface of the proximity head facing the substrate and the substrate. | 10-04-2012 |
20120269987 | Processes and Systems for Engineering a Barrier Surface for Copper Deposition - An integrated system for processing a substrate in controlled environment to enable deposition of a thin copper seed layer on a surface of a metallic barrier layer of a copper interconnect is provided. The system includes a lab-ambient transfer chamber, a vacuum transfer chamber, a vacuum process module for cleaning an exposed surface of a metal oxide of a underlying metal, a vacuum process module for depositing the metallic barrier layer, and a controlled-ambient transfer chamber filled with an inert gas, wherein at least one controlled-ambient process module is coupled to the controlled-ambient transfer chamber. In addition, the system includes an electroless copper deposition process module used to deposit the thin layer of copper seed layer on the surface of the metallic barrier layer. | 10-25-2012 |
20130040460 | METHODS FOR ATOMIC LAYER DEPOSITION - A method of depositing a thin film by atomic layer deposition (ALD) on a substrate surface is disclosed. The disclosed method includes placing an ALD deposition proximity head above the substrate with at least one gas channel configured to dispense a gas to an active process region of the substrate surface. The ALD deposition proximity head extends over and is being spaced apart from the active process region of the substrate surface when present. After a pulse of a first reactant gas is dispensed on the active process region of the substrate surface underneath the proximity head, a pulse of a second reactant gas is dispensed on the active process region of the substrate surface underneath the proximity head to react with the first reactant gas to form a portion of the thin layer of ALD film on the surface of substrate underneath the proximity head. | 02-14-2013 |
20130171820 | METHODS FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT THROUGH HOLE VIA GAPFILL AND OVERBURDEN REMOVAL - Presented are methods and systems for fabricating three-dimensional integrated circuits having large diameter through-hole vias. One embodiment of the present invention provides a method of processing a wafer having holes for through-hole vias. The method comprises plating a gapfill metal on the wafer. The method also comprises chemically or electrochemically deplating a portion of the overburden metal. The method further comprises using chemical mechanical planarization to planarize the gapfill metal and to remove the remaining overburden metal. Another embodiment of the present invention is an integrated system comprising a process chamber for containing the wafer, a plating component integrated with the process chamber, and a deplating component integrated with the process chamber. The plating component is configured to electrochemically plate a gapfill metal onto the wafer to a least partially fill the holes. The deplating component is configured to chemically or to electrochemically remove a portion of the overburden metal formed by the plating component. | 07-04-2013 |
20130280917 | Method and Apparatus for Wafer Electroless Plating - A semiconductor wafer electroless plating apparatus includes a platen and a fluid bowl. The platen has a top surface defined to support a wafer, and an outer surface extending downward from a periphery of the top surface to a lower surface of the platen. The fluid bowl has an inner volume defined by an interior surface so as to receive the platen, and wafer to be supported thereon, within the inner volume. A seal is disposed around the interior surface of the fluid bowl so as to form a liquid tight barrier when engaged between the interior surface of the fluid bowl and the outer surface of the platen. A number of fluid dispense nozzles are positioned to dispense electroplating solution within the fluid bowl above the seal so as to rise up and flow over the platen, thereby flowing over the wafer when present on the platen. | 10-24-2013 |
20140154406 | WET ACTIVATION OF RUTHENIUM CONTAINING LINER/BARRIER - Methods and systems are provided for preparing a ruthenium containing liner/barrier for metal deposition, and are useful in the manufacture of integrated circuits. In accordance with one embodiment, a borohydride solution having a pH greater than 12 is mixed with DI water at the place of application to form a pretreatment solution. The pretreatment solution is applied to reduce a ruthenium-containing surface of a substrate. Following reduction of the ruthenium containing surface, copper deposition may be initiated. | 06-05-2014 |
20140322446 | PROCESSES AND SYSTEMS FOR ENGINEERING A COPPER SURFACE FOR SELECTIVE METAL DEPOSITION - An integrated system for transferring and processing a substrate in a controlled environment to enable selective deposition of a thin layer of a cobalt-alloy material on a copper surface of a copper interconnect to improve electromigration performance of the copper interconnect, comprising: a lab-ambient transfer chamber; a substrate cleaning reactor coupled to the lab-ambient transfer chamber, wherein the substrate cleaning reactor cleans the substrate surface to remove metal-organic complex contaminants on the substrate surface; a vacuum transfer chamber; a vacuum process module for removing organic contaminants from the substrate surface; a controlled-ambient transfer chamber filled with an inert gas; and an electroless cobalt-alloy material deposition process module used to deposit the thin layer of cobalt-alloy material on the copper surface of the copper interconnect after the substrate surface has been removed of metallic contaminants and organic contaminants, and the copper surface has been removed of copper oxide. | 10-30-2014 |
20150034589 | SYSTEM AND METHOD FOR FORMING PATTERNED COPPER LINES THROUGH ELECTROLESS COPPER PLATING - A method for forming copper on a substrate including inputting a copper source solution into a mixer, inputting a reducing solution into the mixer, mixing copper source solution and the reducing solution to form a plating solution having a pH of greater than about 6.5 and applying the plating solution to a substrate, the substrate including a catalytic layer wherein applying the plating solution to the substrate includes forming a catalytic layer, maintaining the catalytic layer in a controlled environment and forming copper on the catalytic layer. A system for forming copper structures is also disclosed. | 02-05-2015 |