Patent application number | Description | Published |
20130136195 | SYSTEM AND METHOD OF DATA COMMUNICATIONS BETWEEN ELECTRONIC DEVICES - A system and method of data communications between a first device and a second device is disclosed. The method includes generating a first clock signal at the first device and generating a second clock signal having a phase offset from the first clock signal. The clock signals are transmitted from the first device to the second device. The method further includes regulating transmission of a read strobe signal sent from the second device to the first device utilizing the first clock signal. The method also includes regulating transmission of a data transfer signal sent from the second device to the first device utilizing the second clock signal. | 05-30-2013 |
20130159587 | Interconnect Redundancy for Multi-Interconnect Device - A multi-interconnect integrated circuit device includes an input/output (I/O) circuit for conveying a plurality of interleaved data channel groups by configuring the I/O circuit to convey a first data channel group over a default fixed interconnect signal paths if there are no connection failures in the default fixed interconnect signal paths, and to convey the first data channel group over a second plurality of default fixed interconnect signal paths if there is at least one connection failure in the first plurality of default fixed interconnect signal paths, where the second plurality of default fixed interconnect signal paths includes a redundant fixed interconnect signal path for replacing a failed interconnect signal path from the first plurality of default fixed interconnect signal paths. | 06-20-2013 |
20130159818 | Unified Data Masking, Data Poisoning, and Data Bus Inversion Signaling - Provided herein is a method and system for providing and analyzing unified data signaling that includes setting, or analyzing a state of a single indicator signal, generating or analyzing a data pattern of a plurality of data bits, and signal, or determine, based on the state of the single indicator signal and the pattern of the plurality of data bits, that data bus inversion has been applied to the plurality of data bits or that the plurality of data bits is poisoned. | 06-20-2013 |
Patent application number | Description | Published |
20080198666 | Semiconductor device including adjustable driver output impedances - A semiconductor device is disclosed. In one embodiment, the device includes a first circuit, a second circuit, and a third circuit. The first circuit is configured to drive output signals and includes an adjustable output impedance. The second circuit is configured to adjust the adjustable output impedance. The third circuit is configured to sense a first parameter and to activate the second circuit to adjust the adjustable output impedance based on changes in the first parameter exceeding a first threshold value. | 08-21-2008 |
20080244358 | Circuits and Methods for Error Coding Data Blocks - A description is given of a circuit for creating an error coding data block for a first data block, including a first error coding path adapted to create the error coding data block in accordance with a first error coding; and a second error coding path adapted to create the error coding data block in accordance with a second error coding; the error coding data block for the first data block being created optionally by the first or second error coding paths, as a function of a control indicator, and at least the first error coding path comprising a data arrangement alteration device. | 10-02-2008 |
20110019787 | Method and Apparatus Synchronizing Integrated Circuit Clocks - Embodiments described herein include a method and system for synchronizing clocks between coupled integrated circuits (ICs) in a computer system. According to an embodiment, a dedicated timing pin is provided on a first IC. The first IC configures a second IC to change a pin assignment, so that the second IC interprets a signal sent on the timing pin by the first IC and received on the reassigned pin as a request to transmit a return signal. The return signal is received on the timing pin. The return signal is used to determine whether timing should be adjusted by the first IC. In an embodiment a clock and data recover (CDR) circuit compares the signal sent to the signal received in order to make the determination. In an embodiment the first IC is a processor-based device, and the second IC is a memory device controlled by the first device. | 01-27-2011 |
20120303995 | METHOD AND APPARATUS SYNCHRONIZING INTEGRATED CIRCUIT CLOCKS - Embodiments described herein include a method and system for synchronizing clocks between coupled integrated circuits (ICs) in a computer system. According to an embodiment, a dedicated timing pin is provided on a first IC. The first IC configures a second IC to change a pin assignment, so that the second IC interprets a signal sent on the timing pin by the first IC and received on the reassigned pin as a request to transmit a return signal. The return signal is received on the timing pin. The return signal is used to determine whether timing should be adjusted by the first IC. In an embodiment a clock and data recover (CDR) circuit compares the signal sent to the signal received in order to make the determination. In an embodiment the first IC is a processor-based device, and the second IC is a memory device controlled by the first device. | 11-29-2012 |
Patent application number | Description | Published |
20100329045 | Adjustment of Write Timing in a Memory Device - A method and system are provided for adjusting a write timing in a memory device. For instance, the method can include receiving a data signal, a write clock signal, and a reference signal. The method can also include detecting a phase shift in the reference signal over time. The phase shift of the reference signal can be used to adjust a phase difference between the data signal and the write clock signal, where the memory device recovers data from the data signal based on an adjusted write timing of the data signal and the write clock signal. | 12-30-2010 |
20110185218 | Adjustment of Write Timing Based on a Training Signal - A method, system, and computer program product are provided for adjusting write timing in a memory device based on a training signal. For instance, the method can include configuring the memory device in a training mode of operation. The method can also include determining a write timing window between a signal on a data bus and a write clock signal based on the training signal. Further, the method includes adjusting a phase difference between the signal on the data bus and the write clock signal based on the write timing window. The memory device can recover data on the data bus based on the adjusted phase difference. | 07-28-2011 |
20110185256 | Adjustment of Write Timing Based on Error Detection Techniques - A method, system, and computer program product are provided for adjusting write timing in a memory device based on results of an error detection function. For instance, the method can include determining a write timing window between a signal on a data bus and a write clock signal based on the results of the error detection function. The method can also include adjusting a phase difference between the signal on the data bus and the write clock signal based on the write timing window. The memory device can recover data on the data bus based on the adjusted phase difference. | 07-28-2011 |
20110208989 | Command Protocol for Adjustment of Write Timing Delay - A method, system, and computer program product are provided for adjusting write timing in a memory device based on a command protocol. For instance, the method can include enabling a write clock data recovery (WCDR) mode of operation. The method can also include transmitting WCDR data from a processing unit to the memory device during the WCDR mode of operation and another mode of operation of the memory device. Based on a phase shift in the WCDR data, a phase difference between a signal on a data bus and a write clock signal can be adjusted. Further, the method can include transmitting the signal on the data bus based on the adjusted phase difference between the signal on the data bus and the write clock signal. | 08-25-2011 |
20140211571 | Adjustment of Write Timing in a Memory Device - A method and system are provided for adjusting a write timing in a memory device. For instance, the method can include receiving a data signal, a write clock signal, and a reference signal. The method can also include detecting a phase shift in the reference signal over time. The phase shift of the reference signal can be used to adjust a phase difference between the data signal and the write clock signal, where the memory device recovers data from the data signal based on an adjusted write timing of the data signal and the write clock signal. | 07-31-2014 |
Patent application number | Description | Published |
20120264618 | QUANTIFICATION OF A MINORITY NUCLEIC ACID SPECIES - The technology relates in part to quantification of a minority nucleic acid species from a nucleic acid sample. In some embodiments, methods for determining the amount of fetal nucleic acid (e.g. absolute amount, relative amount) in a maternal sample are provided. | 10-18-2012 |
20120276542 | QUANTIFICATION OF A MINORITY NUCLEIC ACID SPECIES - The technology relates in part to quantification of a minority nucleic acid species from a nucleic acid sample. In some embodiments, methods for determining the amount of fetal nucleic acid (e.g. absolute amount, relative amount) in a maternal sample are provided. | 11-01-2012 |
20120322072 | QUANTIFICATION OF A MINORITY NUCLEIC ACID SPECIES - The technology relates in part to quantification of a minority nucleic acid species from a nucleic acid sample. In some embodiments, methods for determining the amount of fetal nucleic acid (e.g. absolute amount, relative amount) in a maternal sample are provided. | 12-20-2012 |
20130017960 | PRODUCTS AND PROCESSES FOR MULTIPLEX NUCLEIC ACID IDENTIFICATION - Provided herein are products and processes for detecting the presence or absence of multiple target nucleic acids. Certain methods include amplifying the target nucleic acids, or portion thereof; extending oligonucleotides that specifically hybridize to the amplicons, where the extended oligonucleotides include a capture agent; capturing the extended oligonucleotides to a solid phase via the capture agent; releasing the extended oligonucleotide by competition with a competitor; detecting the extended oligonucleotide, and thereby determining the presence or absence of each target nucleic acid by the presence or absence of the extended oligonucleotide. | 01-17-2013 |
20130150249 | PROCESSES AND COMPOSITIONS FOR METHYLATION-BASED ENRICHMENT OF FETAL NUCLEIC ACID FROM A MATERNAL SAMPLE USEFUL FOR NON-INVASIVE PRENATAL DIAGNOSES - Provided are compositions and processes that utilize genomic regions differentially methylated between a mother and her fetus to separate, isolate or enrich fetal nucleic acid from a maternal sample. The compositions and processes described herein are useful for non-invasive prenatal diagnostics, including the detection of chromosomal aneuplodies. | 06-13-2013 |
Patent application number | Description | Published |
20100105049 | PROCESSES AND COMPOSITIONS FOR METHYLATION-BASED ENRICHMENT OF FETAL NUCLEIC ACID FROM A MATERNAL SAMPLE USEFUL FOR NON INVASIVE PRENATAL DIAGNOSES - Provided are compositions and processes that utilize genomic regions differentially methylated between a mother and her fetus to separate, isolate or enrich fetal nucleic acid from a maternal sample. The compositions and processes described herein are useful for non-invasive prenatal diagnostics, including the detection of chromosomal aneuplodies. | 04-29-2010 |
20100273165 | PROCESSES AND COMPOSITIONS FOR METHYLATION-BASED ENRICHMENT OF FETAL NUCLEIC ACID FROM A MATERNAL SAMPLE USEFUL FOR NON INVASIVE PRENATAL DIAGNOSES - Provided are compositions and processes that utilize genomic regions that are differentially methylated between a mother and her fetus to separate, isolate or enrich fetal nucleic acid from a maternal sample. The compositions and processes described herein are particularly useful for non-invasive prenatal diagnostics, including the detection of chromosomal aneuplodies. | 10-28-2010 |
20120277119 | PROCESSES AND COMPOSITIONS FOR METHYLATION-BASED ENRICHMENT OF FETAL NUCLEIC ACID FROM A MATERNAL SAMPLE USEFUL FOR NON-INVASIVE PRENATAL DIAGNOSES - Provided are compositions and processes that utilize genomic regions differentially methylated between a mother and her fetus to separate, isolate or enrich fetal nucleic acid from a maternal sample. The compositions and processes described herein are useful for non-invasive prenatal diagnostics, including the detection of chromosomal aneuplodies. | 11-01-2012 |
20130143211 | PROCESSES AND COMPOSITIONS FOR METHYLATION-BASED ENRICHMENT OF FETAL NUCLEIC ACID FROM A MATERNAL SAMPLE USEFUL FOR NON-INVASIVE PRENATAL DIAGNOSES - Provided are compositions and processes that utilize genomic regions differentially methylated between a mother and her fetus to separate, isolate or enrich fetal nucleic acid from a maternal sample. The compositions and processes described herein are useful for non-invasive prenatal diagnostics, including the detection of chromosomal aneuploidies. | 06-06-2013 |
20130295564 | PROCESSES AND COMPOSITIONS FOR METHYLATION-BASED ENRICHMENT OF FETAL NUCLEIC ACID FROM A MATERNAL SAMPLE USEFUL FOR NON-INVASIVE PRENATAL DIAGNOSES - Provided are compositions and processes that utilize genomic regions that are differentially methylated between a mother and her fetus to separate, isolate or enrich fetal nucleic acid from a maternal sample. The compositions and processes described herein are particularly useful for non-invasive prenatal diagnostics, including the detection of chromosomal aneuploidies. | 11-07-2013 |
Patent application number | Description | Published |
20090248551 | TIME AND ATTENDANCE SYSTEM - The present invention is directed to one or more time and attendance systems specifically designed for use in the gaming (gambling) and hospitality (hotels and restaurants) industries, but may additionally be utilized advantageously in a wide range of other fields or industries. The disclosed time and attendance system can be easily integrated into existing human resource software systems so as to eliminate duplication of employee records and duplication of servers. The disclosed time and attendance system combines a time clock apparatus that allows employees and supervisors to clock in and clock out, view records of their accumulated time, etc., with a behind the clock software system that allows persons with proper authorization to configure the time clock apparatus and to review, approve, disapprove and/or edit employee time clock records in a simple and organized manner. | 10-01-2009 |
20090248552 | REAL-TIME TIME AND ATTENDANCE SYSTEM - The present invention is directed to one or more time and attendance systems specifically designed for use in the gaming (gambling) and hospitality (hotels and restaurants) industries, but may additionally be utilized advantageously in a wide range of other fields or industries. The disclosed time and attendance system can be easily integrated into existing human resource software systems so as to eliminate duplication of employee records and duplication of servers. The disclosed time and attendance system combines a time clock apparatus that allows employees and supervisors to clock in and clock out, view records of their accumulated time, etc., with a behind the clock software system that allows persons with proper authorization to configure the time clock apparatus and to review, approve, disapprove and/or edit employee time clock records in a simple and organized manner. | 10-01-2009 |
20090248553 | METHOD FOR RECORDING EMPLOYEE RECORDS - The present invention is directed to one or more time and attendance systems specifically designed for use in the gaming (gambling) and hospitality (hotels and restaurants) industries, but may additionally be utilized advantageously in a wide range of other fields or industries. The disclosed time and attendance system can be easily integrated into existing human resource software systems so as to eliminate duplication of employee records and duplication of servers. The disclosed time and attendance system combines a time clock apparatus that allows employees and supervisors to clock in and clock out, view records of their accumulated time, etc., with a behind the clock software system that allows persons with proper authorization to configure the time clock apparatus and to review, approve, disapprove and/or edit employee time clock records in a simple and organized manner. | 10-01-2009 |
Patent application number | Description | Published |
20120197689 | DYNAMIC SAVINGS ALLOCATION METHOD AND PURCHASING MODEL - A system and method for providing a dynamic savings allocation account. The dynamic savings allocation account includes customer-defined savings categories within the account that act as sub-accounts. The customer may create savings categories and set parameters such as the goal amount to be reached, the time to reach the goal, how much or what percentage to be allocated to each category per deposit, etc. As the customer deposits funds into the dynamic savings allocation account, the deposit is automatically allocated to each savings category as defined by the customer. As goals are reached, customers may opt to take advantage of group purchasing benefits offered by the financial institution for some in-demand items. Alternatively, the financial institution, in partnering with third-party vendors may perform targeted sales campaigns. | 08-02-2012 |
20120197783 | DYNAMIC SAVINGS ALLOCATION METHOD AND PURCHASING MODEL - A system and method for providing a dynamic savings allocation account. The dynamic savings allocation account includes customer-defined savings categories within the account that act as sub-accounts. The customer may create savings categories and set parameters such as the goal amount to be reached, the time to reach the goal, how much or what percentage to be allocated to each category per deposit, etc. As the customer deposits funds into the dynamic savings allocation account, the deposit is automatically allocated to each savings category as defined by the customer. As goals are reached, customers may opt to take advantage of group purchasing benefits offered by the financial institution for some in-demand items. Alternatively, the financial institution, in partnering with third-party vendors may perform targeted sales campaigns. | 08-02-2012 |
20150127446 | SYSTEM AND DISTRIBUTION NETWORK FOR DYNAMIC SAVINGS ALLOCATION MODELING - A system and method for allowing a customer to create savings goals for one or more savings categories is provided. More particularly, the customer is enabled to contribute to the one or more savings categories an amount of funds equal to the sum of annuity payment amounts and customer-specified percentages of payroll deposits. When a predetermined number of customers meet and/or exceed a common savings goal, the customers who met and/or exceeded the common savings goal is presented with an offer featuring a discounted group rate based on the predetermined number of customers who met and/or exceeded the common savings goal. The savings goal(s) of each customer may be adjusted based on other savings goal balances. | 05-07-2015 |
Patent application number | Description | Published |
20140101758 | SERVER WITH MECHANISM FOR REDUCING INTERNAL RESOURCES ASSOCIATED WITH A SELECTED CLIENT CONNECTION - According to certain non-limiting embodiments disclosed herein, the functionality of a server is extended with a mechanism for identifying connections with clients that have exhibited attack characteristics (for example, characteristics indicating a DoS attack), and for transitioning internal ownership of those connections such that server resources consumed by the connection are reduced, while keeping the connection open. The connection thus moves from a state of relatively high resource use to a state of relatively low server resource use, and the server is able to free resources such as memory and processing cycles previously allocated to the connection. In some cases, the server maintains the connection for at least some time and uses it to keep the client occupied so that it cannot launch—or has fewer resources to launch—further attacks, and possibly to gather information about the attacking client. | 04-10-2014 |
20150040221 | SERVER WITH MECHANISM FOR CHANGING TREATMENT OF CLIENT CONNECTIONS DETERMINED TO BE RELATED TO ATTACKS - According to certain non-limiting embodiments disclosed herein, the functionality of a server is extended with a mechanism for identifying connections with clients that have exhibited attack characteristics (for example, characteristics indicating a DoS attack), and for transitioning internal ownership of those connections such that server resources consumed by the connection are reduced, while keeping the connection open. The connection thus moves from a state of relatively high resource use to a state of relatively low server resource use. According to certain non-limiting embodiments disclosed herein, the functionality of a server is extended by enabling the server to determine that any of a client and a connection exhibits one or more attack characteristics (e.g., based on at least one of client attributes, connection attributes, and client behavior during the connection, or otherwise). As a result of the determination, the server changes its treatment of the connection. | 02-05-2015 |
20150281367 | MULTIPATH TCP TECHNIQUES FOR DISTRIBUTED COMPUTING SYSTEMS - In non-limiting embodiments described herein, multipath TCP can be implemented between clients and servers, the servers being in a distributed computing system. Multipath TCP can be used in a variety of ways to increase reliability, efficiency, capacity, flexibility, and performance of the distributed computing system. Examples include achieving path redundancy, connection migration between servers and between points-of-presence, end-user mapping (or -remapping), migration or path redundancy for special object delivery, and others. | 10-01-2015 |
Patent application number | Description | Published |
20100137963 | METHOD FOR FABRICATION OF LOW-POLARIZATION IMPLANTABLE STIMULATION ELECTRODE - A method for fabricating an implantable medical electrode includes roughening the electrode substrate, applying an adhesion layer, and depositing a valve metal oxide coating over the adhesion layer under conditions optimized to minimize electrode impedance and post-pulse polarization. The electrode substrate may be a variety of electrode metals or alloys including titanium, platinum, platinum-iridium, or niobium. The adhesion layer may be formed of titanium or zirconium. The valve metal oxide coating is a ruthenium oxide coating sputtered onto the adhesion layer under controlled target power, sputtering pressure, and sputter gas ratio setting optimized to minimize electrode impedance and post-pulse polarization. | 06-03-2010 |
20100249861 | ELECTRONIC MODULE ASSEMBLY FOR FILTERED FEEDTHROUGHS - An electronic module assembly (EMA) for an implantable medical device is disclosed. The EMA comprises a non-conductive block having a top side, a bottom side, a front side and a back side. A plurality of conductive strips are coupled to the non-conductive block. Each conductive strip possesses a front side and a back side. The back side of each conductive strip extends from the front side across the top side and over to back side of the non-conductive block. | 09-30-2010 |
20110106205 | CERAMIC COMPONENTS FOR BRAZED FEEDTHROUGHS USED IN IMPLANTABLE MEDICAL DEVICES - A feedthrough assembly, as well as a method of forming a feedthrough assembly, including a metallic ferrule, and a biocompatible, non-conductive, high-temperature, co-fired insulator engaged with the metallic ferrule at an interface between the ferrule and the insulator. The insulator includes a first surface at the interface and a second surface internal to the insulator. At least one conductive member may be disposed at the second surface, wherein at least the first surface of the insulator is devoid of surface cracks greater than 30 μm. The first surface of the insulator may also be devoid of a surface roughness greater than 0.5 μm. | 05-05-2011 |
20130070423 | COMPACT CONNECTOR ASSEMBLY FOR IMPLANTABLE MEDICAL DEVICE - A connector assembly for an implantable medical device includes a plurality of feedthroughs mounted in a conductive array plate, each feedthrough in the plurality of feedthroughs including a feedthrough pin electrically isolated from the conductive array plate by an insulator and an electronic module assembly including a plurality of conductive strips set in a non-conductive block. The plurality of conductive strips is in physical and electrical contact with the feedthrough pins at an angle of less than 135 degrees. The connector assembly further includes at least one circuit, the circuit including a plurality of conductors corresponding to the plurality of feedthroughs. The plurality of conductors of the circuit is in physical and electrical contact with a corresponding one of the conductive strips of the plurality of conductive strips of the electronic module assembly at an angle of less than 135 degrees. | 03-21-2013 |
20130286536 | IMPLANTABLE MEDICAL DEVICE WITH FEEDTHROUGH, FEEDTHROUGH AND METHOD - Feedthrough and method for making a feedthrough. The feedthrough has a ferrule forming a ferrule lumen, an electrically conductive pin extending longitudinally through at least a portion of the ferrule lumen, a filter capacitor surrounding the electrically conductive pin within the ferrule lumen, the filter capacitor having a bonding surface, and a ceramic seal positioned within the ferrule lumen directly abutting the filter capacitor sealing a space between the electrically conductive pin and the ferrule. The ceramic seal adheres to and creates an adhesive bond with the bonding surface of the capacitor and substantially inhibits fluid flow through the ferrule lumen. | 10-31-2013 |
20130289681 | IMPLANTABLE MEDICAL DEVICE AND FEEDTHROUGH AND METHOD OF MAKING SAME - Implantable medical device having a feedthrough, a feedthrough and method for making such feedthrough. The feedthrough has a ferrule, an electrically conductive pin, a preform having a preform liquidus temperature, a capacitor, positioned within the ferrule abutting the preform, having a coating having a coating liquidus temperature and being configured to electrically couple with the preform, and an insulative assembly configured, at least in part, to seal against passage of a liquid through the ferrule, and having an insulative assembly liquidus temperature. The coating liquidus temperature is greater than the preform liquidus temperature and the coating liquidus temperature being greater than the insulative assembly liquidus temperature. | 10-31-2013 |
20150182743 | MEDICAL ELECTRODE INCLUDING AN IRIDIUM OXIDE SURFACE AND METHODS OF FABRICATION - An implantable medical electrode includes a substrate and an iridium oxide surface, which is formed by an iridium oxide film applied over a roughened surface of the substrate. The film is preferably applied via direct current magnetron sputtering in a sputtering atmosphere comprising argon and oxygen. A sputtering target power may be between approximately 80 watts and approximately 300 watts, and a total sputtering pressure may be between approximately 9 millitorr and approximately 20 millitorr. The iridium oxide film may have a thickness greater than or equal to approximately 15,000 angstroms and have a microstructure exhibiting a columnar growth pattern. | 07-02-2015 |
20150283375 | METHOD FOR FABRICATING AN IMPLANTABLE ELECTRODE - A method for fabricating an implantable medical electrode includes roughening the electrode substrate, applying an adhesion layer, and depositing a valve metal oxide coating over the adhesion layer under conditions optimized to minimize electrode impedance and post-pulse polarization. The electrode substrate may be a variety of electrode metals or alloys including titanium, platinum, platinum-iridium, or niobium. The adhesion layer may be formed of titanium or zirconium. The valve metal oxide coating is a ruthenium oxide coating sputtered onto the adhesion layer under controlled target power, sputtering pressure, and sputter gas ratio setting optimized to minimize electrode impedance and post-pulse polarization. | 10-08-2015 |