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Ravi K. Arimilli
AUSTIN, TX US
1. 20090199197 Wake-and-Go Mechanism with Dynamic Allocation in Hardware Private Array 08-06-20092. 20090199189 Parallel Lock Spinning Using Wake-and-Go Mechanism 08-06-2009
3. 20090199184 Wake-and-Go Mechanism With Software Save of Thread State 08-06-2009
4. 20090199183 Wake-and-Go Mechanism with Hardware Private Array 08-06-2009
5. 20090199181 Use of a Helper Thread to Asynchronously Compute Incoming Data 08-06-2009
6. 20090199170 Helper Thread for Pre-Fetching Data - set of helper thread binaries is created to retrieve data used by a set of main thread binaries 08-06-2009
7. 20090199030 Hardware Wake-and-Go Mechanism for a Data Processing System 08-06-2009
8. 20090199029 Wake-and-Go Mechanism with Data Monitoring 08-06-2009
9. 20090199028 Wake-and-Go Mechanism with Data Exclusivity 08-06-2009
10. 20090198975 TERMINATION OF IN-FLIGHT ASYNCHRONOUS MEMORY MOVE 08-06-2009
11. 20090198971 Heterogeneous Processing Elements - heterogeneous processing element model is provided where I/O devices look and act like processors 08-06-2009
12. 20090198963 COMPLETION OF ASYNCHRONOUS MEMORY MOVE IN THE PRESENCE OF A BARRIER OPERATION 08-06-2009
13. 20090198958 System and Method for Performing Dynamic Request Routing Based on Broadcast Source Request Information 08-06-2009
14. 20090198957 System and Method for Performing Dynamic Request Routing Based on Broadcast Queue Depths 08-06-2009
15. 20090198956 System and Method for Data Processing Using a Low-Cost Two-Tier Full-Graph Interconnect Architecture 08-06-2009
16. 20090198955 ASYNCHRONOUS MEMORY MOVE ACROSS PHYSICAL NODES (DUAL-SIDED COMMUNICATION FOR MEMORY MOVE) 08-06-2009
17. 20090198953 Full Virtualization of Resources Across an IP Interconnect Using Page Frame Table 08-06-2009
18. 20090198951 Full Virtualization of Resources Across an IP Interconnect 08-06-2009
19. 20090198950 Techniques for Indirect Data Prefetching 08-06-2009
20. 20090198948 Techniques for Data Prefetching Using Indirect Addressing 08-06-2009
21. 20090198939 LAUNCHING MULTIPLE CONCURRENT MEMORY MOVES VIA A FULLY ASYNCHRONOOUS MEMORY MOVER 08-06-2009
22. 20090198937 MECHANISMS FOR COMMUNICATING WITH AN ASYNCHRONOUS MEMORY MOVER TO PERFORM AMM OPERATIONS 08-06-2009
23. 20090198936 REPORTING OF PARTIALLY PERFORMED MEMORY MOVE 08-06-2009
24. 20090198934 FULLY ASYNCHRONOUS MEMORY MOVER - data processing system has a processor and a memory coupled to the processor and an asynchronous memory mover coupled 08-06-2009
25. 20090198933 Method and Apparatus for Handling Multiple Memory Requests Within a Multiprocessor System 08-06-2009
26. 20090198920 Processing Units Within a Multiprocessor System Adapted to Support Memory Locks 08-06-2009
27. 20090198918 Host Fabric Interface (HFI) to Perform Global Shared Memory (GSM) Operations 08-06-2009
28. 20090198917 SPECIALIZED MEMORY MOVE BARRIER OPERATIONS 08-06-2009
29. 20090198916 Method and Apparatus for Supporting Low-Overhead Memory Locks Within a Multiprocessor System 08-06-2009
30. 20090198915 DATA PROCESSING SYSTEM, PROCESSOR AND METHOD THAT DYNAMICALLY SELECT A MEMORY ACCESS SIZE 08-06-2009
31. 20090198914 DATA PROCESSING SYSTEM, PROCESSOR AND METHOD IN WHICH AN INTERCONNECT OPERATION INDICATES ACCEPTABILITY OF PARTIAL DATA DELIVERY 08-06-2009
32. 20090198912 DATA PROCESSING SYSTEM, PROCESSOR AND METHOD FOR IMPLEMENTING CACHE MANAGEMENT FOR PARTIAL CACHE LINE OPERATIONS 08-06-2009
33. 20090198905 Techniques for Prediction-Based Indirect Data Prefetching 08-06-2009
34. 20090198904 Techniques for Data Prefetching Using Indirect Addressing with Offset 08-06-2009
35. 20090198897 CACHE MANAGEMENT DURING ASYNCHRONOUS MEMORY MOVE OPERATIONS 08-06-2009
36. 20090198891 Issuing Global Shared Memory Operations Via Direct Cache Injection to a Host Fabric Interface 08-06-2009
37. 20090198849 Memory Lock Mechanism for a Multiprocessor System 08-06-2009
38. 20090198837 System and Method for Providing Remotely Coupled I/O Adapters 08-06-2009
39. 20090198695 Method and Apparatus for Supporting Distributed Computing Within a Multiprocessor System 08-06-2009
40. 20090193290 System and Method to Use Cache that is Embedded in a Memory Hub to Replace Failed Memory Cells in a Memory Subsystem 07-30-2009
41. 20090157996 Method, System and Program Product for Allocating a Global Shared Memory 06-18-2009
42. 20090138664 CACHE INJECTION USING SEMI-SYNCHRONOUS MEMORY COPY OPERATION 05-28-2009
43. 20090070617 Method for Providing a Cluster-Wide System Clock in a Multi-Tiered Full-Graph Interconnect Architecture 03-12-2009
44. 20090064168 System and Method for Hardware Based Dynamic Load Balancing of Message Passing Interface Tasks By Modifying Tasks 03-05-2009
45. 20090064167 System and Method for Performing Setup Operations for Receiving Different Amounts of Data While Processors are Performing Message Passing Interface Tasks 03-05-2009
46. 20090064166 System and Method for Hardware Based Dynamic Load Balancing of Message Passing Interface Tasks 03-05-2009
47. 20090064165 Method for Hardware Based Dynamic Load Balancing of Message Passing Interface Tasks 03-05-2009
48. 20090064140 System and Method for Providing a Fully Non-Blocking Switch in a Supernode of a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
49. 20090064139 Method for Data Processing Using a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
50. 20090063891 System and Method for Providing Reliability of Communication Between Supernodes of a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
51. 20090063886 System for Providing a Cluster-Wide System Clock in a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
52. 20090063885 System and Computer Program Product for Modifying an Operation of One or More Processors Executing Message Passing Interface Tasks 03-05-2009
53. 20090063880 System and Method for Providing a High-Speed Message Passing Interface for Barrier Operations in a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
54. 20090063817 System and Method for Packet Coalescing in Virtual Channels of a Data Processing System in a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
55. 20090063816 System and Method for Performing Collective Operations Using Software Setup and Partial Software Execution at Leaf Nodes in a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
56. 20090063815 System and Method for Providing Full Hardware Support of Collective Operations in a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
57. 20090063814 System and Method for Routing Information Through a Data Processing System Implementing a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
58. 20090063811 System for Data Processing Using a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
59. 20090063728 System and Method for Direct/Indirect Transmission of Information Using a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
60. 20090063445 System and Method for Handling Indirect Routing of Information Between Supernodes of a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
61. 20090063444 System and Method for Providing Multiple Redundant Direct Routes Between Supernodes of a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
62. 20090063443 System and Method for Dynamically Supporting Indirect Routing Within a Multi-Tiered Full-Graph Interconnect Architecture 03-05-2009
63. 20080307182 EFFICIENT AND FLEXIBLE MEMORY COPY OPERATION 12-11-2008
64. 20080225863 DATA PROCESSING SYSTEM, METHOD AND INTERCONNECT FABRIC SUPPORTING MULTIPLE PLANES OF PROCESSING NODES 09-18-2008