Patent application number | Description | Published |
20090183845 | PROCESS FOR PRODUCING BLEACHED PULP - Provided are a method for producing bleached pulp, comprising processing unbleached pulp obtained by cooking a lignocellulose substance, for alkali-oxygen bleaching followed by treatment with peroxomonosulfuric acid and thereafter by multistage chlorine-free bleaching treatment starting from chlorine dioxide treatment; a method for producing bleached pulp, comprising processing the unbleached pulp for alkali-oxygen bleaching followed by chlorine-free bleaching treatment or totally chlorine-free bleaching treatment to bleach it to a degree of brightness of from 70 to 89%, and further followed by treatment with peroxomonosulfuric acid; and paper produced by the use of the bleached pulp produced according to these production methods, at a papermaking pH of at most 6. Provided are the efficient production methods for bleached pulp in which the colour reversion resistance is enhanced in chlorine-free bleaching and the bleaching cost increase is prevented, and the paper produced by the use of the bleached pulp according to an acid papermaking process. | 07-23-2009 |
20130062026 | PROCESS FOR PRODUCING BLEACHED PULP - A method for producing bleached pulp, including processing unbleached pulp obtained by cooking a lignocellulose substance, followed by treatment with peroxomonosulfuric acid and thereafter by multistage chlorine-free bleaching treatment starting from chlorine dioxide treatment; a method for producing bleached pulp, including processing unbleached pulp for alkali-oxygen bleaching followed by chlorine-free bleaching treatment or totally chlorine-free bleaching treatment to bleach it to a degree of brightness of from 70 to 89%, and further followed by treatment with peroxomonosulfuric acid; and paper produced by the use of the bleached pulp produced according to these production methods, at a papermaking pH of at most 6. | 03-14-2013 |
Patent application number | Description | Published |
20110127525 | SEMICONDUCTOR DEVICE - An intrinsic or substantially intrinsic semiconductor, which has been subjected to a step of dehydration or dehydrogenation and a step of adding oxygen so that the carrier concentration is less than 1×10 | 06-02-2011 |
20110127526 | NON-LINEAR ELEMENT, DISPLAY DEVICE INCLUDING NON-LINEAR ELEMENT, AND ELECTRONIC DEVICE INCLUDING DISPLAY DEVICE - A non-linear element (such as a diode) which includes an oxide semiconductor and has a favorable rectification property is provided. In a transistor including an oxide semiconductor in which the hydrogen concentration is 5×10 | 06-02-2011 |
20110133178 | SEMICONDUCTOR DEVICE - One object is to provide a p-channel transistor including an oxide semiconductor. Another object is to provide a complementary metal oxide semiconductor (CMOS) structure of an n-channel transistor including an oxide semiconductor and a p-channel transistor including an oxide semiconductor. A p-channel transistor including an oxide semiconductor includes a gate electrode layer, a gate insulating layer, an oxide semiconductor layer, and a source and drain electrode layers in contact with the oxide semiconductor layer. When the electron affinity and the band gap of an oxide semiconductor used for the oxide semiconductor layer in the semiconductor device, respectively, are χ (eV) and E | 06-09-2011 |
20110156022 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device which includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer is provided. The thickness of the oxide semiconductor layer is greater than or equal to 1 nm and less than or equal to 10 nm. The gate insulating layer satisfies a relation where ε | 06-30-2011 |
20110194327 | SEMICONDUCTOR DEVICE AND METHOD OF DRIVING SEMICONDUCTOR DEVICE - The number of wirings per unit memory cell is reduced by sharing a bit line by a writing transistor and a reading transistor. Data is written by turning on the writing transistor so that a potential of the bit line is supplied to a node where one of a source electrode and a drain electrode of the writing transistor and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined amount of charge is held in the node. Data is read by using a reading signal line connected to one of a source electrode and a drain electrode of the reading transistor so that a predetermined reading potential is supplied to the reading signal line, and then detecting a potential of the bit line. | 08-11-2011 |
20110194331 | SEMICONDUCTOR DEVICE AND METHOD OF DRIVING SEMICONDUCTOR DEVICE - The number of wirings per unit memory cell is reduced by sharing a bit line by a writing transistor and a reading transistor. Data is written by turning on the writing transistor so that a potential of the bit line is supplied to a node where one of a source and drain electrodes of the writing transistor and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined amount of charge is held in the node. Data is read by using a signal line connected to a capacitor as a reading signal line or a signal line connected to one of a source and drain electrodes of the reading transistor as a reading signal line so that a reading potential is supplied to the reading signal line, and then detecting a potential of the bit line. | 08-11-2011 |
20130140560 | SEMICONDUCTOR DEVICE - An intrinsic or substantially intrinsic semiconductor, which has been subjected to a step of dehydration or dehydrogenation and a step of adding oxygen so that the carrier concentration is less than 1×10 | 06-06-2013 |
20140127874 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device which includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer is provided. The thickness of the oxide semiconductor layer is greater than or equal to 1 nm and less than or equal to 10 nm. The gate insulating layer satisfies a relation where ∈ | 05-08-2014 |
20140191232 | SEMICONDUCTOR DEVICE - An intrinsic or substantially intrinsic semiconductor, which has been subjected to a step of dehydration or dehydrogenation and a step of adding oxygen so that the carrier concentration is less than 1×10 | 07-10-2014 |
Patent application number | Description | Published |
20140049182 | DISPLAY DEVICE, ELECTRONIC DEVICE, DRIVING CIRCUIT, AND DRIVING METHOD THEREOF - A display device includes a pixel circuit that supplies current to a light emitting diode (LED) and a driver circuit. The pixel circuit includes a constant current circuit including a first transistor and a capacitor connected to a gate terminal of the first transistor, and a switch circuit including a second transistor. The driver circuit controls the pixel circuit such that the LED emits light by connecting the anode of the LED diode and the first power line under a non-light emission state of the LED, connecting the gate terminal of the first transistor and the anode after the anode is disconnected from the first power line, setting the gate terminal of the first transistor to a voltage corresponding to an amount of a supply current from the first power line, and after setting the gate terminal, switching a state of the LED into a light emission state. | 02-20-2014 |
20140152709 | DISPLAY DEVICE AND DRIVING METHOD THEREOF - A display device includes a light emitting diode that emits a light in response to a current supplied thereto, a constant current circuit that includes a first transistor to control an amount of the current supplied to the light emitting diode, and a pixel circuit that includes a switching circuit including a second transistor to switch the supply of the current to the light emitting diode and a capacitor including a first terminal connected to a gate terminal of the second transistor and a second terminal connected to a signal line that changes a voltage of the other terminal. The first transistor and the second transistor are connected between a first power supply line and an anode of the light emitting diode including a cathode connected to a second power supply line in series. | 06-05-2014 |
20140160179 | PIXEL CIRCUIT AND DISPLAY DEVICE - A pixel circuit is provided which includes a light-emitting element; a driving transistor configured to control an amount of current supplied from a first power line to the light-emitting element according to a pixel voltage; a capacitor having one end connected to a second power line and the other end connected to a gate of the driving transistor and configured to hold the pixel voltage; a first switch transistor configured to selectively switch the pixel voltage provided through a data signal line into the capacitor; and a second switch transistor configured to selectively connect the first power line and the second power line. The first and second power lines are separated during a period where the capacitor is charged by the pixel voltage, and are shorted during a period where the driving transistor operates according to the pixel voltage. | 06-12-2014 |
20150035871 | DISPLAY DEVICE AND DRIVING METHOD THEREOF - A display device includes a plurality of pixels, a gate control line electrically connected to the pixels, an auxiliary power line isolated from the gate control line, and a number of auxiliary switches between the gate control line and the auxiliary power line. The at least one auxiliary switch is controlled by an auxiliary control line isolated from the auxiliary power line and the gate control line. The at least one auxiliary switch electrically connects the gate control line and the auxiliary power line. | 02-05-2015 |
20150054722 | ELECTRO-OPTICAL DEVICE - An optoelectronic device includes a first transistor, a second transistor, and a control circuit. The first transistor is electrically connected between a power supply and a light-emitting element, has a gate to receive a gray scale voltage, and supplies the light-emitting element with a driving current corresponding to the gray scale voltage. The second transistor has a gate electrically connected to an electrode of the light-emitting element and a source or drain electrically connected to a circuit including a voltmeter. The control circuit reads a measurement value of the voltmeter when the gate of the first transistor receives the gray scale voltage, and corrects a next gray scale voltage applied to the gate of the first transistor based on the measurement value. | 02-26-2015 |
20150061537 | OPTOELECTRONIC DEVICE - An optoelectronic device includes a driving transistor, a correction transistor, and a control circuit. The driving transistor adjusts a first current from a power supply based on a voltage stored in a first capacitor. The driving transistor supplies the adjusted first current to the light-emitting element. The correction transistor is electrically connected on a path of a second current flowing from the power supply to the first capacitor, and adjusts the second current based on a voltage stored in a second capacitor. The control circuit controls the second capacitor to store a gray scale voltage while the first current flows, and controls flow of the second current to update the voltage stored in the first capacitor while the first current is blocked. | 03-05-2015 |
20150062193 | ELECTRO-OPTICAL DEVICE - An electro-optical device includes a driving transistor, a first capacitor, a second capacitor, and a switching circuit. The driving transistor is connected between a power supply and an electrode of a light-emitting element. The first capacitor is connected between a gate and source of the driving transistor. The second capacitor stores a gray scale voltage. The switching circuit selectively connects the first capacitor and the second capacitor to the gate of the driving transistor. A control circuit applies the gray scale voltage to the second capacitor while the first capacitor is connected to the gate of the driving transistor by the switching circuit, and writes a source voltage of the driving transistor at the first capacitor while the second capacitor is connected to the gate of the driving transistor by the switching circuit. | 03-05-2015 |
20150062195 | ELECTROLUMINESCENCE DISPLAY DEVICE AND DRIVING METHOD THEREOF - An electroluminescence display device includes a controller which generates signals for controlling at least one pixel circuit during a first period and a second period. The controller controls current to a light-emitting element of the at least one pixel circuit based on a data voltage in the first period. The controller controls a supplying period of current to the light-emitting element based on a duty control voltage in the second period. The supplying period when the pixel circuit is driven at a first gray scale value is longer than that when the pixel circuit is driven at a second gray scale. The first gray scale value is greater than the second gray scale value. | 03-05-2015 |
Patent application number | Description | Published |
20080211561 | Clock Signal Generation Circuit and Semiconductor Device - The semiconductor device is provided with a clock signal generation circuit that includes a reference clock signal generation circuit which generates a first reference clock signal, a first counter circuit which counts the number of rising edges of the first reference clock signal by using the first reference clock signal and a synchronizing signal, a second counter circuit which counts the number of rising edges of the first reference clock signal by using an enumerated value of the first counter circuit, a first divider circuit which divides a frequency of the first reference clock signal by using the enumerated value of the first counter circuit and generates a second reference clock signal, and a second divider circuit which divides a frequency of the second reference clock signal and generates a clock signal. | 09-04-2008 |
20080297320 | Semiconductor device and IC label, IC tag, and IC card provided with the semiconductor device - A charge accumulation circuit having a structure in which a capacitor is divided into a plurality of pieces and the divided capacitors are connected in parallel through switches is provided. The charge accumulation circuit controls the switch provided between the capacitors and thus can dynamically vary electrostatic capacitance of the charge accumulation circuit which applies a voltage to a constant voltage circuit. | 12-04-2008 |
20110261864 | SEMICONDUCTOR DEVICE - In a case where an ASK method is used for a communication method between a semiconductor device and a reader/writer, the amplitude of a radio signal is changed by data transmitted from the semiconductor device to the reader/writer when data is not transmitted from the reader/writer to the semiconductor device. Therefore, in some cases, the semiconductor device mistakes data transmitted from the semiconductor device itself for data transmitted from the reader/writer to the semiconductor device. The semiconductor device includes an antenna circuit, a transmission circuit, a reception circuit, and an arithmetic processing circuit. The antenna circuit transmits and receives a radio signal. The transmission circuit outputs to the reception circuit a signal showing whether or not the antenna circuit is transmitting the radio signal. | 10-27-2011 |
20120081186 | SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE HAVING THE SAME - A semiconductor device includes an antenna circuit for receiving a wireless signal, a power supply circuit generating power by the wireless signal received by the antenna circuit, and a clock generation circuit to which power is supplied. The clock generation circuit includes a ring oscillator which self-oscillates and a frequency divider which adjusts frequency of an output signal of the ring oscillator in an appropriate range. A digital circuit portion is driven by a clock having high frequency accuracy, so that a malfunction such as an incorrect operation or no response is prevented. | 04-05-2012 |
20120132719 | SEMICONDUCTOR DEVICE - A semiconductor device is provided with a power supply circuit having a function to generate a power supply voltage from a wireless signal and an A/D converter circuit having a function to detect the strength of the wireless signal by an A/D conversion of a voltage generated from the wireless signal. This enables to provide a semiconductor device which does not require replacement of batteries, has few limitations on its physical shape and mass, and has a function to detect a physical position. By formation of the semiconductor device with use of a thin film transistor formed over a plastic substrate, a lightweight semiconductor device, which has flexibility in physical shape and a function to detect a physical location, can be provided at low cost. | 05-31-2012 |
20120173915 | Clock Generation Circuit and Semiconductor Device Including the Same - Objects of the invention are to provide a clock generation circuit and to provide a semiconductor device including the clock generation circuit. The clock generation circuit includes an edge detection circuit, a reference clock generation circuit, a reference clock counter circuit, and a frequency-divider circuit. The reference clock counter circuit is a circuit which outputs a counter value, which is obtained by counting the number of waves of a reference clock signal outputted from the reference clock generation circuit, in a period of time from when the edge detection circuit detects an edge of a signal which is externally inputted to the edge detection circuit to when the edge detection circuit detects the next edge, to the frequency-divider circuit. The frequency-divider circuit is a circuit which frequency-divides the reference clock signal based on the counter value. | 07-05-2012 |
Patent application number | Description | Published |
20090005687 | ULTRASONIC IMAGING APPARATUS - An ultrasonic imaging apparatus includes an ultrasonic probe which captures 3D tomographic image data, a puncture needle which is attached to a puncture guide and introduced into a 3D region of a subject on which the 3D tomographic image data is captured, and an image processor which forms image data on an introduction sectional plane including an expected introduction path along which the introduction is expected. The image processor includes a monitor area setting device which sets, in a 3D memory area, a monitor memory area which corresponds to a planar monitor area in the 3D region which the expected introduction path penetrates, a penetration point detecting device which detects a point of penetration of the monitor area by the puncture needle according to tomographic image data, and a sectional plane position correcting device which corrects the position of the introduction sectional plane to include the penetration point. | 01-01-2009 |
20090030314 | ULTRASONIC IMAGING APPARATUS AND IMAGE PROCESSING APPARATUS - An ultrasonic imaging apparatus includes a 3D tomographic image data capturing device which captures 3D tomographic image data from a 3D region inside a subject, a region-of-interest setting device which sets a 3D region of interest corresponding to the 3D region in an image memory, a surface image extracting device which extracts data on a surface image, in the 3D region of interest, of a massive tissue included in the 3D region, a stereoscopic display generating device which generates stereoscopic display data, and a display device which displays the stereoscopic display data. The region-of-interest setting device displays a 2D tomographic image of a 2D region including the massive tissue on the display device, allows setting of a marker indicating a periphery of the massive tissue in the 2D tomographic image, and generates the 3D region of interest according to data on the marker's position. | 01-29-2009 |