Wen-Hsiung
Wen-Hsiung Chang, Chiayi TW
Patent application number | Description | Published |
---|---|---|
20130065348 | PACKAGE PROCESS OF BACKSIDE ILLUMINATION IMAGE SENSOR - In a package process of backside illumination image sensor, a wafer including a plurality of pads is provided. A first carrier is processed to form a plurality of blind vias therein. The first carrier is adhered to the wafer so that the blind vias face to the pads correspondingly. A spacing layer is formed and a plurality of sensing components are disposed. A second carrier is adhered on the spacing layer. Subsequently, a carrier thinning process is performed so that the blind vias become the through holes. An insulating layer is formed on the first carrier. An electrically conductive layer is formed on the insulating layer and filled in the though holes to electrically connect to the pads. The package process can achieve the exact alignment of the through holes and the pads, thereby increasing the package efficiency and improving the package quality. | 03-14-2013 |
Wen-Hsiung Chang, Hsinchu TW
Patent application number | Description | Published |
---|---|---|
20110275194 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing semiconductor device includes the following steps. First, a carrier substrate and a plurality of pieced segments of wafer are provided. Each of the pieced segments of wafer has an active surface and a back surface on opposite sides thereof. Further, there is at least a bonding pad disposed on the active surface. Next, an adhering layer is formed between the carrier substrate and the active surfaces of the pieced segments of wafer, so as to make the pieced segments of wafer adhere to the carrier substrate. Next, a through silicon via is formed in each of the pieced segments of wafer to electrically connect to the bonding pad correspondingly. Then, the pieced segments of wafer are separated from the carrier substrate. | 11-10-2011 |
20130113100 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A semiconductor structure and a manufacturing method thereof are provided. The method includes the following steps. Firstly, a semiconductor substrate having an active surface and a back surface is provided. The active surface is opposite to the back surface, and the semiconductor substrate includes at least one grounding pad disposed on the active surface. Secondly, at least one through silicon via is formed through the semiconductor substrate from the back surface to the active surface thus exposing the grounding pad. Then, a conductive layer is formed on the back surface of the semiconductor substrate and filled into the through silicon via to electrically connect to the grounding pad and the semiconductor substrate. | 05-09-2013 |
20130256842 | SEMICONDUCTOR DEVICE PACKAGING STRUCTURE AND PACKAGING METHOD - Exemplary semiconductor device packaging structure and packaging method are provided. The packaging method uses an adhesive layer to bond multiple wafer pieces onto a first surface of a carrier substrate, each adjacent two of the wafer pieces having a gap formed therebetween for exposing a part of the adhesive layer. A packaging layer is filled in each of the gaps. At least one through silicon via is formed each of the wafer pieces to expose a bonding pad formed on an active surface of the wafer pieces. Redistribution circuit layers are formed on back surfaces of the respective wafer pieces and filled into the through silicon vias for electrical connection with the bonding pads. A sawing process is performed to saw starting from each of the packaging layers to a second surface of the carrier substrate, and thereby multiple semiconductor device packaging structures are obtained. | 10-03-2013 |
Wen-Hsiung Chang, New Taipei TW
Patent application number | Description | Published |
---|---|---|
20150021064 | METALLIC HOUSING OF ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF - A metallic housing of an electronic device, includes a metallic outer frame and an inner structural member. The metallic outer frame comprises a plurality of latching portions protruding, and a plurality of latching grooves. The inner structural member is made from metal-alloy and embedded in the outer frame by die-casting. The inner structural member comprises a peripheral sidewall, a plurality of engaging portions, and a plurality of matching portions. The plurality of engaging portions and the plurality of matching portions protrude from the peripheral sidewall outwardly. Each latching portion comprises at least two parallel latching ribs, and forms a receiving groove between two adjacent latching ribs. The plurality of engaging portions is respectively embedded in the plurality of receiving grooves, and the plurality of matching portions is respectively embedded in the plurality of latching grooves. The present disclosure further provides a manufacturing method for the metallic housing. | 01-22-2015 |
20150021065 | METALLIC HOUSING OF ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF - A metallic housing of an electronic device includes a metallic outer case and an inner structural member embedded in the inner side of the outer case by die-casting. The outer case includes a bottom plate and a peripheral sidewall. The bottom plate is equipped with a number of latching hooks. The latching hooks are spaced from each other. The peripheral sidewall defines a receiving groove at an inner side along the peripheral sidewall. The inner structural member is made of metal alloy, and includes a base plate and a frame sidewall surrounding a periphery of the base plate, a protruding flange protruding from the frame sidewall, and a plurality of combining grooves on the base plate. The protruding flange is received in the receiving grooves, and the number of latching hooks is respectively received in the number of combining grooves. | 01-22-2015 |
Wen-Hsiung Chang, Tu-Cheng TW
Patent application number | Description | Published |
---|---|---|
20130032032 | FILTER DEVICE - A filter device for filtering dust from air includes a housing, a dust collecting module, a spraying module, and an exhaust. The housing defines an air inlet near a bottom of the housing and an air outlet near a top of the housing. The dust collecting module is installed in the housing between the air inlet and the air outlet. The spraying module is placed in the housing between the dust collecting module and the air outlet. The exhaust is connected to the housing for generating air pressure difference between near the air outlet and near the air inlet, thereby drawing and introducing air containing dust from the bottom of the housing toward the top of the housing via the air inlet. | 02-07-2013 |
Wen-Hsiung Chang, Hsinchu City TW
Patent application number | Description | Published |
---|---|---|
20100171205 | Stackable Semiconductor Device Packages - In one embodiment, a semiconductor device package includes: (1) a substrate unit; (2) connecting elements disposed adjacent to a periphery of the substrate unit and extending upwardly from an upper surface of the substrate unit; (3) a semiconductor device disposed adjacent to the upper surface of the substrate unit and electrically connected to the substrate unit; and (4) a package body disposed adjacent to the upper surface of the substrate unit and covering the semiconductor device. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit. The package body defines openings that at least partially expose respective ones of the connecting elements. At least one of the connecting elements has a width W | 07-08-2010 |
20100171207 | STACKABLE SEMICONDUCTOR DEVICE PACKAGES - In one embodiment, a manufacturing method includes: (1) applying a first electrically conductive material to an upper surface of a substrate to form first conductive bumps; (2) electrically connecting a semiconductor device to the upper surface of the substrate; (3) applying a molding material to form a molded structure covering the first conductive bumps and the semiconductor device, upper ends of the first conductive bumps being recessed below an upper surface of the molded structure; (4) forming openings adjacent to the upper surface of the molded structure, the openings exposing the upper ends of the first conductive bumps; (5) applying, through the openings, a second electrically conductive material to form second conductive bumps; and (6) forming cutting slits extending through the molded structure and the substrate. | 07-08-2010 |
20110272795 | SEMICONDUCTOR DEVICE PACKAGING STRUCTURE AND PACKAGING METHOD - Exemplary semiconductor device packaging structure and packaging method are provided. The packaging method uses an adhesive layer to bond multiple wafer pieces onto a first surface of a carrier substrate, each adjacent two of the wafer pieces having a gap formed therebetween for exposing a part of the adhesive layer. A packaging layer is filled in each of the gaps. At least one through silicon via is formed each of the wafer pieces to expose a bonding pad formed on an active surface of the wafer pieces. Redistribution circuit layers are formed on back surfaces of the respective wafer pieces and filled into the through silicon vias for electrical connection with the bonding pads. A sawing process is performed to saw starting from each of the packaging layers to a second surface of the carrier substrate, and thereby multiple semiconductor device packaging structures are obtained. | 11-10-2011 |
20110272808 | SEMICONDUCTOR PROCESS AND STRUCTURE - A semiconductor process includes the following steps. Firstly, a conductive substrate is provided. Then, at least one insulating pattern is formed on the conductive substrate. Thereafter at least one metal pattern is formed on the insulating pattern. After that, a passivation layer is formed on the conductive substrate to cover the metal pattern by an electroplating process. | 11-10-2011 |
20110272809 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A semiconductor structure and a manufacturing method thereof are provided. The method includes the following steps. Firstly, a semiconductor substrate having an active surface and a back surface is provided. The active surface is opposite to the back surface, and the semiconductor substrate includes at least one grounding pad disposed on the active surface. Secondly, at least one through silicon via is formed through the semiconductor substrate from the back surface to the active surface thus exposing the grounding pad. Then, a conductive layer is formed on the back surface of the semiconductor substrate and filled into the through silicon via to electrically connect to the grounding pad and the semiconductor substrate. | 11-10-2011 |
20110285014 | PACKAGING STRUCTURE AND PACKAGE PROCESS - A package structure and a package process are proposed in using pillar bumps to connect an upper second chip and through silicon vias of a lower first chip, wherein a gap between the first chip and the second chip can be controlled by adjusting a height of the pillar bumps. In other words, the pillar bumps compensate the height difference between the first chip and a molding compound surrounding the first chip so as to ensure the bondibility between the pillar bumps and the corresponding through silicon vias and improve the process yield. Furthermore, the pillar bumps maintain the gap between the second chip and the molding compound for allowing an underfill being properly filled into the space between the first chip and the second chip. | 11-24-2011 |
20110294237 | PACKAGING METHOD OF SEMICONDUCTOR DEVICE - In a packaging method of semiconductor device, firstly, a wafer including a number of dies is provided. The wafer has an active surface and a back surface. The active surface adheres to a carrier. Subsequently, a number of openings are formed in each of the dies. Then, an insulating layer is formed on the back surface and on the side walls of the openings. A metal layer is formed to cover the insulating layer and the bottoms of the openings. A pattern protective layer is formed to cover the metal layer and to expose the metal layer outside the openings. Afterwards, the carrier is removed and the wafer is sawed. Later, a transparent substrate having a number of package units is provided. A spacer is formed at peripheral of each of the package units. A number of good dies are choose from the dies and disposed on the spacer. | 12-01-2011 |
20120009716 | PACKAGE PROCESS OF BACKSIDE ILLUMINATION IMAGE SENSOR - In a package process of backside illumination image sensor, a wafer including a plurality of pads is provided. A first carrier is processed to form a plurality of blind vias therein. The first carrier is adhered to the wafer so that the blind vias face to the pads correspondingly. A spacing layer is formed and a plurality of sensing components are disposed. A second carrier is adhered on the spacing layer. Subsequently, a carrier thinning process is performed so that the blind vias become the through holes. An insulating layer is formed on the first carrier. An electrically conductive layer is formed on the insulating layer and filled in the though holes to electrically connect to the pads. The package process can achieve the exact alignment of the through holes and the pads, thereby increasing the package efficiency and improving the package quality. | 01-12-2012 |
20120205800 | PACKAGING STRUCTURE - A package structure and a package process are proposed in using pillar bumps to connect an upper second chip and through silicon vias of a lower first chip, wherein a gap between the first chip and the second chip can be controlled by adjusting a height of the pillar bumps. In other words, the pillar bumps compensate the height difference between the first chip and a molding compound surrounding the first chip so as to ensure the bondibility between the pillar bumps and the corresponding through silicon vias and improve the process yield. Furthermore, the pillar bumps maintain the gap between the second chip and the molding compound for allowing an underfill being properly filled into the space between the first chip and the second chip. | 08-16-2012 |
Wen-Hsiung Chen, New Taipei TW
Patent application number | Description | Published |
---|---|---|
20140020934 | CIRCUIT BOARD ASSEMBLY WITH FLEXIBLE CIRCUIT BOARD AND REINFORCING PLATE - A circuit board assembly includes a flexible circuit board and a reinforcing plate. The flexible circuit board includes a surface. A conductive layer is positioned on the surface. The conductive layer includes a circuit portion entirely covered by a dielectric layer and a grounding portion exposed outside the dielectric layer. The reinforcing plate is mounted on the dielectric layer. The reinforcing plate includes a connection surface connected to the dielectric layer and a supporting surface facing away from the connection surface. Projections extend from the connection surface. The location of all of the projections correspond to the location of the grounding portion, and all of the projections are in electrical contact with the grounding portion by means of a conductive adhesive. | 01-23-2014 |
20140027158 | CIRCUIT BOARD ASSEMBLY WITH FLEXIBLE PRINTED CIRCUIT BOARD AND REINFORCING PLATE - A circuit board assembly includes a flexible circuit board, a dielectric layer and a reinforcing plate. The flexible circuit board includes a surface. A copper plating layer is positioned on the surface. The copper plating layer includes a circuit portion and a grounding portion. The circuit portion is entirely covered by the dielectric layer. The grounding portion is exposed outside the dielectric layer. The dielectric layer includes a bonding portion. The reinforcing plate includes a connection surface. The connection surface defines a cavity spatially corresponding to the bonding portion. The connection surface also includes an extending portion which is bulgy with respect to a bottom surface of the cavity. The extending portion spatially corresponds to the grounding portion. The bonding portion is received in the cavity with the extending portion in contact with and electrically connecting to the grounding portion by means of a conductive adhesive. | 01-30-2014 |
20140036116 | FLEXIBLE PRINTED CIRCUIT BOARD ASSEMBLY WITH STIFFENER AND CAMERA MODULE - A flexible printed circuit board (FPCB) assembly includes a FPCB, a dielectric layer, a stiffener, and a conductive adhesive layer. The FPCB includes a surface and a conductive layer positioned on the surface of the FPCB. The conductive layer includes a circuit portion and a grounding portion connected to the circuit portion. The circuit portion is entirely covered by the dielectric layer and the grounding portion is exposed outside the dielectric layer. The conductive adhesive is positioned on the stiffener and includes a first adhering portion and a second adhering portion. A thickness of the second adhering portion is greater than the first adhering portion. A thickness difference between the second adhering portion and the first adhering portion is substantially equal to a thickness the dielectric layer. The first adhering portion is adhered to the dielectric layer and the second adhering portion is adhered to the grounding portion. | 02-06-2014 |
20140049684 | CIRCUIT BOARD ASSEMBLY AND CAMERA MODULE USING SAME - A circuit board assembly includes a flexible circuit board, a conductive adhesive, and a number of reinforcing plates. The flexible circuit board includes a first surface and a second surface. A number of board pads are mounted on the first surface. The conductive adhesive is coated on the first surface and entirely covers all of the board pads. | 02-20-2014 |
20140113097 | SMT TAPE - A SMT tape includes a carrier tape, a number of separation pads, a number of workpieces, and a package tape. The carrier tape includes a package surface and defines a number of receiving grooves in the package surface and arranged along a length direction of the carrier tape. The separation pads are received in the receiving grooves and fixed to bottom surfaces of the receiving grooves respectively. Each separation pad includes a separation surface opposite to a bottom surface of the corresponding receiving groove and a number of protrusions protruding up from the separation surface. The workpieces are respectively received in the receiving grooves. Each workpiece includes a main body and an adhesive layer positioned between the corresponding separation pad and the main body. The package tape is adhered to the package surface and seals the receiving grooves. | 04-24-2014 |
20150015779 | CAMERA MODULE - A camera module includes an image sensor, a circuit board, and a stiffener. The stiffener is located one side of the circuit board and includes a bottom plate grounded. The image sensor is located on another side of the circuit board. The stiffener includes a sidewall extending from the bottom plate. The sidewall and the bottom plate cooperatively hold the circuit board. An insulative coating is coated on the sidewall to avoid short circuiting. | 01-15-2015 |
Wen-Hsiung Chen, Tu-Cheng TW
Patent application number | Description | Published |
---|---|---|
20140048997 | DEVICE FOR ASSEMBLING CAMERA MODULE WITH HIGH QUALITY - A device for assembling a camera module includes a base and a buffer layer. The camera module includes a flexible printed circuit board (FPCB), a lens module positioned on the FPCB, and a stiffener adhering to the FPCB, opposite to the lens module. The lens module includes a first stepped surface facing away from the FPCB. The base includes a supporting surface for supporting the FPCB and defines a holding groove in the supporting surface for holding the lens module. The holding groove forms a second stepped surface for supporting the first stepped surface. The buffer layer is positioned on the second stepped surface and is elastically compressed when the camera module is subjected to a hot pressing process, which secures the stiffener adhering to the FPCB, to provide relief against, and extend the duration of, various pressures applied to the camera module. | 02-20-2014 |
Wen-Hsiung Chen, Taipei Hsien TW
Patent application number | Description | Published |
---|---|---|
20100212877 | AIRFLOW GUIDING AND HEAT DISSIPATING ASSEMBLY FOR ELECTRONIC DEVICE - An airflow guiding and heat dissipating assembly is mounted in an electronic device and has a base and at least one baffle being mounted on the base. Multiple electronic components are mounted on the base and are arranged in a line. Airflow flows along one electronic component upstream, past the baffle and then over the other electronic component downstream to take away heat from the electronic component. The baffle prevents the airflow from becoming turbulent and, therefore, temperatures of the electronic component are lowered efficiently. | 08-26-2010 |
20100236761 | Liquid cooled heat sink for multiple separated heat generating devices - A liquid cooled heat sink has a thermal conduction plate and a liquid cooling module. The liquid cooling module is attached securely to the thermal conduction plate and has a distribution tank, a collection tank and a pipe assembly. The pipe assembly has multiple pipes of at least two different gauges and each pipe has a pipe inlet and a pipe outlet respectively secured to the distribution tank and the collection tank. Since a sum of the gauges is increased and each pipe need not to be coiled, an extra strong pumping system is not needed and design complexity is reduced. | 09-23-2010 |
Wen-Hsiung Chen, Tamshui Chen TW
Patent application number | Description | Published |
---|---|---|
20090272514 | POWER SUPPLY AND HEAT-DISSIPATING METHOD OF THE POWER SUPPLY - A power supply is mounted in a case for a computer and has a shell, a blower assembly and multiple electrical components. The shell has a rear surface, a heat sink chamber, an electrical component chamber, an air inlet and an air outlet. The chambers have front end communicating with each other. The air inlet and the air outlet are formed through the rear surface of the shell. The blower assembly is mounted in the shell and is adjacent to the rear surface of the shell. The electrical components are mounted in the electrical component chamber and generate heat when the computer operates. The heat-dissipating method of the power supply is to extract air from outside the computer case into the shell to dissipate the heat generated by the electrical components. Using air at room temperature from outside the case is much more efficient to cool down the power supply. | 11-05-2009 |
Wen-Hsiung Hsieh, Keelung TW
Patent application number | Description | Published |
---|---|---|
20090262214 | AUTOMATIC LIGHTING CONTROL APPARATUS - An automatic lighting control apparatus is composed of an optical lens, an image sensor, an image processing unit which is connected to the image sensor, a lighting control unit which is connected to the image processing unit. By use the optical lens and image sensor, the automatic lighting control apparatus can easily capture the images of lighting area of the lighting apparatuses. To process and analysis the images of the lighting area via the image processing unit, the illumination of the images or its related parameters is get and used as the reference for the automatic lighting control apparatus to control the magnitude of light output of the lighting apparatuses to provide sufficient lighting while avoiding unnecessary energy consumption. | 10-22-2009 |
20090268023 | SURVEILLANCE CAMERA DEVICE WITH A LIGHT SOURCE - A surveillance camera device with a light source is composed of a camera, a control unit which is connected to the camera, a light-source control unit which is connected to the control unit, and a light source. The control unit directly gets the illumination of images captured by the camera or its related parameters, to determine whether illumination of the environment of image captured is sufficient. When the illumination of the environment of image captured is changed, the control unit will send lighting control signal to the light-source control unit to activate or deactivate the light source, or adjust the light output intensity of the light source automatically, such that the illumination of the environment of the images captured can be accurately determined to provide the correct light fill-in for shooting clear images. | 10-29-2009 |
20110169416 | DISCONTINUOUS CURRENT REGULATOR CIRCUIT FOR DRIVING LIGHT-EMITTING DIODES - A discontinuous current regulator circuit is composed of a switched-mode power converter circuit, a sensing circuit and a current mode controller circuit. The current mode controller circuit, based on the signal from the sensing circuit, controls the switched-mode power converter circuit to supply a regulated discontinuous current to a light-emitting diode or light-emitting diode arrangement comprising a plurality of light-emitting diodes. The present invention provides a discontinuous current regulator circuit for driving white light-emitting diodes able to provide higher perceived brightness levels and with longer lifetime than existing light-emitting diode drivers. | 07-14-2011 |
20130063209 | SWITCHING AMPLIFIER WITH AN INDUCTOR - A switching amplifying method or a switching amplifier for obtaining a linearly amplified replica of an input signal, is highly efficient, and does not have the disadvantage of “dead time” problem related to the class D amplifiers. Another aspect of the present invention provides a switching amplifier that is completely off when there is no input signal. Yet another aspect of the present invention further comprises an act of comparing an input signal with an output feedback signal for detection and correction of overall system signal processes therefore does not require a power supply regulator and is substantially immune to power supply and load perturbations. | 03-14-2013 |
20130076257 | SWITCHING MODE PULSED CURRENT SUPPLY FOR DRIVING LEDS - A method of switching a plurality of switches for supplying a pulsed current to one or more than one light-emitting diodes involves: switching a current from a direct current (DC) voltage to an inductance component, for example an inductor or a flyback transformer, for charging the inductance component; switching a current from the inductance component to the light-emitting diodes for transferring energy from the inductance component to the light-emitting diodes; switching a current from the inductance component to the direct current (DC) voltage for transferring energy from the inductance means back to the direct current (DC) voltage; controlling the switchings to regulate the current in the inductance component for supplying the pulsed current to the light-emitting diodes is disclosed. | 03-28-2013 |
20130121039 | SWITCHING AMPLIFIER WITH PULSED CURRENT SUPPLY - A switching amplifying method or a switching amplifier for obtaining one or more than one linearly amplified replicas of an input signal, is highly efficient, and does not have the disadvantage of “dead time” problem related to the class D amplifiers. Said switching amplifying method comprises the steps of: receiving the input signal; pulse modulating the input signal for generating a pulse modulated signal; switching a pulsed current from a direct current (DC) voltage according to the pulse modulated signal; conducting said pulsed current positively or negatively to a filter according to the polarity of the input signal; filtering said pulsed current positively or negatively conducted to the filter for outputting an output signal by the filter. | 05-16-2013 |
20130141162 | SWITCHING AMPLIFIER WITH INDUCTANCE MEANS FOR TRANSMITTING ENERGY - A switching amplifying method or a switching amplifier for obtaining one or more linearly amplified replicas of an input signal, is highly efficient, and does not have the disadvantage of “dead time” problem related to the class D amplifiers. Said switching amplifier comprises: an inductance means; a switching unit for switching a current from a DC voltage to the inductance means; a switching power transmitting unit for blocking a current when the switching unit switches on, and conducting the current from the inductance means to a filter unit positively or negatively according to the polarity of the input signal when the current from the DC voltage to the inductance means is switched off; an amplifier control unit to control the switching unit and the switching power transmitting unit according to the input signal; said filter unit filtering the current from the switching power transmitting unit to get an output signal. | 06-06-2013 |
20140002189 | SWITCHING AMPLIFIER WITH PULSED CURRENT SOURCE AND SINK | 01-02-2014 |
20140015437 | METHOD AND CIRCUIT FOR DRIVING LEDS WITH A PULSED CURRENT - A method and circuit with a pulsed current sink for driving one or more than one light-emitting diodes with a pulsed current. | 01-16-2014 |
20140103828 | METHODS AND CIRCUITS FOR SUPPLYING A PULSED CURRENT TO LEDS - Methods and circuits for driving one or more than one light-emitting diodes with a pulsed current are disclosed. | 04-17-2014 |
Wen-Hsiung Hsu, Taipei City TW
Patent application number | Description | Published |
---|---|---|
20090293283 | Combined Soup Spoon And Dinner Knife - A combined soup spoon and dinner knife includes a handle and a shallow bowl connected to a front end of the handle for lifting, serving, or eating food; and the shallow bowl is provided along the lower right and left sides with an edge of serrated teeth for cutting food. Both right-handed users and left-handed users may conveniently use the shallow bowl to eat soup or cut food by holding at the handle with the right hand or left hand. | 12-03-2009 |
Wen-Hsiung Huang, Tainan City TW
Patent application number | Description | Published |
---|---|---|
20150043162 | CENTRAL PROCESSING UNIT CASING - An electromagnetic interference (EMI) shield for reducing the electromagnetic interference and substantially uniformly distribute heat is disclosed. The EMI shield comprises a first layer configured to shield EMI and a second layer configured to dissipate heat. The EMI shield further comprises an interface. Some embodiments also provide methods for shielding EMI and uniformly dissipate heat of an electronic component. | 02-12-2015 |
Wen-Hsiung Huang, Fuqing City TW
Patent application number | Description | Published |
---|---|---|
20110095143 | Base Structure for Monitor - The present invention is related to a base structure which can support a monitor. A fixed portion is firmly disposed on the rear casing of the monitor and contains at least one slide rail. A slide portion can move up and down by means of the slide rail. A spring is linked to the fixed portion and the slide portion. One end of the push bar is pivotally linked to the slide portion. A first stand is firmly disposed on the rear casing. A second stand is pivotally linked to the first stand. Another end of the push bar is pivotally linked to the second stand. In this manner, the monitor may adjust the expanding angle of the second stand so as to place the monitor on the desk or hang the monitor on the wall. | 04-28-2011 |
Wen-Hsiung Ko, Taichung City TW
Patent application number | Description | Published |
---|---|---|
20130036924 | Trashcan - An improved trashcan includes an outer can having an accommodating space with an upward opening. The top of the outer can is pivotally provided with a controllable upper cover having an opening. The opening is embedded with a stepping board. The bottom of the upper cover has at least one restoring mechanism with several elastic elements for driving the stepping board to move along the axial direction of the accommodating space reciprocally. | 02-14-2013 |
20130037547 | Structure of Trashcan - An improved structure of trashcan includes an outer can with a controllable upper cover. The upper cover has a connecting hole with a stepping part that moves downward in the outer can when being stepped. A base is at the bottom of the upper cover. First, second, third, and fourth tracks surround the stepping part at symmetrical positions of the base. Each track accommodates a restoring assembly that connects to the stepping part so that the stepping part can restore its original position after the stepping part moves to the bottom of the trashcan. The first track and the second track are stacked vertically. The third track and the fourth track are also stacked vertically. This configuration decreases the area occupied by the base. As a result, the stepping area of the stepping part is increased for the user's convenience to step on. | 02-14-2013 |
Wen-Hsiung Ko, Fengyuan City TW
Patent application number | Description | Published |
---|---|---|
20090214353 | Hanging frame of the ceiling fan - An improved hanging frame of the ceiling fan includes a supporting base having a plurality of holding parts and extending downwards with a plurality of supporting parts. Each of the holding parts has a first supporting section that extends with a first holding section. Each of the supporting part supports the conversion base from the bottom of a through hole, thereby positioning the ceiling fan. | 08-27-2009 |
20110220653 | TRASH BAG RECEIVING STRUCTURE FOR TRASH CAN - A trash bag receiving structure for a trash can, which is disposed on the outer peripheral edge of a trash can, comprises a shell having a receiving chamber, an opening being provided on one side of the receiving chamber; a container box passing through the opening and contained in the receiving chamber of the shell, the container box having a containing space and having an access opening provided on the top thereof. The container box allowing trash bags to be placed therein can be received in the shell. The container box can be pulled out of the receiving chamber of the shell for the convenience of the user to take out the trash bags. | 09-15-2011 |
20110243745 | Structure for combining vane frame and vane of hanging fan - A structure for combining a vane frame and a vane of a hanging fan includes an elastic plate onto the vane frame, a pressing portion at a front end of the elastic plate, a latching portion at a rear end of the elastic plate, and three embedding blocks on the vane frame. One of the embedding blocks abuts the elastic plate. Slants are formed on both sides of the embedding block. A snap-in portion is formed at the bottom of the embedding block. Three embedding holes are formed at a front end of the vane, each having a connecting surface for connecting the vane with each embedding block. The pressing portion abuts the vane. The connecting surface and slant abut with each other. The front end of the embedding hole is snapped with the snap-in portion. The latching portion is pressed against a rear end of the embedding hole. | 10-06-2011 |
Wen-Hsiung Ko, Taichung County TW
Patent application number | Description | Published |
---|---|---|
20090027074 | Test structure and test method - The present invention discloses a wafer level test structure and a test method; in which, a heating plate is formed on the wafer for heating a structure to be tested positioned above or adjacent to the heating plate. The heating plate produces heat by electrically connecting to a current. Thus, the heat provided by the heating plate and the electric input/output into/from the structure to be tested are controlled separately and not influenced each other. | 01-29-2009 |
20090058455 | Test structure and test method - The present invention discloses a wafer level test structure and a test method; in which, a heating plate is formed on the wafer for heating a structure to be tested positioned above or adjacent to the heating plate. The heating plate produces heat by electrically connecting to a current. Thus, the heat provided by the heating plate and the electric input/output into/from the structure to be tested are controlled separately and not influenced each other. | 03-05-2009 |
Wen-Hsiung Lee, Taipei City TW
Patent application number | Description | Published |
---|---|---|
20120171417 | MULTI-FUNCTIONAL POLYESTER FILMS AND A METHOD FOR MANUFACTURING THE SAME - The present invention relates to a method for producing a multi-function polyester film by monolayer extrusion or multilayer extrusion, comprising providing at least one polyester material and at least one polyester material having diffusion particles; melt extruding and then cooling the polyester material rapidly to form a polyester sheet; treating the polyester sheet with biaxially orientation and then cooling the polyester sheet to obtain the polyester film. The method of the present invention provides the multi-function polyester film with a haze value below 95%, and a surface roughness value (Ra) above 0.1 nm. | 07-05-2012 |
Wen-Hsiung Li, Yuanshan Township TW
Patent application number | Description | Published |
---|---|---|
20120040420 | Flavor Compound-Producing Yeast Strains - Disclosed are a novel flavor compound-producing yeast strain and methods of using the strain to produce flavor compounds. | 02-16-2012 |
20140248703 | Method for Ordering and Introducing Multiple Genes Into A Genome - Described is a method of introducing multiple nucleic acid molecules into the genome of a cell. The method includes providing a plurality of nucleic acid molecules, each of the plurality of nucleic acid molecules containing (a) a nucleic acid sequence operatively linked to a promoter sequence at the 5′ end of the nucleic acid molecule, and (b) an overlapping sequence at the 3′ end of the nucleic acid molecule. | 09-04-2014 |
Wen-Hsiung Liao, Hsin Chu County TW
Patent application number | Description | Published |
---|---|---|
20100039211 | RESISTIVE COMPONENT AND METHOD OF MANUFACTURING THE SAME - A resistive component suitable for detecting electric current in a circuit and a method of manufacturing the resistive component are provided. The resistive component includes a carrier, a resistive layer, an electrode unit, an upper oxide layer and a protective layer. The resistive layer comprises copper alloy and is disposed on the carrier. The electrode unit is electrically connected to the resistive layer. The upper oxide layer is disposed on a part of a surface of the resistive layer and includes oxides of the resistive layer. The protective layer covers at least a part of the upper oxide layer. | 02-18-2010 |
Wen-Hsiung Lin, Taipei TW
Patent application number | Description | Published |
---|---|---|
20150276379 | 3D object size estimation system for object wrapping and method thereof - The invention discloses a system and method for estimating a three-dimensional (3D) packaging size of an object. The method has a self calibration function to correct the scale in the measurement environment so as to reduce errors caused by human operations. The system comprises an image capture unit for capturing images of the measurement environment and objects; a scale correction unit for performing the calibration using a reference object of a known size; and an object size estimation unit for detecting the position of an object to be estimated in the image data received from the image capture unit and estimating the 3D size of the object according to the calibrated scale. | 10-01-2015 |
Wen-Hsiung Lin, Tu-Cheng TW
Patent application number | Description | Published |
---|---|---|
20100061660 | DISPLAY DEVICE AND IMAGE RESIZING METHOD THEREOF - A display device includes an image reading module, three processing module, and a pixel generating module. The image reading module reads pixel data of an original image and a predetermined destination image format (hereafter destination format). A first processing module calculates a horizontal shift value and a vertical shift value. A second processing module converts ratios of a length of the original image to a length of the destination format and a height of the original image to a height of the destination format to integer values. A third processing module determines which pixel in the original image to copy to each pixel position in the destination format. A pixel generating module copies pixels in the original image to corresponding pixels positions in the destination format. | 03-11-2010 |
Wen-Hsiung Liu, Miao-Li County TW
Patent application number | Description | Published |
---|---|---|
20110025969 | TOUCH-SENSITIVE LIQUID CRYSTAL DISPLAY DEVICE - A in-cell touch-sensitive liquid crystal display device (LCD) includes a first substrate, a second substrate opposite to the first substrate, a liquid crystal layer disposed between the first substrate and the second substrate, a first sensing line and a second sensing line disposed on the second substrate, a first conductive layer and a second conductive layer electrically connected to the first sensing line and the second sensing line, respectively, and electrically isolated from each other by a gap existing therebetween. The in-cell touch-sensitive LCD device further includes a spacer disposed on the first substrate and corresponding to the gap. The spacer is electrically connected to the first conductive layer and the second conductive layer in response to an external pressure. | 02-03-2011 |
Wen-Hsiung Lu, Jhonghe City TW
Patent application number | Description | Published |
---|---|---|
20110101527 | MECHANISMS FOR FORMING COPPER PILLAR BUMPS - The mechanism of forming a metal bump structure described above resolves the delamination issues between a conductive layer on a substrate and a metal bump connected to the conductive layer. The conductive layer can be a metal pad, a post passivation interconnect (PPI) layer, or a top metal layer. By performing an in-situ deposition of a protective conductive layer over the conductive layer (or base conductive layer), the under bump metallurgy (UBM) layer of the metal bump adheres better to the conductive layer and reduces the occurrence of interfacial delamination. In some embodiments, a copper diffusion barrier sub-layer in the UBM layer can be removed. In some other embodiments, the UBM layer is not needed if the metal bump is deposited by a non-plating process and the metal bump is not made of copper. | 05-05-2011 |
20110254151 | METHOD FOR FABRICATING BUMP STRUCTURE WITHOUT UBM UNDERCUT - A method for fabricating bump structure without UBM undercut uses an electroless Cu plating process to selectively form a Cu UBM layer on a Ti UBM layer within an opening of a photoresist layer. After stripping the photoresist layer, there is no need to perform a wet etching process on the Cu UBM layer, and thereby the UBM structure has a non-undercut profile. | 10-20-2011 |
20110260317 | CU PILLAR BUMP WITH ELECTROLYTIC METAL SIDEWALL PROTECTION - A copper pillar bump has a sidewall protection layer formed of an electrolytic metal layer. The electrolytic metal layer is an electrolytic nickel layer, an electrolytic gold layer, and electrolytic copper layer, or an electrolytic silver layer. | 10-27-2011 |
20120007228 | CONDUCTIVE PILLAR FOR SEMICONDUCTOR SUBSTRATE AND METHOD OF MANUFACTURE - An embodiment of the disclosure includes a conductive pillar on a semiconductor die. A substrate is provided. A bond pad is over the substrate. A conductive pillar is over the bond pad. The conductive pillar has a top surface, edge sidewalls and a height. A cap layer is over the top surface of the conductive pillar. The cap layer extends along the edge sidewalls of the conductive pillar for a length. A solder material is over a top surface of the cap layer. | 01-12-2012 |
20120043654 | MECHANISMS FOR FORMING COPPER PILLAR BUMPS USING PATTERNED ANODES - The mechanisms of preparing bump structures described by using patterned anodes may simplify bump-making process, reduce manufacturing cost, and improve thickness uniformity within die and across the wafer. In addition, the mechanisms described above allow forming bumps with different heights to allow bumps to be integrated with elements on a substrate with different heights. Bumps with different heights expand the application of copper post bumps to enable further chip integration. | 02-23-2012 |
20120091574 | CONDUCTIVE PILLAR STRUCTURE - The invention relates to a bump structure of a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate; a contact pad over the substrate; a passivation layer extending over the substrate having an opening over the contact pad; and a conductive pillar over the opening of the passivation layer, wherein the conductive pillar comprises an upper portion substantially perpendicular to a surface of the substrate and a lower portion having tapered sidewalls. | 04-19-2012 |
20120178251 | METHOD OF FORMING METAL PILLAR - The disclosure relates to fabrication of to a metal pillar. An exemplary method of fabricating a semiconductor device comprises the steps of providing a substrate having a contact pad; forming a passivation layer extending over the substrate having an opening over the contact pad; forming a metal pillar over the contact pad and a portion of the passivation layer; forming a solder layer over the metal pillar; and causing sidewalls of the metal pillar to react with an organic compound to form a self-assembled monolayer or self-assembled multi-layers of the organic compound on the sidewalls of the metal pillar. | 07-12-2012 |
20120267781 | MECHANISMS FOR FORMING COPPER PILLAR BUMPS USING PATTERNED ANODES - This disclosure relates to a bump structure on a substrate including a copper layer, wherein the copper layer fills an opening created in a dielectric layer and a polymer layer. The bump structure further includes an under-bump-metallurgy (UBM) layer lines the opening and the copper layer is deposited over the UBM layer. The bump structure further includes a surface of the copper layer facing away from the substrate is curved. This disclosure also relates to two bump structures with different heights on a substrate where a thickness of the first bump structure is different than a thickness of the second bump structure. This disclosure also relates to a semiconductor device including a bump structure. | 10-25-2012 |
20120299181 | Package-on-Package Process for Applying Molding Compound - A method of packaging includes placing a package component over a release film, wherein solder balls on a surface of the package component are in physical contact with the release film. Next, A molding compound filled between the release film and the package component is cured, wherein during the step of curing, the solder balls remain in physical contact with the release film. | 11-29-2012 |
20120322255 | Metal Bump Formation - A system and method for forming metal bumps is provided. An embodiment comprises attaching conductive material to a carrier medium and then contacting the conductive material to conductive regions of a substrate. Portions of the conductive material are then bonded to the conductive regions using a bonding process to form conductive caps on the conductive regions, and residual conductive material and the carrier medium are removed. A reflow process is used to reflow the conductive caps into conductive bumps. | 12-20-2012 |
20130009307 | Forming Wafer-Level Chip Scale Package Structures with Reduced number of Seed Layers - A method includes forming a passivation layer over a metal pad, which is overlying a semiconductor substrate. A first opening is formed in the passivation layer, with a portion of the metal pad exposed through the first opening. A seed layer is formed over the passivation layer and to electrically coupled to the metal pad. The seed layer further includes a portion over the passivation layer. A first mask is formed over the seed layer, wherein the first mask has a second opening directly over at least a portion of the metal pad. A PPI is formed over the seed layer and in the second opening. A second mask is formed over the first mask, with a third opening formed in the second mask. A portion of a metal bump is formed in the third opening. After the step of forming the portion of the metal bump, the first and the second masks are removed. | 01-10-2013 |
20130062761 | Packaging Methods and Structures for Semiconductor Devices - Packaging methods and structures for semiconductor devices are disclosed. In one embodiment, a packaged semiconductor device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface. At least one integrated circuit is coupled to the first surface of the RDL, and a plurality of metal bumps is coupled to the second surface of the RDL. A molding compound is disposed over the at least one integrated circuit and the first surface of the RDL. | 03-14-2013 |
20130075921 | Forming Packages Having Polymer-Based Substrates - A method includes applying a polymer-comprising material over a carrier, and forming a via over the carrier. The via is located inside the polymer-comprising material, and substantially penetrates through the polymer-comprising material. A first redistribution line is formed on a first side of the polymer-comprising material. A second redistribution line is formed on a second side of the polymer-comprising material opposite to the first side. The first redistribution line is electrically coupled to the second redistribution line through the via. | 03-28-2013 |
20130089952 | Packaging Process Tools and Packaging Methods for Semiconductor Devices - Packaging process tools and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure including a frame. The frame includes a plurality of apertures adapted to retain a plurality of integrated circuit dies therein. The frame includes at least one hollow region. | 04-11-2013 |
20130093078 | Process for Forming Package-on-Package Structures - A device includes an inter-layer dielectric, a device die under the inter-layer dielectric; and a die-attach film under the inter-layer dielectric and over the device die, wherein the die-attach film is attached to the device die. A plurality of redistribution lines includes portions level with the die-attach film. A plurality of Z-interconnects is electronically coupled to the device die and the plurality of redistribution lines. A polymer-comprising material is under the inter-layer dielectric. The device die, the die-attach film, and the plurality of Z-interconnects are disposed in the polymer-comprising material. | 04-18-2013 |
20130102112 | Process for Forming Packages - A method includes loading a first package component on a concave boat, and placing a second package component over the first package component. A load clamp is placed over the second package component, wherein the load clamp is supported by a temperature-variable spacer of the concave boat. A reflow step is performed to bond the second package component to the first package component. During a temperature-elevation step of the reflow step, the temperature-variable spacer is softened in response to an increase in temperature, and a height of the softened temperature-variable spacer is reduced, until the load clamp is stopped by a rigid spacer of the concave boat. | 04-25-2013 |
20130115735 | Apparatus and Methods for Molded Underfills in Flip Chip Packaging - Methods and apparatus for a forming molded underfills. A method is disclosed including loading a flip chip substrate into a selected one of the upper mold chase and lower mold chase of a mold press at a first temperature; positioning a molded underfill material in the at least one of the upper and lower mold chases while maintaining the first temperature which is lower than a melting temperature of the molded underfill material; forming a sealed mold cavity and creating a vacuum in the mold cavity; raising the temperature of the molded underfill material to a second temperature greater than the melting point to cause the molded underfill material to flow over the flip chip substrate forming an underfill layer and forming an overmolded layer; and cooling the flip chip substrate to a third temperature substantially lower than the melting temperature of the molded underfill material. An apparatus is disclosed. | 05-09-2013 |
20130147031 | SEMICONDUCTOR DEVICE WITH BUMP STRUCTURE ON POST-PASSIVATION INTERCONNCET - A semiconductor device includes a post-passivation interconnect (PPI) structure having a landing pad region. A polymer layer is formed on the PPI structure and patterned with a first opening and a second opening to expose portions of the landing pad region. The second opening is a ring-shaped opening surrounding the first opening. A bump structure is formed on the polymer layer to electrically connect the landing pad region through the first opening and the second opening. | 06-13-2013 |
20130181338 | Package on Package Interconnect Structure - A structure comprises a post passivation interconnect layer formed over a semiconductor substrate, a metal bump formed over the post passivation interconnect layer and a molding compound layer formed over the semiconductor substrate. A lower portion of the metal bump is embedded in the molding compound layer and a middle portion of the metal bump is surrounded by a concave meniscus molding compound protection layer. | 07-18-2013 |
20130187269 | PACKAGE ASSEMBLY AND METHOD OF FORMING THE SAME - A package assembly including a semiconductor die electrically coupled to a substrate by an interconnected joint structure. The semiconductor die includes a bump overlying a semiconductor substrate, and a molding compound layer overlying the semiconductor substrate and being in physical contact with a first portion of the bump. The substrate includes a no-flow underfill layer on a conductive region. A second portion of the bump is in physical contact with the no-flow underfill layer to form the interconnected joint structure. | 07-25-2013 |
20130256870 | PACKAGING DEVICE AND METHOD OF MAKING THE SAME - A device includes a first and a second package component. A metal trace is disposed on a surface of the first package component. The metal trace has a lengthwise direction. The second package component includes a metal pillar, wherein the second package component is disposed over the first package component. A solder region bonds the metal pillar to the metal trace, wherein the solder region contacts a top surface of the metal trace. | 10-03-2013 |
20130309621 | METHOD AND APPARATUS FOR ADJUSTING WAFER WARPAGE - A method for adjusting the warpage of a wafer, includes providing a wafer having a center portion and edge portions and providing a holding table having a holding area thereon for holding the wafer. The wafer is placed onto the holding table with the center portion higher than the edge portions and thereafter pressed onto the holding area such that the wafer is attracted to and held onto the holding table by self-suction force. The wafer is heated at a predetermined temperature and for a predetermined time in accordance with an amount of warpage of the wafer in order to achieve a substantially flat wafer or a predetermined wafer level. | 11-21-2013 |
20130328190 | Methods and Apparatus of Packaging Semiconductor Devices - Methods and apparatuses for wafer level packaging (WLP) of semiconductor devices are disclosed. A contact pad of a circuit may be connected to a solder bump by way of a post passivation interconnect (PPI) line and a PPI pad. The PPI pad may comprise a hollow part and an opening. The PPI pad may be formed together with the PPI line as one piece. The hollow part of the PPI pad can function to control the amount of solder flux used in the ball mounting process so that any extra amount of solder flux can escape from an opening of the solid part of the PPI pad. A solder ball can be mounted to the PPI pad directly without using any under bump metal (UBM) as a normal WLP package would need. | 12-12-2013 |
20130341800 | Integrated Circuit Packages and Methods for Forming the Same - A method includes forming an electrical connector over a substrate of a wafer, and molding a polymer layer, with at least a portion of the electrical connector molded in the polymer layer. A first sawing step is performed to form a trench in the polymer layer. After the first sawing step, a second sawing step is performed to saw the wafer into a plurality of dies. | 12-26-2013 |
20140054764 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A semiconductor package includes a semiconductor substrate, a contact pad overlying the semiconductor substrate, an interconnect layer overlying the contact pad, a passivation layer formed between the contact pad and the interconnect layer, a bump overlying the interconnect layer, and a protection layer overlying the interconnect layer and the passivation layer and covering a lower portion of the bump. The protection layer includes a curved surface region. | 02-27-2014 |
20140159223 | Apparatus and Method for Package Reinforcement - A method and apparatus for a reinforced package are provided. A package component may be electrically coupled to a device through a plurality of electrical connections. A molding underfill may be interposed between the package component and the device and may encapsulate the plurality of electrical connections or a subset of the plurality of electrical connections between the package component and the device. The package component may also include a molding compound. The plurality of the electrical connections may extend through the molding compound with the molding underfill interposed between the molding compound and the device to encapsulate the plurality of electrical connections or a subset of the plurality of electrical connections between the package component and the device. The molding underfill may extend up one or more sides of the package component. | 06-12-2014 |
20140187103 | System and Method for an Improved Fine Pitch Joint - Presented herein are an interconnect and method for forming the same, the method comprising forming an interconnect on a mounting surface of a mounting pad disposed on a first surface of a first substrate, the interconnect comprising a conductive material, optionally solder or metal, the interconnect avoiding the sides of the mounting pad. A molding compound is applied to the first surface of the first substrate and molded around the interconnect to covering at least a lower portion of the interconnect and a second substrate may be mounted on the interconnect. The interconnect may comprise an interconnect material disposed between a first and second substrate and a molding compound disposed on a surface of the first substrate, and exposing a portion of the interconnect. A sidewall of the interconnect material contacts the mounting pad at an angle less than about 30 degrees from a plane perpendicular to the first substrate. | 07-03-2014 |
20140231125 | Interconnect Joint Protective Layer Apparatus and Method - Disclosed herein is a mechanism for forming an interconnect comprising forming a connector on an interconnect disposed on a first surface of a first substrate and applying a nonconductive material in a non-liquid form over the interconnect after forming the connector. The nonconductive material covers at least a lower portion of the interconnect, and at least a portion of the interconnect is exposed. The nonconductive material is formed around the connector by pressing the nonconductive material over the connector with a roller. An angle between a top surface of the nonconductive material and a connector sidewall between about 65 degrees and about 135 degrees. The nonconductive material may be formed to extend under the connector. | 08-21-2014 |
20140252558 | Methods and Apparatus for Wafer Level Packaging - A semiconductor device comprises a substrate, a bond pad above the substrate, a guard ring above the substrate, and an alignment mark above the substrate, between the bond pad and the guard ring. The device may comprise a passivation layer on the substrate, a polymer layer, a post-passivation interconnect (PPI) layer in contact with the bond pad, and a connector on the PPI layer, wherein the connector is between the bond pad and the guard ring, and the alignment mark is between the connector and the guard ring. The alignment mark may be at the PPI layer. There may be multiple alignment marks at different layers. There may be multiple alignment marks for the device around the corners or at the edges of an area surrounded by the guard ring. | 09-11-2014 |
20140252597 | Directly Sawing Wafers Covered with Liquid Molding Compound - A method includes forming a passivation layer over a metal pad, wherein the metal pad is further overlying a semiconductor substrate of a wafer. A Post-Passivation Interconnect (PPI) is formed to electrically couple to the metal pad, wherein a portion of the PPI is overlying the passivation layer. A metal bump is formed over and electrically coupled to the PPI. The method further includes applying a molding compound over the metal bump and the PPI, applying a release film over the molding compound, pressing the release film against the molding compound, and curing the molding compound when the release film is pressed against the molding compound. The release film is then removed from the molding compound. The wafer is sawed into dies using a blade, with the blade cutting through the molding compound. | 09-11-2014 |
20140252601 | Interconnect Structures and Methods of Forming Same - Embodiments of the present disclosure include interconnect structures and methods of forming interconnect structures. An embodiment is an interconnect structure including a post-passivation interconnect (PPI) over a first substrate and a conductive connector on the PPI. The interconnect structure further includes a molding compound on a top surface of the PPI and surrounding a portion of the conductive connector, a top surface of the molding compound adjoining the conductive connector at an angle from about 10 degrees to about 60 degrees relative to a plane parallel with a major surface of the first substrate, the conductive connector having a first width at the adjoining top surface of the molding compound, and a second substrate over the conductive connector, the second substrate being mounted to the conductive connector. | 09-11-2014 |
20140252611 | Ball Amount Process in the Manufacturing of Integrated Circuit - An integrated circuit structure includes a semiconductor substrate, a metal pad over the semiconductor substrate, a passivation layer including a portion over the metal pad, a polymer layer over the passivation layer, and a Post-Passivation Interconnect (PPI) over the polymer layer. The PPI is electrically connected to the metal pad. The PPI includes a PPI line have a first width, and a PPI pad having a second width greater than the first width. The PPI pad is connected to the PPI line. The PPI pad includes an inner portion having a first thickness, and an edge portion having a second thickness smaller than the first thickness. | 09-11-2014 |
20140256092 | Interconnect Structures and Methods of Forming Same - Embodiments of the present disclosure include interconnect structures and methods of forming interconnect structures. An embodiment is a method of forming an interconnect structure, the method including forming a first post-passivation interconnect (PPI) over a first substrate, forming a second PPI over the first substrate, and forming a first conductive connector on the first PPI. The method further includes forming a second conductive connector on the second PPI, and forming a molding compound on top surfaces of the first and second PPIs and surrounding portions of the first and second connectors, a first section of molding compound being laterally between the first and second connectors, the first section of molding compound having a curved top surface. | 09-11-2014 |
20140264842 | Package-on-Package Structure and Method of Forming Same - A device comprises a bottom package comprising interconnect structures, first bumps on a first side and metal bumps on a second side, a semiconductor die bonded on the bottom package, wherein the semiconductor die is electrically coupled to the first bumps through the interconnect structures. The device further comprises a top package bonded on the second side of the bottom package, wherein the top package comprises second bumps, and wherein each second bump and a corresponding metal bump form a joint structure between the top package and the bottom package and an underfill layer formed between the top package and the bottom package, wherein the metal bumps are embedded in the underfill layer. | 09-18-2014 |
20140264859 | Packaging Devices and Methods of Manufacture Thereof - Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a method of manufacturing a packaging device includes forming an interconnect wiring over a substrate, and forming conductive balls over portions of the interconnect wiring. A molding material is deposited over the conductive balls and the substrate, and a portion of the molding material is removed from over scribe line regions of the substrate. | 09-18-2014 |
20140264885 | Apparatus and Method for Wafer Separation - A plurality of macro and micro alignment marks may be formed on a wafer. The macro alignment marks may be formed in pairs at opposite edges of the wafer. The micro alignment marks may be formed to align to streets on the wafer along a first and second direction. A molding compound may be formed on the wafer. The macro alignment marks may be exposed from the molding compound. A pair of the micro alignment marks may be exposed from the molding compound at opposite ends of the streets along the first and the second direction. The wafer may be aligned to a dicing tool using pairs of the macro alignment marks. The dicing tool may be aligned to the streets using pairs of the micro alignment marks. The wafer may be diced using successive pairs of micro alignment marks along the first and second direction. | 09-18-2014 |
20140331462 | Packaging Process Tools and Packaging Methods for Semiconductor Devices - Packaging process tools and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure including a frame. The frame includes a plurality of apertures adapted to retain a plurality of integrated circuit dies therein. The frame includes at least one hollow region. | 11-13-2014 |
20140363966 | Pillar Bumps and Process for Making Same - Apparatus and methods for providing solder pillar bumps. Pillar bump connections are formed on input/output terminals for integrated circuits by forming a pillar of conductive material using plating of a conductive material over terminals of an integrated circuit. A base portion of the pillar bump has a greater width than an upper portion. A cross-section of the base portion of the pillar bump may make a trapezoidal, rectangular, or sloping shape. Solder material may be formed on the top surface of the pillar. The resulting solder pillar bumps form fine pitch package solder connections that are more reliable than those of the prior art. | 12-11-2014 |
20150014851 | INTERCONNECT STRUCTURE AND METHOD OF FABRICATING SAME - A structure comprises a passivation layer formed over a semiconductor substrate, a connection pad enclosed by the passivation layer, a redistribution layer formed over the passivation layer, wherein the redistribution layer is connected to the connection pad, a bump formed over the redistribution layer, wherein the bump is connected to the redistribution layer and a molding compound layer formed over the redistribution layer. The molding compound layer comprises a flat portion, wherein a bottom portion of the bump is embedded in the flat portion of the molding compound layer and a protruding portion, wherein a middle portion of the bump is surrounded by the protruding portion of the molding compound layer. | 01-15-2015 |
20150044819 | Packaging Methods and Structures for Semiconductor Devices - Packaging methods and structures for semiconductor devices are disclosed. In one embodiment, a packaged semiconductor device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface. At least one integrated circuit is coupled to the first surface of the RDL, and a plurality of metal bumps is coupled to the second surface of the RDL. A molding compound is disposed over the at least one integrated circuit and the first surface of the RDL. | 02-12-2015 |
20150123276 | Methods and Apparatus of Packaging Semiconductor Devices - Methods and apparatuses for wafer level packaging (WLP) of semiconductor devices are disclosed. A contact pad of a circuit may be connected to a solder bump by way of a post passivation interconnect (PPI) line and a PPI pad. The PPI pad may comprise a hollow part and an opening. The PPI pad may be formed together with the PPI line as one piece. The hollow part of the PPI pad can function to control the amount of solder flux used in the ball mounting process so that any extra amount of solder flux can escape from an opening of the solid part of the PPI pad. A solder ball can be mounted to the PPI pad directly without using any under bump metal (UBM) as a normal WLP package would need. | 05-07-2015 |
20150179522 | Methods and Apparatus for Wafer Level Packaging - A semiconductor device includes a substrate, a bond pad above the substrate, a guard ring above the substrate, and an alignment mark above the substrate, between the bond pad and the guard ring. The device may include a passivation layer on the substrate, a polymer layer, a post-passivation interconnect (PPI) layer in contact with the bond pad, and a connector on the PPI layer, wherein the connector is between the bond pad and the guard ring, and the alignment mark is between the connector and the guard ring. The alignment mark may be at the PPI layer. There may be multiple alignment marks at different layers. There may be multiple alignment marks for the device around the corners or at the edges of an area surrounded by the guard ring. | 06-25-2015 |
20150179624 | Process for Forming Package-on-Package Structures - A device includes an inter-layer dielectric, a device die under the inter-layer dielectric; and a die-attach film under the inter-layer dielectric and over the device die, wherein the die-attach film is attached to the device die. A plurality of redistribution lines includes portions level with the die-attach film. A plurality of Z-interconnects is electronically coupled to the device die and the plurality of redistribution lines. A polymer-comprising material is under the inter-layer dielectric. The device die, the die-attach film, and the plurality of Z-interconnects are disposed in the polymer-comprising material. | 06-25-2015 |
20150214077 | Methods of Packaging and Dicing Semiconductor Devices and Structures Thereof - Methods of packaging and dicing semiconductor devices, and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging and dicing semiconductor devices includes a first cutting process performed on a wafer to form a groove passing through a passivation layer and an interconnect structure on a scribe line region and a portion of a semiconductor substrate on the scribe line region. Next, a molding compound layer is formed on a frontside of the wafer to fill the groove. After performing a grinding process on a backside of the wafer to thin down the semiconductor substrate, a second cutting process is performed on the wafer to separate the individual dies. The second cutting process cuts through the molding compound layer in the groove and the semiconductor substrate underlying the groove. | 07-30-2015 |
20150214145 | Interconnect Structure and Method of Fabricating Same - An interconnect structure and a method of fabrication of the same are introduced. In an embodiment, a post passivation interconnect (PPI) structure is formed over a passivation layer of a substrate. A bump is formed over the PPI structure. A molding layer is formed over the PPI structure. A film is applied over the molding layer and the bump using a roller. The film is removed from over the molding layer and the bump, and the remaining material of the film on the molding layer forms the protective layer. A plasma cleaning is preformed to remove the remaining material of the film on the bump. | 07-30-2015 |
20150249066 | METHOD OF FORMING PACKAGE ASSEMBLY - A method of forming a package assembly includes forming a no-flow underfill layer on a substrate. The method further includes attaching a semiconductor die to the substrate. The semiconductor die comprises a bump and a molding compound layer in physical contact with a lower portion of the bump. An upper portion of the bump is in physical contact with the no-flow underfill layer. | 09-03-2015 |
Wen-Hsiung Lu, Jhonge City TW
Patent application number | Description | Published |
---|---|---|
20130295762 | CU PILLAR BUMP WITH ELECTROLYTIC METAL SIDEWALL PROTECTION - A method of forming a bump structure includes providing a semiconductor substrate and forming an under-bump-metallurgy (UBM) layer on the semiconductor substrate. The method further includes forming a mask layer on the UBM layer, wherein the mask layer has an opening exposing a portion of the UBM layer. The method further includes forming a copper layer in the opening of the mask layer and removing a portion of the mask layer to form a space between the copper layer and the mask layer. The method further includes performing an electrolytic process to fill the space with a metal layer and removing the mask layer. | 11-07-2013 |
Wen-Hsiung Shih, Taoyuan City TW
Patent application number | Description | Published |
---|---|---|
20130207855 | MOBILE DEVICE - A mobile device includes a substrate, a ground element, and a radiation branch. The ground element includes a ground branch, wherein an edge of the ground element has a notch extending into an interior of the ground element so as to form a slot region, and the ground branch partially surrounds the slot region. The radiation branch is substantially inside the slot region, and is coupled to the ground branch of the ground element. The ground branch and the radiation branch form an antenna structure. | 08-15-2013 |
Wen-Hsiung Tsai, Taipei TW
Patent application number | Description | Published |
---|---|---|
20120166968 | Method of transmitting and displaying messages and portable electronic devices thereof - A method of transmitting and displaying messages applied to portable electronic devices includes the following steps: providing a handwriting interface for a sender to compose a plurality of sent-messages on a touch screen; receiving a plurality of received-messages from a receiver; providing a dialog window wherein the dialog window is adapted for placing the sent-messages and the received-messages. Moreover, each sent-message and received-message is displayed in accordance with the time of creation of each message. | 06-28-2012 |
20120233270 | METHOD FOR TRANSMITTING AND RECEIVING MESSAGES - A method for transmitting and receiving messages is used for a server. The method comprises: receiving sender information including a sender identification information, a sender message, and a receiver E-mail address; providing a sender E-mail address; sending a first E-mail including the sender message from the sender E-mail address to the receiver E-mail address; receiving a second E-mail including a reply message sent from the receiver address to the sender address; and transmitting the reply message to the sender. | 09-13-2012 |
20150131843 | Support Base and Charger of Hand-Held Electronic Apparatus - A support base of a hand-held electronic apparatus configured for placing a hand-held electronic apparatus having a speaker is provided. The support base comprises an accommodating body which is formed with a hollow casing, and the shape of the accommodating body corresponds to a portion of the hand-held electronic apparatus such that the hand-held electronic apparatus can be placed therein. The characteristics of the present invention are as follows: The accommodating body comprises a first sound broadcasting hole and a second sound broadcasting hole, and when the hand-held electronic apparatus is placed in the accommodating body, the speaker of the hand-held electronic apparatus corresponds to the first sound broadcasting hole such that the speaker of the hand-held electronic apparatus can broadcast sound through the second sound broadcasting hole. | 05-14-2015 |
20150205981 | Handheld Communication Device Supporting Base - A handheld communication device supporting base is disclosed. The handheld communication device supporting base is used for placing a handheld communication device and reading a card. The handheld communication device supporting base includes a handheld communication device placement notch, a reader device, and a processor. The handheld communication device placement notch is used for placing the handheld communication device. The reader device is located next to the handheld communication device placement notch, used for reading the card, to obtain the reading information. The processor is electrically connected to the reader device, used for transferring the reading information to the handheld communication device via the handheld communication device placement notch, allowing the reading information to be transferred via the handheld communication device. | 07-23-2015 |
20150234546 | Method for Quickly Displaying a Skype Contacts List and Computer Program Thereof and Portable Electronic Device for Using the Same - A method for quickly displaying a Skype contacts list applied to a portable electronic device is disclosed. The method for quickly displaying a Skype contacts list includes the following steps: receiving a command generated by a user touching a physical button, and outputting a Skype contacts menu interface to a screen according to the command, wherein the Skype contacts menu interface includes a plurality of contacts button icons. | 08-20-2015 |
20150268841 | Method of Changing a User Interface to be a Dedicated SkypeTM Interface and Computer Program Product Thereof and Handheld Electronic Device - A method of changing a user interface to be a dedicated Skype™ interface is disclosed. The method is applied to a handheld electronic device which has a screen, and a plurality of application programs are installed in the handheld electronic device. A built-in user interface is displayed by the screen. A plurality of icons corresponding to the application programs are displayed on the screen via the built-in user interface. The method includes the following steps: receiving a setting change command, and changing the built-in user interface to be a dedicated Skype™ interface. | 09-24-2015 |
Wen-Hsiung Yang, Hsichih TW
Patent application number | Description | Published |
---|---|---|
20130033815 | AIRFLOW ADJUSTMENT DEVICE AND BLADE SERVER - An airflow adjustment device is disclosed. The airflow adjustment device is used for a blade server provided for plugging in an interface card, and the interface card includes a bracket. The airflow adjustment device is installed in the blade server, and the airflow adjustment device includes a top cover, a plurality of sidewalls, a bracket plate, and at least one deflector. The bracket plate is used for sheltering the bracket, and air enters the blade server through the at least one deflector and at least one gap area formed by the bracket plate and at least one of the plurality of sidewalls whereby the flow resistance of the blade server is not affected by the type of the bracket. | 02-07-2013 |
Wen-Hsiung Yu, Nantou City TW
Patent application number | Description | Published |
---|---|---|
20090146953 | Methods for processing data from accelerometer in anticipating real-time cursor control movements - A method for controlling a display cursor includes a step of receiving and processing signals from an accelerometer included in a cursor control device by applying a low-pass filter for filtering out signals received from an accelerometer having a frequency higher than a cutoff frequency and adjusting the cutoff frequency depending on a speed of a cursor movement controlled by a speed of angular position change of the display cursor control device. | 06-11-2009 |
20100033431 | SELECTION DEVICE AND METHOD - A selection device for selecting an icon in an image area is provided including a motion-sensing unit and a processing unit. The motion-sensing unit senses a first motion and converts the first motion into a first signal. The processing unit converts the first signal into a first locus in the image area, determines a first area in the image area according to the first locus, and determines whether the icon is to be selected according to the first area and a second area where the icon is to be displayed in the image area. | 02-11-2010 |