Patent application number | Description | Published |
20100110749 | Semiconductor memory device having driver for compensating for parasitic resistance of data input-output pads - A semiconductor memory device that includes a supply voltage pad, a ground voltage pad, and at least two data input/output pads arranged between the supply voltage pad and the ground voltage pad. The semiconductor memory device has a first pull-up driver that is connected to the second data input/output pad located at a first distance from the supply voltage pad, and a first pull-down driver that is connected to the first data input/output pad located at a second distance from the ground voltage pad. | 05-06-2010 |
20100226189 | Delay locked loop circuit including delay line with reduced sensitivity to variation in pvt - A delay locked loop circuit is disclosed. The circuit includes a phase detector for comparing the phase of an input clock signal with the phase of a feedback clock signal that is fed back into the phase detector, and for outputting a detection signal. The circuit also includes a control circuit unit for controlling a delay line in response to the detection signal, a delay line for delaying the input clock by a predetermined amount of delay in response to output impedance calibration codes applied to the delay line, and a replica circuit configured to have the same delay conditions as those of an actual clock path to a circuit of the semiconductor device, to receive a delay clock signal of the delay line, and to generate the feedback clock signal. | 09-09-2010 |
20110057684 | TRANSCEIVER SYSTEM, SEMICONDUCTOR DEVICE THEREOF, AND DATA TRANSCEIVING METHOD OF THE SAME - A transceiver system includes a first semiconductor device having a first input/output (I/O) pad connected with an I/O channel and a second semiconductor device having a second I/O pad connected with the I/O channel. The first semiconductor device is configured to terminate the first I/O pad with a first voltage when data is received, and maintain the first I/O pad and the I/O channel at the first voltage when data is transmitted. The second semiconductor device is configured to terminate the second I/O pad with a second voltage higher than the first voltage when data is received, and maintain the second I/O pad and the I/O channel at the second voltage when data is transmitted. | 03-10-2011 |
20130191146 | APPARATUS FOR EVALUATING RADIATION THERAPY PLAN AND METHOD THEREFOR - The present invention relates to an apparatus and to a method for comparing and evaluating therapy plan received from heterogeneous radiation therapy apparatuses. An apparatus according to an embodiment of the present invention includes a receiving means, a processing means, and a display means. The receiving means receives the patient's first radiation therapy plan data, which is generated by a first radiation therapy apparatus, and also receives the patient's second radiation therapy plan data, which is generated by a second radiation therapy apparatus. The processing means processes the first and second radiation therapy plan data to generate mixed data overlaid onto the medical image of the patient. According to a configuration of the present invention, trial and error during radiation treatment may be minimized. | 07-25-2013 |
20150035426 | REFRIGERATOR AND DOOR POCKET OF REFRIGERATOR - A refrigerator includes a body provided with a storage compartment having a front side opening, a door rotatably coupled by a coupling member to one side of the body to open/close the front side opening of the storage compartment; and at least one door pocket coupled to an inner side of the door in a way to have a storage space and provided with a first side surface and a second side surface, the second side surface provided at a side facing the storage compartment and the first side surface connected to the second side surface to be positioned adjacent to a side of the door that is open. The second side surface is formed at a position higher than a position of the first side surface to prevent cool air from leaking outside, and stored goods positioned in the storage space are withdrawn through the first side surface. | 02-05-2015 |
Patent application number | Description | Published |
20120321545 | METHOD FOR PRODUCING GRAPHENES THROUGH THE PRODUCTION OF A GRAPHITE INTERCALATION COMPOUND USING SALTS - The present invention relates a method for producing a graphite intercalation compound (GIC) and to the production of graphene using the same. The method of the present invention comprises the following steps: (a) obtaining alkaline metals or alkaline metal ions, or alkaline earth metals or alkaline metal ions, from alkaline metal salts or alkaline earth metal salts; (b) forming a graphite intercalation compound using the alkaline metals or alkaline metal ions, or the alkaline earth metals or alkaline earth metal ions; and (c) dispersing the graphite intercalation compound so as to obtain graphene. As the method of the present invention uses salts which are inexpensive and safe, graphite intercalation compounds can be easily produced at a low cost, and the graphene can be obtained from the thus-produced compounds, thereby reducing the costs of producing the graphene and enabling the easy mass production of the graphene. | 12-20-2012 |
20130323150 | METHOD OF FORMING HIGH-QUALITY HEXAGONAL BORON NITRIDE NANOSHEET USING MULTI COMPONENT EUTECTIC POINT SYSTEM - Provided is a method of manufacturing a hexagonal boron nitride nanosheet to mass-produce a high-quality hexagonal boron nitride nanosheet at a low temperature in a safe process. | 12-05-2013 |
20140079623 | METHOD OF FORMING HIGH-QUALITY GRAPHENE USING CONTINUOUS HEAT TREATMENT CHEMICAL VAPOR DEPOSITION - Provided is a method of forming graphene having an increased grain size. In the method, a substrate including a catalyst layer formed of a transition metal is loaded into a chamber and a gaseous carbon source is supplied into the chamber. A continuous heat treatment in which the catalyst layer is locally heated while moving a heated area of the catalyst layer is performed to dissolve a carbon component in the catalyst layer and extract graphene on a surface of the catalyst layer from the dissolved carbon component. | 03-20-2014 |
20140182808 | METHOD OF MANUFACTURING POROUS METAL FOAM - A method of manufacturing a porous metal foam having pores of nano size includes: manufacturing a porous polymer foam containing pores of nano size; and coating metal on the porous polymer foam through electroless plating. The present invention provides porous metal foams which contains nano-sized pores and hence, their specific surface area is maximized owing to the regularly-patterned nanoporous structure formed inside. | 07-03-2014 |
Patent application number | Description | Published |
20090269872 | Array substrate for liquid crystal display device and method of fabricating the same - An array substrate for a liquid crystal display (LCD) device includes a substrate including a display region and a non-display region, a driving circuit in the non-display region, at least a first thin film transistor (TFT) in the display region, a storage capacitor in the display region including a first storage electrode, a second storage electrode, and a third storage electrode, wherein the first storage electrode includes a first semiconductor layer and a counter electrode, and the third storage electrode includes a first transparent electrode pattern and a first metal pattern, a gate line and a data line crossing each other to define a pixel region in the display region, and a pixel electrode connected to the first TFT in the pixel region. | 10-29-2009 |
20100103338 | LIQUID CRYSTAL DISPLAY AND METHOD FOR FABRICATING THE SAME - A liquid crystal display includes an insulating substrate having a pixel portion divided into a thin film transistor region and a storage region, a first active layer formed on the substrate to cover at least the thin film transistor region, and a storage electrode formed on the first active layer to selectively cover the storage region. | 04-29-2010 |
20110181151 | RIGID DUAL-SERVO NANO STAGE - The present invention relates to a stage, particularly to, a stage which is able to move minutely, having a rigidity-improved transfer part. A stage includes a work table on which a working object is placed, a motor configured to provide a rotational force, a shaft rotated by the motor to transfer the work table, a linear moving part configured to be expandable to linearly move the shaft in an axial direction, the linear moving part having a hollow to insert an end of the shaft therein, and an expanding part configured to be expandable as far as the shaft is moved by the linear moving part. | 07-28-2011 |
20120320299 | LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating is provided for a liquid crystal display device capable of decreasing the number of masks used to fabricate a thin film transistor (TFT) by forming an active pattern and a storage electrode by a single mask process, by simultaneously patterning a pixel electrode at the time of a gate line patterning, and by using only an organic insulation layer having a low dielectric constant. | 12-20-2012 |
20130001579 | Array Substrate for Fringe Field Switching Mode Liquid Crystal Display and Method of Manufacturing the Same - A method of manufacturing an array substrate for a fringe field switching mode liquid crystal display includes: forming an auxiliary insulating layer having a first thickness; forming first and second photoresist patterns on the auxiliary insulating layer; performing an ashing to remove the second photoresist pattern and expose the auxiliary insulating layer therebelow; performing a dry etching to remove the auxiliary insulating layer not covered by the first photoresist pattern and expose a first passivation layer and to form an insulating pattern below the first photoresist pattern, the insulating pattern and the first photoresist pattern forming an undercut shape; forming a transparent conductive material layer having a fourth thickness less than the first thickness; and performing a lift-off process to remove the first photoresist pattern and the transparent conductive material layer thereon together and form a pixel electrode. | 01-03-2013 |
20130248870 | ARRAY SUBSTRATE FOR FRINGE FIELD SWITCHING MODE LIQUID CRYSTAL DISPLAY AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing an array substrate for a fringe field switching mode liquid crystal display includes: forming an auxiliary insulating layer on a second passivation layer and having a first thickness; forming first and second photoresist patterns on the auxiliary insulating layer and having second and third thicknesses, respectively, the second thickness greater than the third thickness; etching the auxiliary insulating layer, the second passivation layer and a first passivation layer to form a drain contact hole; performing an ashing to remove the second photoresist pattern and expose the auxiliary insulating layer therebelow; performing a dry etching to remove the auxiliary insulating layer not covered by the first photoresist pattern and expose the first passivation layer and to form an insulating pattern below the first photoresist pattern, the insulating pattern and the first photoresist pattern forming an undercut shape; forming a transparent conductive material layer having a fourth thickness less than the first thickness; and performing a lift-off process to remove the first photoresist pattern and the transparent conductive material layer thereon together and form a pixel electrode as a remaining portion of the transparent conductive material layer. | 09-26-2013 |