Patent application number | Description | Published |
20080275908 | SYSTEM, METHOD AND COMPUTER-READABLE MEDIUM FOR PROVIDING PATTERN MATCHING - A system, method and computer-readable medium are disclosed for identifying representative data using sketches. The method embodiment comprises generating a plurality of vectors from a data set, modifying each of the vectors of the plurality of vectors and selecting one of the plurality of generated vectors according to a comparison of a summed distance between a modified vector associated with the selected generated vector and remaining modified vectors. Modifying the generated vectors may involve reduced each generated vector to a lower dimensional vector. The summed distance then represents a summed distance between the lower dimensional vector and remaining lower dimensional vectors. | 11-06-2008 |
20100057805 | System, Method and Computer-Readable Medium for Providing Pattern Matching - A system, method and computer-readable medium are disclosed for identifying representative data using sketches. The method embodiment comprises generating a plurality of vectors from a data set, modifying each of the vectors of the plurality of vectors and selecting one of the plurality of generated vectors according to a comparison of a summed distance between a modified vector associated with the selected generated vector and remaining modified vectors. Modifying the generated vectors may involve reduced each generated vector to a lower dimensional vector. The summed distance then represents a summed distance between the lower dimensional vector and remaining lower dimensional vectors. | 03-04-2010 |
20130275440 | ARTICLE SELECTION - A computer-implemented method for selecting an article from an input set of articles stored on a database of a source device, comprises generating a subset of the articles relevant to a query article using a relevance metric representing a measure of dissimilarity between the query article and selected articles in the set, computing distance measures for respective ones of the articles in the subset using article attributes and article commentary objects, using the distance measures to determine measures of the diversity of respective ones of articles in the subset from one another, and using the diversity measures to select a diverse article in the subset. | 10-17-2013 |
20140062779 | FAST TRANSFORM BASED OFFSET DETERMINATION - An offset estimator (e.g., a time delay, a spatial image offset, etc.) makes use of a transform approach (e.g., using Fast Fourier Transforms). The sparse nature of a cross-correlation is exploited by limiting the computation required in either or both of the forward and inverse transforms. For example, only a subset of the transform values (e.g., a regular subsampling of the values) is used. In some examples, an inverse transform yields a time aliased version of the cross-correlation. Further processing then identifies the most likely offset of the original signals by considering offsets that are consistent with the aliased output. | 03-06-2014 |
20140193031 | COMPRESSIVE SENSING WITH LOCAL GEOMETRIC FEATURES - Methods and apparatuses for compressive sensing that enable efficient recovery of features in an input signal based on acquiring a few measurements corresponding to the input signal. One method of compressive sensing includes folding an image to generate first and second folds, and recovering a feature of the image based on the first and second folds without reconstructing the image. One example of a compressive sensing apparatus includes a lens, a focal plane array coupled to the lens and configured to generate first and second folds based on the image, and a decoder configured to receive the first and second folds and to recover a feature of the image without reconstructing the image. The feature may be a local geometric feature or a corner. Compressive sensing methods and apparatuses for determining translation and rotation between two images are also disclosed. | 07-10-2014 |
20140193076 | COMPRESSIVE SENSING WITH LOCAL GEOMETRIC FEATURES - Methods and apparatuses for compressive sensing that enable efficient recovery of features in an input signal based on acquiring a few measurements corresponding to the input signal. One method of compressive sensing includes folding an image to generate first and second folds, and recovering a feature of the image based on the first and second folds without reconstructing the image. One example of a compressive sensing apparatus includes a lens, a focal plane array coupled to the lens and configured to generate first and second folds based on the image, and a decoder configured to receive the first and second folds and to recover a feature of the image without reconstructing the image. The feature may be a local geometric feature or a corner. Compressive sensing methods and apparatuses for determining translation and rotation between two images are also disclosed. | 07-10-2014 |
Patent application number | Description | Published |
20080218971 | METHOD AND STRUCTURE TO IMPROVE THERMAL DISSIPATION FROM SEMICONDUCTOR DEVICES - A method and structure of improving thermal dissipation from a module assembly include attaching a first side of at least one chip to a single chip carrier, the at least one chip having a second side opposite of the first side; grinding the second side of the at least one chip to a desired surface profile; applying a heat transfer medium on at least one of a heat sink and the second side of the at least one chip; and disposing the heat sink on the second side of the at least one chip with the heat transfer medium therebetween defining a gap between the heat sink and the second side of the at least one chip. The gap is controlled to improve heat transfer from the second side of the at least one chip to the heat sink. | 09-11-2008 |
20080310117 | METHOD AND STRUCTURE TO IMPROVE THERMAL DISSIPATION FROM SEMICONDUCTOR DEVICES - A method and structure of improving thermal dissipation from a module assembly include attaching a first side of at least one chip to a single chip carrier, the at least one chip having a second side opposite of the first side; grinding the second side of the at least one chip to a desired surface profile; applying a heat transfer medium on at least one of a heat sink and the second side of the at least one chip; and disposing the heat sink on the second side of the at least one chip with the heat transfer medium therebetween defining a gap between the heat sink and the second side of the at least one chip. The gap is controlled to improve heat transfer from the second side of the at least one chip to the heat sink. | 12-18-2008 |
20090120999 | HIGH TIN SOLDER ETCHING SOLUTION - A method is provided for the removal of tin or tin alloys from substrates such as the removal of residual tin solder from the molds used in the making of interconnect solder bumps on a wafer or other electronic device. The method is particularly useful for the well-known C4NP interconnect technology and uses an etchant composition comprising cupric ions and HCl. Cupric chloride and cupric sulfate are preferred. A preferred method regenerates cupric ions by bubbling air or oxygen through the etchant solution during the cleaning process. | 05-14-2009 |
20130149841 | WAFER DICING EMPLOYING EDGE REGION UNDERFILL REMOVAL - In one embodiment, a dielectric material layer embedding metal structures is ablated from the chip-containing substrate by laser grooving, which is performed on dicing channels of the chip-containing substrate. Subsequently, an underfill layer is formed over the dielectric material layer in a pattern that excludes the peripheral areas of the chip-containing substrate. The physically exposed dicing channels at the periphery can be employed to align a blade to dice the chip-containing substrate. In another embodiment, an underfill layer is formed prior to any laser grooving. Mechanical cutting of the underfill layer from above dicing channels is followed by laser ablation of the dicing channels and subsequent mechanical cutting to dice a chip-containing substrate. | 06-13-2013 |
20140151879 | STRESS-RESILIENT CHIP STRUCTURE AND DICING PROCESS - A substrate includes a plurality of semiconductor chips arranged in a grid pattern and laterally spaced from one another by channel regions. The substrate includes a vertical stack of a semiconductor layer and at least one dielectric material layer embedding metal interconnect structures. The at least one dielectric material layer are removed along the channel regions and around vertices of the grid pattern so that each semiconductor chip includes corner surfaces that are not parallel to lines of the grid pattern. The corner surfaces can include straight surfaces or convex surfaces. The semiconductor chips are diced and subsequently bonded to a packaging substrate employing an underfill material. The corner surfaces reduce mechanical stress applied to the metal interconnect layer during the bonding process and subsequent thermal cycling processes. | 06-05-2014 |