Patent application number | Description | Published |
20090201003 | DC/DC CONVERTER - A conventional DC/DC converter with both a step-up function and a step-down function has a drawback that its output voltage will be discontinuous when its operations are switched. | 08-13-2009 |
20100060495 | ANALOG DIGITAL CONVERT APPARATUS, ANALOG DIGITAL CONVERT METHOD, CONTROL APPARATUS AND PROGRAM - Provided is an AD converting apparatus that converts an analog input signal into a digital output signal, comprising a plurality of AD converters supplied with sampling clocks differing from each other by prescribed phase amounts, each AD converter outputting an individual signal obtained by digitizing the input signal according to the supplied sampling clock; a plurality of amplitude-dependent characteristic correcting sections that are provided to correspond to the plurality of AD converters, each amplitude-dependent characteristic correcting section generating a corrected individual signal by correcting the individual signal output by the corresponding AD converter using a correction factor corresponding to an amplitude of the individual signal; and a combining section that generates the output signal by combining a plurality of the corrected individual signals. | 03-11-2010 |
20110031953 | ENVELOPE TRACKING POWER SUPPLY CIRCUIT AND HIGH-FREQUENCY AMPLIFIER INCLUDING ENVELOPE TRACKING POWER SUPPLY CIRCUIT - The invention aims to maintain a high efficiency even for a high-frequency signal having a wideband envelope. The envelope tracking power supply circuit | 02-10-2011 |
20110095740 | SWITCHING REGULATOR - The invention provides a technique to widely spread the frequency spectrum of switching noise generated by a switching action and to reduce the noise level at a particular frequency. A switching regulator ( | 04-28-2011 |
20110316729 | COMPLEX BANDPASS DELTASIGMAAD MODULATOR AND DIGITAL RADIO RECEIVER - To provide a complex bandpass ΔΣAD modulator capable of suppressing the influence of an image component caused by a mismatch between I- and Q-channels on a signal component with low power consumption. | 12-29-2011 |
20120100821 | PLL CIRCUIT, AND RADIO COMMUNICATION DEVICE EQUIPPED THEREWITH - In an ADPLL circuit, on the basis of a gain of a digitally controlled oscillator estimated when a loop gain of a certain value is set in the loop filter and on the basis of a device parameter of the digitally controlled oscillator, the DCO gain estimation unit estimates a gain of the digitally controlled oscillator when a loop gain of another value is set in the loop filter. | 04-26-2012 |
Patent application number | Description | Published |
20080238752 | Analog-to-digital (AD) converter and analog-to-digital conversion method - An AD converter that operates at high speed and precision of which is disclosed. The AD converter includes an analog-to-digital (AD) conversion part that samples an analog signal according to a sampling clock and converts it into a digital signal, a jitter measuring circuit that measures the jitter of the sampling clock, and a correction circuit that corrects a digital signal output from the AD conversion part. The AD converter further comprises a clock source and a sampling generating circuit that generates a sampling clock by dividing the clock generated by the clock source, wherein the jitter measuring circuit measures the jitter of the sampling clock with respect to the click on the basis of a clock CK. | 10-02-2008 |
20080297203 | CURRENT MIRROR CIRCUIT - A current mirror circuit including: a first resistance element having one terminal connected to a first potential, and the other terminal connected to a second potential lower than the first potential; an operational amplifier having a high-potential input terminal connected to the first potential and the one terminal of the first resistance element; a second resistance element having one terminal connected to a low-potential input terminal of the operational amplifier, and the other terminal connected to the second potential; and a transistor having a first electrode connected to an output terminal of the operational amplifier, a second electrode connected to the low-potential input terminal of the operational amplifier and the one terminal of the second resistance element, and a third electrode used as an output terminal, wherein the first and second resistance elements both start to operate from a linear area having lower voltage than a saturation area. | 12-04-2008 |
20090167581 | High-Precision Multi-Band Pass Delta-Sigma Modulator - A high-precision ΔΣ modulator reduces nonlinear noise due to the use of a multibit DAC and has little hardware and power consumption. A digital signal is DA converted and fed back to a subtraction circuit supplied with an analog signal. The DAC used in this feedback circuit uses a DAC (DWADAC) that includes a weighted pointer so that input digital signals are supplied in order to a plurality of segment elements that construct the DAC. In this DWADAC, the construction and number of the pointer is set based on the type and order of the filter disposed before the ADC. | 07-02-2009 |
20110133971 | ANALOG-TO-DIGITAL CONVERTER - An SAR ADC includes a digital-to-analog converter, a first comparator that compares an input analog signal with a reference analog signal, a second comparator that compares an input analog signal with a reference analog signal, a selection circuit that selects one of comparison results of the first comparator and the second comparator, and a control circuit that changes the multibit digital signal sequentially based on the selected comparison result in a plurality of steps so that the reference analog signal becomes closer to the input analog signal, and the control circuit controls the selection circuit to select the comparison result of the first comparator up to an intermediate step on the way of the plurality of steps and to select the comparison result of the second comparator after the intermediate step, and changes the bit value of the multibit digital signal according to the non-binary algorithm. | 06-09-2011 |
20130214945 | MULTI-BIT DELTA-SIGMA TIME DIGITIZER CIRCUIT AND CALIBRATION METHOD THEREOF - According to one embodiment, a multi-bit delta-sigma time digitizer circuit includes a delay array including delay selection circuits respectively including a delay element and a multiplexer, a phase comparator calculating a time difference, an integrator integrating the time difference output, a flash A/D converter executing digital conversion, a ring oscillation circuit including the delay array, a counter measuring a number of clock signal pulses, a memory storing a delay value of the delay element, and a processor correcting an output result of the A/D converter based on the delay value when the rising timing interval is measured. | 08-22-2013 |
20130234792 | TIME DIFFERENCE AMPLIFIER CIRCUIT - According to one embodiment, a time difference amplifier circuit includes the first amplifier including first positive and negative inputs and first positive and negative outputs, the second amplifier including second positive and negative inputs and second positive and negative outputs, first to fourth wirings, a selection circuit including the first selection element connecting the first or fourth wirings to the second positive input, and the second selection element connecting the second or third wirings to the second negative input, and a control circuit connecting the amplifiers by the first and second wirings or by the third and fourth wirings. | 09-12-2013 |