Patent application number | Description | Published |
20080224039 | Scanning electron microscope with length measurement function and dimension length measurement method - A scanning electron microscope with a length measurement function includes an electron gun emitting an electron beam, a measurement target region setting unit for setting a measurement region for a pattern formed on a sample, a storing unit for storing the designated measurement region, a beam blanker unit for controlling an irradiation of the electron beam depending on the measurement region, and a control unit for extracting the designated measurement region from the storing unit, interrupting the electron beam with the beam blanker unit in a region other than the measurement region, irradiating the electron beam passed through the beam blanker unit onto the sample in the measurement region, capturing an image of the measurement region, and measuring the pattern. The measurement region may be represented by a pair of measurement regions, and the respective regions may have the same areas as each other. | 09-18-2008 |
20090158103 | TEST APPARATUS AND TEST METHOD - The apparatus includes a first variable delay circuit that delays a data signal from a device under test (DUT) to output a delay data signal; a second variable delay circuit that delays a clock signal to output a first delay clock signal; a first FF that acquires the delay data signal based on a reference clock; a second FF that acquires the first delay clock signal based on the clock; a first delay adjusting section that adjusts a delay amount of at least one of the first and second variable delay circuits so that the first and second FFs acquire the delay data signal and the first delay clock signal when the signals are changed; a third variable delay circuit that delays the clock signal to output a second delay clock signal; a second delay adjusting section that adjusts a delay amount of the third variable delay circuit based on the acquired first delay clock signal of which a phase is adjusted by the first delay adjusting section when the second delay clock is changed, in order to adjust a phase difference between the first and second delay clock signals to a desired phase difference; a deciding section that decides the quality of the data signal from the DUT based on a result obtained by acquiring the delay data signal when the second delay clock signal is changed. | 06-18-2009 |
20090322395 | TRANSMISSION PATH DRIVING CIRCUIT - A transmission line driving circuit that can support a high-rate signal transmission and further can perform appropriate loss compensation in accordance with a signal pattern. A transmission line driving circuit | 12-31-2009 |
20100001776 | DIFFERENTIAL SIGNAL TRANSMITTING APPARATUS AND A TEST APPARATUS - Provided is a differential signal transmission apparatus that transmits a differential signal expressed by a potential difference between a positive signal and a negative signal, including a positive signal transmission line that transmits the positive signal; a negative signal transmission line that transmits the negative signal; and a delay compensating circuit that compensates for a time difference between the positive signal and the negative signal with a variable compensation time. | 01-07-2010 |
20100109788 | Driver circuit - In a driver circuit | 05-06-2010 |
20100196804 | Mask inspection apparatus and image creation method - Provided is a mask inspection apparatus including: emitting unit for emitting electron beams onto a sample; electron detecting unit for detecting the quantity of electrons produced, by the emission of the electron beams, from the sample with patterns formed thereon; image processing unit for generating image data for the patterns on the basis of the electron quantity; and controlling unit for controlling the emitting unit, the electron detecting unit, and the image processing unit. The controlling unit calculates, from the size of a designated observation area of the sample, a division number of divisional images that are synthesized to form a joint image that covers the entire designated observation area. The controlling unit determines divisional areas so that adjacent divisional areas partially overlap each other. The controlling unit acquires SEM images for the respective divisional areas. The controlling unit synthesizes the SEM images of the divisional areas on the basis of coordinate data for the divisional areas and on the basis of edge information for patterns included in the overlapping regions, and thereby creates an SEM image of a wide field of view that covers the observation area. | 08-05-2010 |
20100201421 | JITTER GENERATING CIRCUIT - A jitter generating circuit wherein a simple structure can be used to generate a pattern effect jitter. A jitter generating circuit | 08-12-2010 |
20100258959 | VAPORIZATION FILTER FOR HUMIDIFICATION, VAPORIZATION FILTER LAMINATE FOR HUMIDIFICATION AND HUMIDIFICATION METHOD USING THESE - The present invention relates to a vaporization filter for humidification which comprises a filter substrate, and an anchor layer containing a film-forming polymer and a hydrophilic layer being provided on the substrate in this order, a vaporization filter laminate for humidification which comprises the vaporization filters for humidification being laminated each with a distance and a humidification method using these. | 10-14-2010 |
20110291682 | PIN CARD AND TEST APPARATUS USING THE SAME - A first switch is arranged such that a first terminal thereof is connected to an AC test unit and a second terminal thereof is connected to an I/O terminal and a DC test unit. A first switch is configured so as to be capable of switching states between a connection state in which the first terminal and the second terminal are connected to each other, and a disconnection state in which they are disconnected from each other. A bypass capacitor is arranged between the first terminal and the second terminal, and is configured to bypass the frequency component which is cut off by the first switch. | 12-01-2011 |
20120019272 | PIN CARD AND TEST APPARATUS USING THE SAME - A DUT is connected to an I/O terminal. An AC test unit performs an AC test operation for the DUT. A DC test unit performs a DC test operation for the DUT. An optical semiconductor switch is arranged such that a first terminal thereof is connected to the AC test unit and a second terminal thereof is connected to the I/O terminal. The optical semiconductor switch | 01-26-2012 |
20120249251 | GENERATION OF BEZIER CURVE AS CONTROL SIGNAL FOR OSCILLATING CIRCUIT - A function generating circuit for producing a control signal for an oscillating circuit that vibrates a crystal unit includes a temperature detecting circuit to detect an ambient temperature, and a Bezier-curve generating circuit to produce a Bezier curve as the control signal in response to the ambient temperature detected by the temperature detecting circuit. | 10-04-2012 |
20120313718 | OSCILLATION CIRCUIT - A disclosed oscillation circuit includes a constant-voltage generation circuit, an oscillation generation circuit configured to generate an oscillation output, an output circuit including a plurality of parallelly arranged MOSFET circuits, to which a constant voltage generated by the constant-voltage generation circuit is supplied as a supply voltage, output points of the plurality of MOSFET circuits being mutually connected, and a drive circuit configured to drive a selected MOSFET circuit selected in response to a selection input among the plurality of MOSFET circuits by the oscillation output, wherein an output from an unselected MOSFET circuit among the plurality of MOSFET circuits other than the selected MOSFET circuits has a high impedance. | 12-13-2012 |
20120326762 | OSCILLATOR CIRCUIT - An oscillator circuit includes an oscillator output signal generating circuit configured to generate an oscillator output signal using an oscillator as a resonator, an amplitude detection circuit configured to detect the amplitude of the oscillator output signal and compare the detected amplitude with a threshold; and a boost circuit configured to boost the oscillator output signal according to the result of the comparison at the amplitude detection circuit. The amplitude detection circuit includes an absolute value circuit configured to obtain an absolute value signal of the oscillator output signal, a low-pass filter configured to convert the absolute value signal into a low-frequency signal, and a comparator configured to compare the low-frequency signal with the threshold. | 12-27-2012 |
20130068947 | Pattern inspection apparatus and pattern inspection method - A pattern inspection apparatus includes: an irradiator irradiating a sample with an electron beam; an electron detector detecting an amount of electrons generated on the sample having a pattern formed thereon, by the irradiation of the electron beam; an image processor generating a SEM image of the pattern on the basis of the electron amount; and a controller acquiring defect position information on the pattern formed on the sample from an optical defect inspection device is provided. The controller specifies a defect candidate pattern from the SEM image and judges whether a defect in the defect candidate pattern is to be transferred onto a wafer. The controller determines a view field of the SEM image and specifies the defect candidate pattern from information on patterns in the SEM image in the view field. | 03-21-2013 |