Patent application number | Description | Published |
20090193308 | Method and an Apparatus for Controlling an Unreliable Data Transfer in a Data Channel - Controlling an unreliable data transfer in a data channel from a transmitting unit to a receiving unit. A bypass mode or a buffer mode is activated depending on the error rate in the data channel. If bypass mode is selected, data packets are directly transferred in probation from the transmitting unit to the receiving unit by a bypass line. The data packets are error checked after the data transfer. If buffer mode is selected, data is transfer from the transmitting unit to the receiving unit by a buffer line via an error detecting and correcting unit and a buffer unit. The errors are detected and corrected during the data transfer. | 07-30-2009 |
20110307666 | DATA CACHING METHOD - Data caching for use in a computer system including a lower cache memory and a higher cache memory. The higher cache memory receives a fetch request. It is then determined by the higher cache memory the state of the entry to be replaced next. If the state of the entry to be replaced next indicates that the entry is exclusively owned or modified, the state of the entry to be replaced next is changed such that a following cache access is processed at a higher speed compared to an access processed if the state would stay unchanged. | 12-15-2011 |
20120215983 | DATA CACHING METHOD - Data caching for use in a computer system including a lower cache memory and a higher cache memory. The higher cache memory receives a fetch request. It is then determined by the higher cache memory the state of the entry to be replaced next. If the state of the entry to be replaced next indicates that the entry is exclusively owned or modified, the state of the entry to be replaced next is changed such that a following cache access is processed at a higher speed compared to an access processed if the state would stay unchanged. | 08-23-2012 |
20140082290 | Enhanced Wiring Structure for a Cache Supporting Auxiliary Data Output - A mechanism is provided in a data processing system for enhancing wiring structure for a cache supporting an auxiliary data output. The mechanism splits the data cache into a first data portion and a second data portion. The first data portion provides a first set of data elements and the second data portion provides a second set of data elements. The mechanism connects a first data path to provide the first set of data elements to a primary output and connects a second data path to provide the second set of data elements to the primary output. The mechanism feeds the first data path back into the second data path and feeds the second data path back into the first data path. The mechanism connects a secondary output to the second data path. | 03-20-2014 |
20140129773 | HIERARCHICAL CACHE STRUCTURE AND HANDLING THEREOF - A hierarchical cache structure comprises at least one higher level cache comprising a unified cache array for data and instructions and at least two lower level caches, each split in an instruction cache and a data cache. An instruction cache and a data cache of a split second level cache are connected to a third level cache; and an instruction cache of a split first level cache is connected to the instruction cache of the split second level cache, and a data cache of the split first level cache is connected to the instruction cache and the data cache of the split second level cache. | 05-08-2014 |
20140129774 | HIERARCHICAL CACHE STRUCTURE AND HANDLING THEREOF - A hierarchical cache structure includes at least one real indexed higher level cache with a directory and a unified cache array for data and instructions, and at least two lower level caches, each split in an instruction cache and a data cache. An instruction cache of a split real indexed second level cache includes a directory and a corresponding cache array connected to the real indexed third level cache. A data cache of the split second level cache includes a directory connected to the third level cache. An instruction cache of a split virtually indexed first level cache is connected to the second level instruction cache. A cache array of a data cache of the first level cache is connected to the cache array of the second level instruction cache and to the cache array of the third level cache. A directory of the first level data cache is connected to the second level instruction cache directory and to the third level cache directory. | 05-08-2014 |
20140281238 | SYSTEMS AND METHODS FOR ACCESSING CACHE MEMORY - Systems and methods for providing data from a cache memory to requestors includes a number of cache memory levels arranged in a hierarchy. The method includes receiving a request for fetching data from the cache memory and determining one or more addresses in a cache memory level which is one level higher than a current cache memory level using one or more prediction algorithms. Further, the method includes pre-fetching the one or more addresses from the high cache memory level and determining if the data is available in the addresses. If data is available in the one or more addresses then data is fetched from the high cache level, else addresses of a next level which is higher than the high cache memory level are determined and pre-fetched. Furthermore, the method includes providing the fetched data to the requestor. | 09-18-2014 |
20150032964 | HANDLING VIRTUAL MEMORY ADDRESS SYNONYMS IN A MULTI-LEVEL CACHE HIERARCHY STRUCTURE - Handling virtual memory address synonyms in a multi-level cache hierarchy structure. The multi-level cache hierarchy structure having a first level, L1 cache, the L1 cache being operatively connected to a second level, L2 cache split into a L2 data cache directory and a L2 instruction cache. The L2 data cache directory including directory entries having information of data currently stored in the L1 cache, the L2 cache being operatively connected to a third level, L3 cache. The first level cache is virtually indexed while the second and third levels are physically indexed. Counter bits are allocated in a directory entry of the L2 data cache directory for storing a counter number. The directory entry corresponds to at least one first L1 cache line. A first search is performed in the L1 cache for a requested virtual memory address, wherein the virtual memory address corresponds to a physical memory address tag at a second L1 cache line. | 01-29-2015 |
Patent application number | Description | Published |
20100146210 | METHOD TO VERIFY AN IMPLEMENTED COHERENCY ALGORITHM OF A MULTI PROCESSOR ENVIRONMENT - A method to verify an implemented coherency algorithm of a multi processor environment on a single processor model is described, comprising the steps of:
| 06-10-2010 |
20110066988 | Method, System, Computer Program Product, and Data Processing Program for Verification of Logic Circuit Designs Using Dynamic Clock Gating - A method and system for verifying a logic circuit design using dynamic clock gating is disclosed. The method comprises choosing at least one master seed to determine initial values as initialization for said logic circuit and/or stimuli data for at least one interface of said logic circuit, choosing at least two different dynamic clock gating configurations for every chosen master seed, executing a functional simulation with said logic circuit for every chosen dynamic clock gating configuration by using said determined initialization and/or stimuli data based on a corresponding master seed, comparing simulation results of functional simulations against each other executed with said logic circuit for at least two different chosen dynamic clock gating configurations, and reporting an error if said at least two simulation results are not identical. | 03-17-2011 |
20120059996 | Avoiding Cross-Interrogates in a Streaming Data Optimized L1 Cache - A mechanism is provided for avoiding cross-interrogates for a streaming data optimized level one cache. The mechanism adds a set of dedicated registers, referred to as “copex registers,” to track ownership of the cache lines that the co-processor's L1 cache holds exclusive. The mechanism extends the cache directory of the L2 cache by a bit that identifies exclusive ownership of a cache line in the co-processor cache. The co-processor continuously provides an indication of which copex registers are valid. On any action that requires a directory lookup in the L2 cache, the mechanism compares the valid copex registers against the lookup address in parallel to the directory lookup. The mechanism considers the “exclusive ownership in co-processor” bit in the directory valid only if the cache line is also currently in a valid copex register. | 03-08-2012 |
20120210188 | HANDLING CORRUPTED BACKGROUND DATA IN AN OUT OF ORDER EXECUTION ENVIRONMENT - Handling corrupted background data in an out of order processing environment. Modified data is stored on a byte of a word having at least one byte of background data. A byte valid vector and a byte store bit are added to the word. Parity checking is done on the word. If the word does not contain corrupted background date, the word is propagated to the next level of cache. If the word contains corrupted background data, a copy of the word is fetched from a next level of cache that is ECC protected, the byte having the modified data is extracted from the word and swapped for the corresponding byte in the word copy. The word copy is then written into the next level of cache that is ECC protected. | 08-16-2012 |
Patent application number | Description | Published |
20090199902 | SILICON SOLAR CELLS COMPRISING LANTHANIDES FOR MODIFYING THE SPECTRUM AND METHOD FOR THE PRODUCTION THEREOF - The aim of the invention is to improve the energy yield efficiency of solar cells. According to the invention, the silicon material is doped with one or more different lanthanides such that said material penetrates into a layer approximately 60 nm deep. Photons, whose energy is at least double that of the 1.2 eV silicon material band gap, are thus converted into at least two photons having energy in the region of the silicon band gap, by excitation and recombination of the unpaired 4f electrons of the lanthanides. As a result, additional photons having advantageous energy close to the silicon band gap are provided for electron-hole pair formation. | 08-13-2009 |
20090232627 | Device and method for positioning and blocking thin substrates on a cut substrate block - A device for positioning and blocking thin silicon wafers after wire-sawing a silicon wafer block. The device comprises a cassette that accommodates the wafer block and is provided with two contact strips whose sides facing the wafer block encompass elements which engage into narrow cutting gap between the wafers so as to maintain a distance and provide support. This allows the wafers to be fixed in the position thereof even after removing a supporting glass plate such that particularly the gap in the area of the former connecting point to the removed supporting glass plate is maintained and the subsequent singulation process is simplified. | 09-17-2009 |
20100012185 | Method for the Manufacture of a Solar Cell and the Resulting Solar Cell - In a method for the production of a solar cell, a flat aluminium layer is applied to the back of a solar cell substrate. The aluminium is alloyed into the silicon substrate by the effect of the temperature and forms an aluminium BSF. The remaining aluminium that has not been alloyed into the silicon is subsequently removed. The aluminium BSF is transparent to light. | 01-21-2010 |
20100018580 | Method for the Manufacture of a Solar Cell and the Resulting Solar Cell - In a method for the manufacture of a solar cell from a silicon substrate to the front and back surfaces are firstly applied a first antireflection coating with an optical refractive index n between 3.6 and 3.9. To the latter is applied a second antireflection with an optical refractive index n between 1.94 and 2.1. The antireflection coatings are separated down to the underlying silicon substrate in order to introduce metal contacts to the silicon substrate into the antireflection coatings. | 01-28-2010 |
20110114168 | Method for the Selective Doping of Silicon and Silicon Substrate Treated Therewith - A method for the selective doping of silicon of a silicon substrate ( | 05-19-2011 |
20110232751 | METHOD FOR MACHINING THE SURFACE OF A WAFER FOR PRODUCING A SOLAR CELL, AND WAFER - In a method for the treatment of the surface of a wafer for producing a solar cell, onto which wafer an antireflection and passivation layer has been applied onto a p-doped layer in a step preceding the method, the surface is treated in a processing step and then a subsequent metallization on the surface of the wafer for producing contacts for the solar cell takes place. This processing step is for passivation or for removal of the p-doped layer in the region of disturbances such as scratches, defect sites, pinholes and inhomogeneous regions in the antireflection and passivation layer. It is thus possible to avoid metal depositions at these disturbances. | 09-29-2011 |
20120276749 | Method and Device for Treating Silicon Substrates - In a method for processing monocrystalline silicon wafers, which are transported while lying flat along a horizontal transport path, etching solution for texturing the surface is applied from above by means of nozzles or the like. The etching solution is applied from above several times in succession onto the upper side of the silicon substrates, remains there and reacts with the silicon substrate. | 11-01-2012 |
20150024540 | Device and Method for Producing Thin Films - In an apparatus for producing thin layers on substrates for solar cell production, wherein the thin layers are applied by an APCVD process at temperatures of more than 250° C., the substrates are conveyed on a horizontal conveyor path and coated by means of an APCVD coating in continuous operation. The conveyor path has conveyor rollers, which consist of a temperature-resistant, non-metallic material, preferably of ceramic. A heating device and/or a purge gas feeding device is/are arranged on that side of the conveyor path which is remote from the coating apparatus. | 01-22-2015 |
Patent application number | Description | Published |
20090142332 | Identification of Biomarkers by Serum Protein Profiling - The present invention relates to methods of determining colorectal cancer status in a subject. The invention further relates to kits for determining colorectal cancer status in a subject. The invention further related to methods of identifying biomarker for determining colorectal cancer status in a subject. | 06-04-2009 |
20110224089 | GENE EXPRESSION SIGNATURE OF GENOMIC INSTABILITY IN BREAST CANCER - Methods of assessing genomic instability in breast cancer tissue by measuring the expression level of genes CDKN2A, SCYA18, STK15, NXF1, cDNA Dkfzp762M127, p28 KIAA0882, MYB, Human clone 23948, RERG, HNF3A, and ACADSB or a nucleic acid sequence comprising about 90% or greater sequence identity to SEQ ID NO: 21 in breast cancer tissue, an array suitable for use in such methods, and related methods and compositions. | 09-15-2011 |
20130196876 | DIFFERENTIAL DIAGNOSIS OF PANCREATIC ADENOMAS - The invention relates to a method for the diagnosis of pancreatic adenomas, to biomarkers for use in said method, to kits for carrying out the method, and to the use of said method for detecting pancreatic adenomas. The following markets are used: KCNABT, CIORF77, SPSB2, MED9, STK40, ITGB3BP, SCEL, PDPK1, DUSP15, MED19, NAP1L3, TMOD3, CSPP1, TMOD2, INPP5A and IGHG. | 08-01-2013 |
Patent application number | Description | Published |
20120328569 | INHIBITORS OF HEPATITIS C VIRUS NS5B POLYMERASE - Disclosed are compounds of formula (I) that are used as hepatitis C virus (HCV) NS5B polymerase inhibitors, the synthesis of such compounds, and the use of such compounds for inhibiting HCV NS5B polymerase activity, for treating or preventing HCV infections and for inhibiting HCV viral replication and/or viral production in a cell-based system. | 12-27-2012 |
20140199263 | HETEROCYCLIC-SUBSTITUTED BENZOFURAN DERIVATIVES AND METHODS OF USE THEREOF FOR THE TREATMENT OF VIRAL DISEASES - The present invention relates to compounds of formula (I) that are useful as hepatitis C virus (HCV) NS5B polymerase inhibitors, the synthesis of such compounds, and the use of such compounds for inhibiting HCV NS5B polymerase activity, for treating or preventing HCV infections and for inhibiting HCV viral replication and/or viral production in a cell-based system. | 07-17-2014 |
20140213571 | TETRACYCLIC HETEROCYCLE COMPOUNDS AND METHODS OF USE THEREOF FOR THE TREATMENT OF VIRAL DISEASES - The present invention relates to compounds of formula (I) that are useful as hepatitis C virus (HCV) NS5B polymerase inhibitors, the synthesis of such compounds, and the use of such compounds for inhibiting HCV NS5B polymerase activity, for treating or preventing HCV infections and for inhibiting HCV viral replication and/or viral production in a cell-based system. | 07-31-2014 |
20150246902 | SUBSTITUED BENZOFURAN COMPOUNDS AND METHODS OF USE THEREOF FOR THE TREATMENT OF VIRAL DISEASES - The present invention relates to compounds of formula (I) that are useful as hepatitis C virus (HCV) NS5B polymerase inhibitors, the synthesis of such compounds, and the use of such compounds for inhibiting HCV NS5B polymerase activity, for treating or preventing HCV infections and for inhibiting HCV viral replication and/or viral production in a cell-based system. | 09-03-2015 |
Patent application number | Description | Published |
20100143432 | Method for Protecting Wood Stacks from Infestation by Wood Pests - A method of protecting log dumps from attack by harmful organisms during storage, where the log dumps are largely covered with a sheet-like material (M), where this sheet-like material (M) has, as the result of impregnation with an insecticidal active ingredient, a protective activity against harmful organisms, which method can be employed in a simple fashion over large areas, in remote locations. | 06-10-2010 |
20120079625 | Method for protecting living plants from harmful insects via a sheetlike structure - The present invention provides a method for protecting living plants from harmful insects by using a sheetlike structure impregnated with an insecticide to cover the surface of the trunk, pseudotrunk, branch, root ball and/or root region of the plant. Additionally provided are living plants whose trunk, pseudotrunk, branch, root ball and/or root region surface is covered with a sheetlike structure impregnated with an insecticide. The invention also relates to a rectangular sheetlike structure impregnated with an insecticide and comprising a fastening means which, following tubular coverage of the surface of trunk, pseudotrunk or branch of a plant, allows a permanent hold thereto. It further relates to a sheetlike structure impregnated with an insecticide, in the form of a perforated sheet which has a continuous interruption between the outer and inner edges. Lastly, it also relates to the use of the sheetlike structure for protecting living plants from harmful insects. | 03-29-2012 |
Patent application number | Description | Published |
20090176692 | AMIDATED INSULIN GLARGINE - The invention relates to insulin glargine which is modified by amidation, especially Gly (A21), Arg (B31), Arg amide (B32) human insulin (insulin glargine amide). | 07-09-2009 |
20090192073 | METHOD FOR PRODUCING INSULIN ANALOGS HAVING A DIBASIC B CHAIN TERMINUS - The invention relates to a method for producing a type of insulin by genetically engineering a precursor thereof and converting said precursor to the respective insulin in an enzyme-catalyzed ligation reaction with lysine amide or arginine amide, or by lysine or arginine which is modified by protective groups, and optionally subsequent hydrolysis. | 07-30-2009 |
20100311112 | METHOD FOR AMIDATING POLYPEPTIDES WITH BASIC AMINO ACID C-TERMINALS BY MEANS OF SPECIFIC ENDOPROTEASES - The invention relates to a method for producing C-terminal amidated dibasic or polybasic peptides, consisting in reacting two peptides in the presence of trypsin biologically active enzymes and, if necessary, in purifying the thus obtainable compounds of formula (I) by means of protein chemistry. | 12-09-2010 |
20130203651 | PHARMACEUTICAL COMPOSITION FOR TREATING A METABOLIC SYNDROME - The invention is directed to a pharmaceutical composition containing at least one FGF-21 (fibroblast growth factor 21) compound, at least one GLP-1R (glucagon-like peptide-1 receptor) agonist and optionally at least one anti-diabetic drug and/or at least one DPP-4 (dipeptidyl peptidase-4) inhibitor for the treatment of at least one metabolic syndrome and/or atherosclerosis, in particular diabetes, dyslipidemia, obesity and/or adipositas. | 08-08-2013 |
20140073563 | FUSION PROTEINS FOR TREATING A METABOLIC SYNDROME - The invention is directed to a fusion protein comprising at least one FGF-21 (fibroblast growth factor-21) compound and at least one GLP-1R (glucagon-like peptide-1 receptor) agonist as well as to pharmaceutical compositions, medical uses and methods of treatment involving the fusion protein, particularly in the field of diabetes, dyslipidemia, obesity and/or adipositas. | 03-13-2014 |
20140142023 | Pharmaceutical Composition for Treating A Metabolic Syndrome - The invention is directed to a pharmaceutical composition comprising at least one FGF-21 (fibroblast growth factor 21) compound, at least one GLP-1R (glucagon-like peptide-1 receptor) agonist and optionally at least one anti-diabetic drug and/or at least one DPP-4 (dipeptidyl peptidase-4) inhibitor for the treatment of at least one metabolic syndrome and/or atherosclerosis, in particular diabetes, dyslipidemia, obesity and/or adipositas. The invention is also directed to a pharmaceutical composition comprising at least one FGF-21 (fibroblast growth factor 21) compound, at least one DPP-4 (dipeptidyl peptidase-4) inhibitor and optionally GLP-1R (glucagon-like peptide-1 receptor) agonist and/or at least one at least one anti-diabetic drug for the treatment of at least one metabolic syndrome and/or atherosclerosis, in particular diabetes, dyslipidemia, obesity and/or adipositas. | 05-22-2014 |
Patent application number | Description | Published |
20090005299 | Method For Producing Carboxy-Terminal-Amidified Peptides - The invention relates to the production of carboxy-terminal (C-terminal) amidified peptides with C-terminal amidified lysin, in particular with the biological activity of GLP-1, the chemical and/or biotechnological precursors and intermediate products thereof. The invention also relates to a method for the production and use thereof for producing pharmaceutical products. | 01-01-2009 |
20110077197 | NOVEL INSULIN DERIVATIVES HAVING AN EXTREMELY DELAYED TIME-ACTION PROFILE - The invention relates to novel insulin analogs having a basal time-action profile, which are characterized by the following features: a) the B chain end consists of an amidated basic amino acid residue such as lysine or arginine amide; b) the N-terminal amino acid residue of the insulin A chain is a lysine or arginine radical; c) the amino acid position A8 is occupied by a histidine radical; d) the amino acid position A21 is occupied by a glycine radical; and e) one or more substitutions and/or additions of negatively charged amino acid residues are carried out in the positions A5, A15, A18, B-1, B0, B1, B2, B3 and B4. | 03-31-2011 |
20110173722 | NOVEL INSULIN DERIVATIVES HAVING AN EXTREMELY DELAYED TIME-ACTION PROFILE - The invention relates to novel insulin analogs having a basal time-action profile, which are characterized by the addition and/or substitution of negatively and positively charged amino acid residues and by an amidation of the C-terminal carboxy group of the B chain and histidine in position 8 of the insulin A chain. The invention also relates to the production and use thereof. | 07-14-2011 |
20150231210 | Pharmaceutical Composition for Treating a Metabolic Syndrome - The invention is directed to a pharmaceutical composition containing at least one FGF-21 (fibroblast growth factor 21) compound, at least one GLP-1R (glucagon-like peptide-1 receptor) agonist and optionally at least one anti-diabetic drug and/or at least one DPP-4 (dipeptidyl peptidase-4) inhibitor for the treatment of at least one metabolic syndrome and/or atherosclerosis, in particular diabetes, dyslipidemia, obesity and/or adipositas. | 08-20-2015 |
Patent application number | Description | Published |
20090250525 | THERMOSTAT VALVE - A thermostatic valve comprising a valve head and a flat, annular, elastomeric sealing element at the valve head, a valve spring mechanically biasing the valve member against a valve seat and a temperature-sensitive expansible element the valve member displacing the valve member against the valve spring, characterized by the valve head comprising at its circumference an annular groove, the flat annular sealing element being stamped out of an elastomer which swells in the presence of water, in particular an EPDM material, and exhibiting a thickness which is equal to or slightly less than the width of the annular groove. | 10-08-2009 |
20090278071 | PREMOUNTED UNIT OF A TUBE PORTION AND A THERMOSTAT VALVE - A premounted unit of a pipe stub and a thermostatic valve, said pipe stub comprising a valve seat mechanically biased by a valve spring against the valve seat and resting at its other end against a mating rest element, further comprising an expansible element which is configured between a segment of the pipe stub and the valve member and which opens the thermostatic valve as a function of temperature against the force of the valve spring, said unit further comprising a U-shaped retention yoke of which the central strip rests against the mating rest element and the legs can be connected to an annular cap element thereby recesses being constituted at mutually opposite sides at the inside of the annular cap element and the legs of the retention yoke being fitted at its ends with outwardly pointing hook elements that engage the recesses. | 11-12-2009 |
20090302254 | DEVICE FOR ACTUATION OF A VALVE - A valve operating means defined by the following features:
| 12-10-2009 |
20110198518 | THERMOSTAT VALVE - A thermostatic valve fitted with a housing which comprises at least two mutually apart coolant hookups, further with a thermally expansible device comprising a housing and a push-rod and resting on the housing and operating in concert with a valve element that in turn operates in concert with an annular valve seat, said valve seat being situated between the two hookups, and a spring that biases the valve element toward the valve seat, characterized in that the valve element is in the form of an annular valve disk made by two-part injection molding, where one annular sealing portion is made of an elastomeric plastic and the remaining valve disk is made of a hard plastic, the outer sealing portion cooperating with the valve seat and the inner sealing portion cooperating in sealing manner with a housing of the thermally expansible device when said thermally expansible device is received in the aperture of the annular valve disk. | 08-18-2011 |
20110232591 | COOLING SYSTEM FOR A COMBUSTION ENGINE - A coolant circuit includes a first pipe segment, a second pipe segment, and a seal between the pipe segments which are displaceable relative to each other. A resilient locking tang runs parallel to the first pipe segment and has a detent element. An elongated guide portion runs parallel to and is spaced from the locking tang between the pipe segment and the locking tang. Spaced-apart arms run parallel to the second pipe segment beyond the end of this second pipe segment. An axially parallel web is configured between the arms and is fitted at its end facing the second sub-assembly with a detent shoulder which is engaged from behind by the resilient detent element when the pipe segments are plugged into each other. The resilient tang is received at a closed fit between the arms, and the elongated guide portion is guided by the arms. | 09-29-2011 |