Patent application number | Description | Published |
20090106472 | Virtual SATA port multiplier, virtual SATA device, SATA system and data transfer method in a SATA system - A virtual SATA port multiplier and a virtual SATA device are provided for a SATA system. The virtual SATA port multiplier uses a SATA physical layer for data transfer between it and a SATA host, and a non-physical layer for direct data transfer between it and the virtual SATA device. Since the data transfer between the virtual SATA port multiplier and the virtual SATA device is not carried out by way of SATA physical layers, no physical layer circuits are required accordingly, thereby reducing the manufacturing cost, power consumption and hardware size of the SATA system. | 04-23-2009 |
20090164698 | Nonvolatile storage device with NCQ supported and writing method for a nonvolatile storage device - A nonvolatile storage device buffers multiple write commands and selects one or more therefrom according to a choosing policy to execute in priority, so as to increase the probability of continuously executing write commands corresponding to an identical smallest erasable unit, thereby reducing the frequency of backup, erasing and copyback operations and improving the efficiency of the nonvolatile storage device. | 06-25-2009 |
20090198882 | METHOD OF WEAR LEVELING FOR NON-VOLATILE MEMORY AND APPARATUS USING THE SAME - A method of wear leveling for a non-volatile memory is disclosed. A non-volatile memory is divided into windows and gaps, with each gap between two adjacent windows. The windows comprise physical blocks mapped to logical addresses, and the gaps comprise physical blocks not mapped to logical addresses. The windows are shifted through the non-volatile memory in which the mapping to the physical blocks in the window to be shifted is changed to the physical blocks in the gap. | 08-06-2009 |
20090198919 | A Non-Volatile Memory Device, and Method of Accessing a Non-Volatile Memory Device - A non-volatile memory device, and a method for accessing the non-volatile memory device are provided. The non-volatile memory device is connected to a host via a bus. The non-volatile memory device comprises an MCU. By independently processing the particular commands using only the auxiliary circuit, the MCU can cease to operate, thus saving power. By setting the bus into power saving mode when the non-volatile memory device is busy, the host and the non-volatile memory device would not communicate mutually, thus, saving power. | 08-06-2009 |
20090198944 | SEMICONDUCTOR MEMORY DEVICE - An adaptive semiconductor memory device is used for being inserted into a host for storage. The semiconductor memory device comprises a non-volatile memory and a switch. The switch can be a logical switch or a physical switch that controls the semiconductor memory device to be in compliance with either a first specification version or a second specification version of the semiconductor memory device. The second specification version in comparison with the first specification version is used for higher capacity applications. | 08-06-2009 |
20090259819 | METHOD OF WEAR LEVELING FOR NON-VOLATILE MEMORY - A method of wear leveling for a non-volatile memory is performed as follows. First, the non-volatile memory is divided into a plurality of zones including at least a first zone and a second zone. The first zone is written and/or erased in which one or more logical blocks have higher writing hit rate, and therefore the corresponding physical blocks in the first zone will be written more often. The next step is to find one or more free physical blocks in second zone. The physical blocks of the first zone are replaced by the physical blocks of the second zone if the number of write and/or erase to the first zone exceeds a threshold number. The replacement of physical blocks in the first zone by the physical blocks in the second zone may include the steps of copying data from the physical blocks in the first zone to the physical block in the second zone, and changing the pointer of logical blocks to point to the physical blocks in the second zone. | 10-15-2009 |
20100030933 | NON-VOLATILE MEMORY STORAGE DEVICE AND OPERATION METHOD THEREOF - A non-volatile memory storage device has a non-volatile memory, e.g., a flash memory, and a controller coupled to the non-volatile memory. The controller comprises a plurality of control circuits and an arbitration circuit. Each control circuit is configured to generate a request to update the chip-enable (CE) signals for non-volatile memory, and the arbitration circuit is configured to determine when the requests are acknowledged. The arbitration circuit generates acknowledge signals to the control circuits when all of the requests of the control circuits have been received by the arbitration circuit. The CE signals for non-volatile memory are updated when requests are acknowledged. | 02-04-2010 |
20100061150 | Logged-based flash memory system and logged-based method for recovering a flash memory system - A flash memory system includes a path selector to determine to write to a non-volatile memory, a volatile memory or both the non-volatile memory and the volatile memory when the flash memory system is to write data. A record is stored in the non-volatile memory which is updated the status of the non-volatile memory after each one or more writing operations. When the flash memory system is powered on after a power loss, it could be recovered to a command executed prior to the power loss or to any checkpoint prior to the power loss by using the record. | 03-11-2010 |
20100088458 | OPERATION METHOD OF MEMORY - An operation method of a memory includes the steps of calculating an offset of sequential write commands and the beginning of pages of a block of a non-volatile memory; shifting the block by the offset; and directly writing data from a host to the pages except the first and last pages of the block by the sequential write commands. In an embodiment, the pages are logical pages providing optimal writing efficiency and are determined before calculating the offset. The step of shifting the block by the offset is to increase corresponding logical block addresses (LBA) in the pages by the offset. | 04-08-2010 |
20100100663 | Method of Performing Wear Leveling with Variable Threshold - A wear leveling limit and/or an overall erase count threshold used for activating wear leveling in a non-volatile memory may be adjusted by determining a stage according to a highest erase count, and determining the wear leveling limit and/or the overall erase count threshold corresponding to the stage. Wear leveling may then be performed according to the wear leveling limit and/or the overall erase count threshold. | 04-22-2010 |
20100115213 | MEMORY APPARATUS AND MEMORY MANAGEMENT METHOD OF THE SAME - A method of memory management for an apparatus having a non-volatile memory and a volatile memory includes the steps of forming a tree structure of entries in the volatile memory, in which the tree structure has a left branch and a right branch, and a difference of heights of the left branch and the right branch is equal to or less than one; and accessing an entry in the volatile memory through the tree structure. | 05-06-2010 |
20100232223 | Defective block handling method for a multiple data channel flash memory storege device - The block groups of a multiple data channel flash memory storage device are detected for defective blocks. The block group containing any defective blocks is divided into subgroups, each of which contains only defective blocks or only good blocks. The subgroups containing only good blocks are selected to establish a new block group having the same amount of blocks as that of the original block groups. | 09-16-2010 |
20100293309 | Production Tool For Low-Level Format Of A Storage Device - A production tool for low-level format of a storage device is disclosed. The production tool includes an input connector connectable and an output connector, both of which conform to an interface standard. At least a redundant pin of the input connector is unconnected with a corresponding redundant pin of the output connector, and the redundant pin of the output connector is electrically connected to receive a provided predetermined signal, the presence of which indicating a low-level format mode. | 11-18-2010 |