Patent application number | Description | Published |
20110181936 | OPTICAL MODULATOR - Optical modulator having wide bandwidth based on Fabry-Perot resonant reflection is disclosed. The optical modulator includes: a bottom Distributed Bragg Reflector (DBR) layer; a top DBR layer including at least one layer, and a modified layer; and an active layer disposed between bottom and top DBR layers, wherein the at least one layer includes at least one pair of a first refractive index layer having a first refractive index and a second refractive index layer having a second refractive index, the modified layer includes at least one pair of a third refractive index layer having a third refractive index and a fourth refractive index layer having a fourth refractive index, the third and the fourth refractive indexes being different, and at least one of the third and the fourth refractive index layers has a second optical thickness that is not λ/4 or that is not an odd multiple thereof. | 07-28-2011 |
20120140309 | OPTICAL IMAGE MODULATOR AND METHOD OF MANUFACTURING THE SAME - An optical image modulator and a method of manufacturing the same. The optical image modulator includes a substrate, an N electrode contact layer formed on the substrate, a lower distributed Bragg reflection (DBR) layer, a quantum well layer, an upper DBR layer, and a P electrode contact layer sequentially stacked on the N electrode contact layer, a P electrode formed on the P electrode contact layer, and an N electrode formed on the N electrode contact layer. The N electrode is a frame that surrounds the lower DBR layer. | 06-07-2012 |
20120162380 | OPTICAL MODULATOR USING MULTIPLE FABRY-PEROT RESONANT MODES AND APPARATUS FOR CAPTURING 3D IMAGE INCLUDING THE OPTICAL MODULATOR - An optical modulator that performs wide bandwidth optical modulation by using multiple Fabry-Perot resonant modes, and an apparatus for capturing a three-dimensional image including the optical modulator are provided. The optical modulator may include: a substrate; a first contact layer disposed on the substrate; a bottom distributed Bragg reflective (DBR) layer disposed on the first contact layer; an active layer disposed on the bottom DBR layer and includes a multiple quantum well layer; a top DBR layer disposed on the active layer; a cavity layer disposed in the top DBR layer; and a second contact layer disposed on the top DBR layer. Since the optical modulator achieves both a high contrast ratio and a wide bandwidth by using two or more Fabry-Perot resonant modes, the optical modulator may show a stable performance even when a resonant wavelength is changed during manufacture or due to an external environment such as temperature. | 06-28-2012 |
20130175500 | TRANSMISSIVE IMAGE MODULATOR INCLUDING STACKED DIODE STRUCTURE HAVING MULTI ABSORPTION MODES - A transmissive light modulator including a first reflection layer; a first active layer, arranged on the first reflection layer and including a plurality of quantum well layers and a plurality of barrier layers; a second reflection layer arranged on the first active layer; a second active layer, arranged on the second reflection layer and including a plurality of quantum well layers and a plurality of barrier layers; and a third reflection layer arranged on the second active layer, wherein the first reflection layer and the third reflection layer are each doped with a first type dopant, and the second reflection layer is doped with a second type dopant, which is electrically opposite to the first type dopant. | 07-11-2013 |
Patent application number | Description | Published |
20110031598 | SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF - A semiconductor device and a method of fabricating the same are disclosed. An interposer used for the semiconductor device includes integrated circuits therein to realize the functions of a decoupling capacitor, an ESD preventing circuit, an impedance matching circuit, and termination. Therefore, it is possible to improve the reliability of the operation of the semiconductor device. | 02-10-2011 |
20130109135 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE HAVING AN INTERPOSER | 05-02-2013 |
20150041324 | MICROFLUIDIC SENSOR PACKAGE STRUCTURE AND METHOD - In one embodiment, a microfluidic sensor device includes microfluidic sensor mounted on and electrically connected a micro lead frame substrate. The microfluidic sensor is molded to form a package body. The package body includes a molded panel portion and, in some embodiments, a mask portion having one or more open channels, sealed channels, and/or a sealed chamber exposing an active surface of the microfluidic sensor. The molded panel portions and mask portions are configured to allow a material to dynamically or statically contact the microfluidic sensor for analysis. | 02-12-2015 |
20150084185 | SEMICONDUCTOR DEVICE WITH A SEMICONDUCTOR DIE EMBEDDED BETWEEN AN EXTENDED SUBSTRATE AND A BOTTOM SUBSTRATE - A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive. | 03-26-2015 |
Patent application number | Description | Published |
20080291230 | IMAGE FORMING APPARATUS HAVING A MISSING NOZZLE DETECTION UNIT - An image forming apparatus including an image printing unit formed above a printing path along which an image is formed on a print medium. The printing unit has an array inkjet printhead with a length corresponding to the width of a print medium and includes a plurality of nozzles to eject ink. The multi-functional device also includes an image scanning unit formed above the image printing unit with a scanning unit formed on a document reading path to transfer a document to scan and read the document and a missing nozzle detection unit which forms a missing nozzle detection path that connects the printing path and the document reading path, and transports a print medium on which a test image is formed by the array inkjet printhead, to the document reading path via the missing nozzle detection path to scan the test image using the scanning unit. The image scanning unit and the missing nozzle detection unit also share the scanning unit. | 11-27-2008 |
20080316252 | INK-JET IMAGE FORMING APPARATUS - An ink-jet image forming apparatus includes a main body, an ink-jet head mounted in the main body and provided with a nozzle part, and a cleaning device mounted movably along the nozzle part to clean the nozzle part. The cleaning device includes a roller to supply a cleaning liquid to the nozzle part, and a wiper to wipe the nozzle part. The ink-jet head includes a cleaning liquid nozzle to supply the cleaning liquid to the roller, and a cleaning liquid storage part to store the cleaning liquid. | 12-25-2008 |
20100171788 | INK-JET PRINTER HAVING SUCTION FUNCTION AND METHOD OF OPERATING THE SAME - An inkjet printer having a suction function and a method of operating the inkjet printer includes a suction instrument that applies a suction force toward a platen so as to closely attach a printing medium to the platen during a printing operation and to suck spitted ink in a printing standby state. | 07-08-2010 |
20100177139 | INKJET IMAGE FORMING APPARATUS - An inkjet image forming apparatus including an array inkjet head including at least one head chip row, the at least one head chip having a plurality of head chips on which nozzles are formed; a light emitting unit including a light emitting device that is disposed on a first side of the head chip rows in a main scanning direction and radiates light; a light receiving unit including a light receiving device that is disposed on a second side of the head chip rows in the main scanning direction and faces the light emitting device to detect the light; and a malfunctioning nozzle detection unit that controls the array inkjet head to eject ink across the light and detects malfunctioning nozzles using detection signals received from the light receiving unit, wherein an alignment error angle between the light emitting unit and the light receiving unit is Arctan[(D−C)/A] or less when a length of the head chip rows in the main scanning direction is A, a gap between nozzles furthest from each other in a sub-scanning direction in one of the head chips is C, and a width of the light receiving unit is D. | 07-15-2010 |
Patent application number | Description | Published |
20090023183 | Method For Preparing Recombinant Peptide From Spider Venom and Analgesic Composition Containing The Peptide - The present invention relates to a method for producing a recombinant, spider toxin peptide and analgesic compositions containing said peptide. More specifically, the present invention relates to a method in which the gene for GsMTx4 is subcloned into a vector, so that it is linked to a secretion signal sequence of the alpha factor and under the control of methanol-inducible alcohol oxidase (AOX) promoter to construct a recombinant yeast expression plasmid. Yeast cells are transformed with this plasmid to produce the GsMTx4 peptide and analgesic compositions containing said peptide. The recombinant yeast expression system of the present invention affords a more stable method for producing GsMTx4 than its natural route. Thus the GsMTx4 peptide and its derivatives produced by the method of this invention can be used in the cure of related diseases such as heart failure as the peptide specifically inhibits mechanosensitive ion channels. | 01-22-2009 |
20100056456 | Omega Conotoxins - The present invention relates to a method for increasing the binding reversibility of a ω-conotoxin to a N-type calcium channel, which comprises preparing a ω-conotoxin having a Ile and/or Ala residue at a position of amino acid (11 and/or 12), respectively in the second loop between cysteine residues (2 and 3) of the ω-conotoxin represented by the formula I, such that the prepared ω-conotoxin has the increased binding reversibility to N-type calcium channel. In addition, the present invention relates to a novel ω-conotoxin and a pharmaceutical composition having plausible properties in view of blocking activity to and specificity to N-type calcium channel, and dramatically improved binding reversibility to N-type calcium channel. | 03-04-2010 |
20100216167 | METHODS FOR RELIEVING NEUROPATHIC PAIN BY MODULATING ALPHA 1G T-TYPE CALCIUM CHANNELS AND MICE LACKING ALPHA 1G T-TYPE CALCIUM CHANNELS - The present invention relates to a novel use of a transgenic mouse deficient in α1G T-type calcium channel as an animal model for the study of neuropathic diseases, more precisely, a novel use of a transgenic mouse having resistance against neuripathic pain as an animal model for the development of a therapeutic agent and a treatment method for human neuropathic diseases. The transgenic mouse deficient in α1G T-type calcium channel having resistance against neuropathic pain, provided by the present invention, can be effectively used for the development of a therapeutic agent and a treatment method for human neuropathic diseases. | 08-26-2010 |
20120015886 | METHOD FOR PREPARING RECOMBINANT PEPTIDE FROM SPIDER VENOM AND METHOD FOR RELIEVING PAIN - The present invention relates to a method for producing a recombinant, spider toxin peptide and analgesic compositions containing said peptide. More specifically, the present invention relates to a method in which the gene for GsMTx4 is subcloned into a vector, so that it is linked to a secretion signal sequence of the alpha factor and under the control of methanol-inducible alcohol oxidase (AOX) promoter to construct a recombinant yeast expression plasmid. Yeast cells are transformed with this plasmid to produce the GsMTx4 peptide and analgesic compositions containing said peptide. The recombinant yeast expression system of the present invention affords a more stable method for producing GsMTx4 than its natural route. Thus the GsMTx4 peptide and its derivatives produced by the method of this invention can be used in the cure of related diseases such as heart failure as the peptide specifically inhibits mechanosensitive ion channels. | 01-19-2012 |
Patent application number | Description | Published |
20080198287 | DISPLAY PANEL, METHOD FOR MANUFACTURING THE SAME, MOTHERBOARD FOR MANUFACTURING THE SAME AND METHOD FOR MANUFACTURING A DISPLAY SUBSTRATE FOR THE SAME - A display panel includes a first substrate, a thin-film transistor (TFT), an organic layer, a second substrate, a seal line, and a conductive pattern. The first substrate includes a pixel part and a driving part connected to the pixel part. The TFTs are formed in the pixel part and the driving part. The organic layer is formed on the first substrate having the TFTs formed thereon. The second substrate is opposite to the first substrate. The seal line is disposed between an edge portion of the first substrate having the organic layer formed thereon and an edge portion of the second substrate. The seal line combines the first substrate with the second substrate. The conductive pattern is disposed between the seal line and the organic layer. | 08-21-2008 |
20080204618 | DISPLAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY APPARATUS HAVING THE SAME - A display substrate includes a substrate, a guard ring and a connecting line. The substrate includes a plurality of active areas, and each of the active areas has a pixel area and a peripheral area. The guard ring is formed on the substrate to enclose each of the active areas, and is formed from substantially the same layer as a pixel electrode that is formed in a unit pixel. The connecting line is formed from a different layer than the guard ring, to electrically connect the guard ring with pads. The connecting line is formed before forming an organic insulating layer, and thus the frequency and/or severity of patterning defects of the connecting line may be reduced or prevented. Accordingly, short circuits between the pads may be prevented, and the corrosion resistance of the display apparatus may be increased. | 08-28-2008 |
20090278128 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD OF THE SAME - A thin film transistor array panel includes a substrate; a gate electrode formed on the substrate; a data line formed on the substrate; a gate insulating layer formed on the data line and the gate electrode, and having a first contact hole exposing the gate electrode, and a second contact hole exposing the data line; a gate line intersecting the data line, and connected to the gate electrode through the first contact hole; a semiconductor formed the gate insulating layer, and including a channel of a thin film transistor; a source electrode connected to the data line through the second contact hole; a drain electrode opposite to the source electrode with respect to the channel on the semiconductor; a passivation layer having a third contact hole exposing the drain electrode; and a pixel electrode connected to the drain electrode through the third contact hole are included. | 11-12-2009 |
20090322657 | ORGANIC LIGHT EMITTING DISPLAY AND FABRICATING METHOD THEREOF - A flat panel display according to an exemplary embodiment of the present invention includes a transistor disposed on a substrate, a planarizing layer having a trench, which includes a bottom surface and a side surface, disposed on the transistor, a reflective film disposed in the trench, a pixel electrode disposed on the reflective film and connected to the transistor, a partition wall having an opening to expose a portion of the pixel electrode, an organic light emitting member disposed on the reflective film, and a common electrode disposed on the organic light emitting member. | 12-31-2009 |
20100073266 | DISPLAY DEVICE AND METHOD OF DRIVING THE SAME - The present invention provides a display device and a method of driving the same. The display device includes: a light-emitting device; a first capacitor connected between a first contact point and a second contact point; a driving transistor including an input terminal connected to a first voltage, an output terminal, and a control terminal connected to the second contact point; a first switching transistor controlled by a first control signal and connected between a data voltage and the first contact point; a second switching transistor controlled by a second control signal and connected between a second voltage and the first contact point; a third switching transistor controlled by a third control signal and connected between the second contact point and the second voltage; a fourth switching transistor controlled by the first control signal and connected between the second contact point and the output terminal of the driving transistor; and a fifth switching transistor controlled by the second control signal and connected between the light-emitting device and the output terminal of the driving transistor. | 03-25-2010 |
Patent application number | Description | Published |
20120223300 | THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel and a manufacturing method capable of forming an insulating layer made of different materials for a portion contacting an oxide semiconductor and a second portion without an additional process. The thin film transistor array panel includes: a gate electrode; a source electrode and a drain electrode spaced apart from each other, each of the source and drain electrodes comprising a lower layer and an upper layer; an insulating layer disposed between the gate electrode and the source and drain electrodes; a semiconductor, the source electrode and the drain electrode being electrically connected to the semiconductor; a first passivation layer contacting the lower layer of the source and drain electrodes but not contacting the upper layer of the source and drain electrodes; and a second passivation layer disposed on the upper layer of the source and drain electrodes. The first passivation layer may be made of silicon oxide, and the second passivation may be made of silicon nitride. | 09-06-2012 |
20130092942 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes. | 04-18-2013 |
20130105826 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME | 05-02-2013 |
20130256652 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME - A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned. | 10-03-2013 |
20140054579 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A thin film transistor substrate includes a base substrate, an active pattern, a gate insulation pattern and a gate electrode. The active pattern is disposed on the base substrate. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode. The gate insulation pattern and the gate electrode overlap with the channel. The gate insulation pattern is disposed between the channel and the gate electrode. The source electrode and the drain electrode each include a fluorine deposition layer. | 02-27-2014 |
20140138671 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a base substrate, a data line disposed on the base substrate, a gate line crossing the data line, a first insulation layer disposed on the base substrate, an active pattern disposed on the first insulation layer and comprising a channel comprising an oxide semiconductor, a source electrode connected to the channel, and a drain electrode connected to the channel, a second insulation layer disposed on the active pattern, and contacting to the source electrode and the drain electrode, a gate electrode disposed on the second insulation layer, and overlapping with the channel, a passivation layer disposed on the gate electrode and the second insulation layer, and a pixel electrode electrically connected to the drain electrode through a first contact hole formed through the passivation layer and the second insulation layer. | 05-22-2014 |
20140138684 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME - A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned. | 05-22-2014 |
20140145178 | SWITCHING ELEMENT, DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A switching element includes an active pattern including a channel portion, a source portion connected to the channel portion, and a drain portion connected to the channel portion, the source portion, a gate electrode overlapping the channel portion of the active pattern, a gate insulation layer disposed between the channel portion of the active pattern and the gate electrode, a source electrode disposed on the source portion of the active pattern to make ohmic contact with the source portion, and a drain electrode disposed on the drain portion of the active pattern to make ohmic contact with the drain portion. The drain portion and the channel portion of the active pattern include the same or substantially the same material. | 05-29-2014 |
20140167040 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME - A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode. | 06-19-2014 |
20140183522 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel including a substrate; a channel region disposed on the substrate and including oxide semiconductor disposed on the substrate; a source electrode and a drain electrode connected to the oxide semiconductor and facing each other at both sides, centered on the oxide semiconductor; an insulating layer disposed on the oxide semiconductor; and a gate electrode disposed on the insulating layer. The drain electrode includes a first drain region and a second drain region; the charge mobility of the first drain region is greater than that of the second drain region, the source electrode includes a first source region and a second source region, and the charge mobility of the first source region is greater than that of the second source region. | 07-03-2014 |
20140361302 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes. | 12-11-2014 |
20140363921 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME - A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned. | 12-11-2014 |
20150021602 | THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel and a manufacturing method capable of forming an insulating layer made of different materials for a portion contacting an oxide semiconductor and a second portion without an additional process. Source and drain electrodes of the thin film transistor each include a lower layer and an upper layer. A first passivation layer contacts the lower layer of the source and drain electrodes but does not contact the upper layer of the source and drain electrodes, and a second passivation layer is disposed on the upper layer of the source and drain electrodes. The first passivation layer may be made of silicon oxide, and the second passivation may be made of silicon nitride. | 01-22-2015 |
20150069399 | THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF - A thin film transistor includes: a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer; and a pair of source region and drain region formed by doping both sides of the first semiconductor layer and the second semiconductor layer with impurities, and the source region includes a first source layer on the same plane as the first semiconductor layer and a second source layer on the same plane as the second semiconductor layer, and the drain region includes a first drain layer on the same plane as the first semiconductor layer and a second drain layer on the same plane as the second semiconductor layer, and only one of the first semiconductor layer and the second semiconductor layer is a transistor channel layer. | 03-12-2015 |
20150069401 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE THIN FILM TRANSISTOR SUBSTRATE - A thin film transistor substrate includes a base substrate, an active pattern provided on the base substrate and including a source electrode, a drain electrode and a channel between the source electrode and the drain electrode, a gate insulation layer provided on the active pattern, a gate electrode which is provided on the active pattern and overlaps the channel, a first contact pad disposed on at least one of the source electrode and the drain electrode and including a first metal, and a first non-conductive metal oxide layer on the base substrate to cover the gate electrode and including the first metal. | 03-12-2015 |
Patent application number | Description | Published |
20120327269 | CAMERA APPARATUS AND METHOD OF RECOGNIZING AN OBJECT BY USING A CAMERA - An apparatus and method of recognizing an object by using a camera includes detecting feature information from a first preview image; comparing the feature information with a threshold condition; changing a camera setting parameter, when the feature information does not satisfy the threshold condition; and performing an object recognition for a second preview image generated based on the changed camera setting parameter. | 12-27-2012 |
20130257858 | REMOTE CONTROL APPARATUS AND METHOD USING VIRTUAL REALITY AND AUGMENTED REALITY - Methods and apparatus are provided for using a virtual space map. The virtual space map is generated and displayed. Communication between a character of an actual space and a character on the virtual space map is controlled. | 10-03-2013 |
20130265311 | APPARATUS AND METHOD FOR IMPROVING QUALITY OF ENLARGED IMAGE - A method and apparatus for improving quality of an enlarged image are provided. The apparatus includes first and second image input units for outputting first and second images which are obtained by capturing the same subject at different positions spaced apart by a predetermined gap, a first image processor for converting a resolution of the first image to a preview resolution, a display for displaying the first image from the first image processor, a second image processor for, when an area to be enlarged in the displayed first image is selected, cropping an area corresponding to the selected area from the second image, and a controller for controlling the display to display the cropped area on the first image in an overlaying manner. Consequently, a user may view a high-magnification image cropped from a high-definition image and an original image together. | 10-10-2013 |
20140003661 | CAMERA APPARATUS AND METHOD FOR TRACKING OBJECT IN THE CAMERA APPARATUS | 01-02-2014 |
20140147493 | PCR-BASED GENE DELIVERY CARRIER AND METHOD FOR PREPARING THE SAME - Disclosed is an efficient carrier for gene delivery to cells based on PCR. The PCR-based gene delivery carrier includes: a shell composed of neutral liposomes; and template DNA and PCR components including polymerase, dNTPs and primers for amplification of the template DNA by PCR, within an inner space defined by the shell. The gene delivery carrier enhances the gene loading efficiency of neutral liposomes without cytotoxicity. Further disclosed is a method for preparing the gene delivery carrier. | 05-29-2014 |
20140232743 | METHOD OF SYNTHESIZING IMAGES PHOTOGRAPHED BY PORTABLE TERMINAL, MACHINE-READABLE STORAGE MEDIUM, AND PORTABLE TERMINAL - A system generates a synthesized image by combining content of a first image with content of a second image where both the first and second images are acquired by a portable terminal, The system identifies a portion of the second image, selects at least a part of the portion of the second image as a region of interest and generates a synthesized image by incorporating content of the first image in the region of interest. The method displays and stores the synthesized image. | 08-21-2014 |
20140232904 | COMBINING EFFECTIVE IMAGES IN ELECTRONIC DEVICE HAVING A PLURALITY OF CAMERAS - An image combining method in an electronic device having a plurality of cameras. In response to a photographing signal, images successively photographed through at least a first camera are successively stored. A first image is selected from the successively photographed images which satisfies a predetermined classification reference, such as a degree of blurring, a facial expression, and/or a shooting composition. A second image is captured through a second camera; and the first and second images are then combined. The combined image may be a picture-in-picture (PIP) type combination image. The first and second cameras may be front and rear cameras of a portable terminal, or vice versa. The successive image capture and selection technique may also be applied to the second camera. | 08-21-2014 |
20140270372 | ELECTRONIC DEVICE AND METHOD OF OPERATING THE SAME - A method and apparatus for image processing includes receiving images, detecting non-stationary objects in the images, displaying a first image that includes a non-stationary object, selecting a frame region including the non-stationary object in the first image, selecting a second image based on a low similarity with the first image, and replacing image data in the frame region of the first image with image data represented in the frame region of the second image. | 09-18-2014 |
20150062381 | METHOD FOR SYNTHESIZING IMAGES AND ELECTRONIC DEVICE THEREOF - A method of synthesizing images and an electronic device thereof is provided. The method of synthesizing images includes determining an object region for synthesizing a second image in a first image, determining a warping value of the object region, and synthesizing the second image deformed according to the warping value with the object region. | 03-05-2015 |
20150067554 | METHOD AND ELECTRONIC DEVICE FOR SYNTHESIZING IMAGE - A method and device for synthesizing an image are provided. The method includes obtaining a first image and a second image, determining at least one object in the first image, and synthesizing the second image with the determined at least one object. | 03-05-2015 |
Patent application number | Description | Published |
20110059564 | LED HAVING VERTICAL STRUCTURE AND METHOD FOR FABRICATING THE SAME - A light emitting diode (LED) having a vertical structure and a method for fabricating the same. The light emitting diode (LED) having a vertical structure includes a support layer; a first electrode formed on the support layer; a plurality of semiconductor layers formed on the first electrode; a conductive semiconductor layer formed on the plurality of semiconductor layers, and provided with an outer surface having a tilt angle of a designated degree; and a second electrode formed on the conductive semiconductor layer. | 03-10-2011 |
20120241770 | LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME - Disclosed are a light emitting device, a method for manufacturing the same, a light emitting device package, and a lighting system. The light emitting device includes a first conductive semiconductor layer, an active layer comprising a well layer and a barrier layer on the first conductive layer, and a second conductive semiconductor layer on the active layer. The well layer includes a first well layer closest to the first conductive semiconductor layer and having a first energy bandgap, a third well layer closest to the second conductive semiconductor layer and having a third energy bandgap, and a second well layer interposed between the first and third well layers and having a second energy bandgap. The third energy bandgap of the third well layer is greater than the second energy bandgap of the second well layer. | 09-27-2012 |
20130048944 | LIGHT EMITTING DEVICE - Disclosed are a light emitting device, a method of manufacturing the light emitting device, a light emitting device package and a lighting system. The light emitting device includes a first conductive semiconductor layer; an active layer including a quantum well and a quantum barrier and disposed on the first conductive semiconductor layer; and a second conductive semiconductor layer on the active layer. The active layer includes a first quantum well adjacent to the second conductive semiconductor layer, a second quantum well adjacent to the first quantum well, and a first quantum barrier between the first quantum well and the second quantum well. A recombination rate of electron-hole in the second quantum well is higher than the recombination rate of the electron-hole in the first quantum well, and the first quantum well has an energy level higher than the energy level of the second quantum well. | 02-28-2013 |
20140124810 | LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE PACKAGE HAVING THE SAME - A light emitting device includes a substrate and a plurality of protrusions protruding from a top surface of the substrate. A first semiconductor layer is provided on top surfaces of the protrusions and a plurality of seed patterns protrudes from a bottom surface of the first semiconductor layer toward the protrusions. A medium layer is provided between the protrusions and a light emitting structure on a top surface of the first semiconductor layer. The bottom surface of the first semiconductor layer is located at a higher position than that of each of the protrusions, and the first semiconductor layer contacts a c-plane of each protrusion. | 05-08-2014 |
Patent application number | Description | Published |
20090253186 | MICROORGANISM PRODUCING L-METHIONINE PRECURSOR AND THE METHOD OF PRODUCING L-METHIONINE PRECURSOR USING THE MICROORGANISM - The present invention relates to a microorganism producing L-methionine precursor, O-acetylhomoserine, and a method of producing L-methionine precursor using the microorganism. | 10-08-2009 |
20090253187 | MICROORGANISM PRODUCING L-METHIONINE PRECURSOR AND THE METHOD OF PRODUCING L-METHIONINE PRECURSOR USING THE MICROORGANISM - The present invention relates to a microorganism producing L-methionine precursor, O-succinylhomoserine, and a method of producing L-methionine precursor using the microorganism, | 10-08-2009 |
20110053252 | MICROORGANISM PRODUCING O-ACETYL-HOMOSERINE AND THE METHOD OF PRODUCING O-ACETYL-HOMOSERINE USING THE MICROORGANISM - Disclosed herein are a microorganism strain capable of producing the L-methionine precursor O-acetyl homoserine in high yield and a method of producing O-acetyl homoserine using the same. The microorganism strain is a strain of | 03-03-2011 |
20110053253 | MICROORGANISM PRODUCING O-ACETYL-HOMOSERINE AND THE METHOD OF PRODUCING O-ACETYL-HOMOSERINE USING THE MICROORGANISM - Disclosed is a strain of | 03-03-2011 |
20110207184 | MICROORGANISM PRODUCING L-METHIONINE PRECURSOR AND THE METHOD OF PRODUCING L-METHIONINE PRECURSOR USING THE MICROORGANISM - The present invention relates to a microorganism producing L-methionine precursor, O-acetylhomoserine, and a method of producing L-methionine precursor using the microorganism. | 08-25-2011 |
20130273614 | NOVEL O-ACETYLHOMOSERINE SULFHYDRYLASE OR MUTANT PROTEIN THEREOF, AND METHOD FOR CONVERTING TO METHIONINE USING THE SAME - The present invention relates to a novel protein having O-acetylhomoserine sulfhydrylase activity, a mutant protein thereof, a polynucleotide encoding the same, a recombinant vector comprising the polynucleotide, a microorganism transformed with the recombinant vector, and a method for producing methionine or acetic acid using the protein. The production method of the present invention has the advantage of producing L-methionine and acetic acid cost-effectively through having higher conversion rate and reduced reaction time compared to the existing methods, and it can minimize the amount of enzyme homogenate added when using the mutant protein, thereby easily producing L-methionine and acetic acid at high yield. | 10-17-2013 |
20130273615 | MODIFIED POLYPEPTIDE HAVING HOMOSERINE ACETYLTRANSFERASE ACTIVITY AND MICROORGANISM EXPRESSING THE SAME - The present invention relates to a polypeptide that is modified to have homoserine O-acetyltransferase activity, and in particular, the present invention provides a modified polypeptide having homoserine O-acetyltransferase activity, in which the amino acid at position 111 of a polypeptide having homoserine succinyltransferase activity is substituted with other amino acid. | 10-17-2013 |
20140315263 | METHOD FOR THE PREPARATION OF NICOTINIC ACID - A method for the preparation of nicotinic acid, which includes the step of obtaining a culture solution containing quinolinic acid by incubating a microorganism having an ability to produce quinolinic acid, and the step of adding an acid to the culture solution and conducting a decarboxylation reaction. | 10-23-2014 |
20150031093 | L-ASPARTATE OXIDASE VARIANT AND A METHOD FOR PRODUCING QUINOLINATE OR NICOTINIC ACID USING THE SAME - To produce quinolinate effectively, a L-aspartate oxidase variant that the feedback regulation by nicotinic acid or NAD is released, and a microorganism including the L-aspartate oxidase variant are provided. Quinolinate may be effectively produced by culturing of the microorganism including the L-aspartate oxidase variant. | 01-29-2015 |
Patent application number | Description | Published |
20110255045 | DISPLAY SUBSTRATE, LIQUID CRYSTAL DISPLAY INCLUDING THE DISPLAY SUBSTRATE, AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE - Provided are a display substrate, a liquid crystal display (LCD) including the display substrate, and a method of manufacturing the display substrate. The display substrate includes: an insulating substrate; a gate wiring formed on the insulating substrate and extending generally in a first direction; a data wiring which is insulated from the gate wiring, intersects the gate wiring, and which extends generally in a second direction; a pixel electrode formed in a pixel region defined by the gate wiring and the data wiring; and a storage wiring which is formed on the same layer as the gate wiring, is overlapped by the data wiring to be insulated from the data wiring, and which extends generally in the second direction, wherein each of the gate wiring and the storage wiring has a tapered surface oriented generally at an inclination angle of approximately 30 degrees or less with respect to the insulating substrate. | 10-20-2011 |
20130010239 | DISPLAY SUBSTRATE AND METHOD OF REPAIRING THE DISPLAY SUBSTRATE - A display substrate includes a first blocking pattern and a color filter pattern. The first blocking pattern defines a plurality of pixel areas on a base substrate. The plurality of pixel areas includes a first pixel area and a second pixel area disposed adjacent to each other along a first direction. The color filter pattern partially overlaps each of the first pixel area and the second pixel area, for providing tolerance against misalignment of the color filter pattern with respect to the first and second pixel areas along the first direction, thereby maintaining the reliability of a display panel that includes the display substrate. | 01-10-2013 |
20130043473 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a data line, a gate line and a fan-out line. The data line is disposed in a display area of a base substrate and transfers a data signal to a switching element electrically connected to a pixel electrode. The gate line is disposed in the display area and transfers a gate signal to the switching element. The fan-out line is disposed in a peripheral area of the base substrate surrounding the display area, electrically connected to at least one of the data line and the gate line, and includes a plurality of conductive layers making contact with each other through a contact hole. | 02-21-2013 |
20130076716 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines. | 03-28-2013 |
20130105803 | THIN FILM TRANSISTOR ARRAY PANEL | 05-02-2013 |
20130342782 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes: a first insulation substrate; a first gate conductor disposed on the first insulation substrate and in a same layer as a gate line and a second gate conductor disposed on the first insulation substrate and in the same layer as the gate line; a gate insulating layer disposed on the first gate conductor and the second gate conductor; a data conductor disposed on the gate insulating layer and in a same layer as a data line; a thin film transistor disposed on the first insulation substrate; a first spacer disposed on the first insulation substrate; and a second spacer disposed on the first insulation substrate, where heights or widths of the first and second spacers are different from each other and having different heights or widths, and the second spacer overlaps the first gate conductor and the second gate conductor. | 12-26-2013 |
20140247411 | LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - A liquid crystal display includes a plurality of pixel electrodes and common electrodes disposed on a first substrate that overlap each other with a passivation layer interposed therebetween, and a connection portion disposed between a common voltage applying unit and the common electrode. The common electrode has a plurality of first cutouts, the passivation layer has a plurality of second cutouts, and the first cutout and the second cutout have substantially the same planar shape. The connection portion includes a lower connection portion formed from a same layer as the common electrode, and an upper connection portion disposed on the lower connection portion that includes a low resistance metal. | 09-04-2014 |
20140340373 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines. | 11-20-2014 |
Patent application number | Description | Published |
20110278634 | LIGHT-EMITTING DEVICE AND LIGHTING APPARATUS - Disclosed is a light-emitting device including, a light-emitting structure including a first conductive semiconductor layer including at least a first region and a second region, and an active layer and a second conductive semiconductor layer formed in the first region, a first electrode formed on the first conductive semiconductor layer, and a second electrode formed on the second conductive semiconductor layer. Current spreading and drive voltage can be improved and luminous efficacy of the light-emitting device can be enhanced. | 11-17-2011 |
20120007129 | LIGHT EMITTING DEVICE - Disclosed is a light emitting device including a substrate, a light emitting structure arranged on the substrate, the light emitting structure including a first semiconductor layer, a second semiconductor layer and an active layer arranged between the first semiconductor layer and the second semiconductor layer, a first electrode electrically connected to the first semiconductor layer, and a second electrode electrically connected to the second semiconductor layer, wherein the light emitting structure has a top surface including a first side and a second side which face each other, and a third side and a fourth side which face each other. | 01-12-2012 |
20120153255 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE AND LIGHTING SYSTEM - Disclosed is a light emitting device, including: a substrate, a light emitting structure provided on the substrate, which includes a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer laminated in sequential order, a transmissive electrode layer arranged on the light emitting structure, an electrode provided on the light emitting structure. Here, the electrode includes a pad electrode and a finger electrode, and an insertion element is placed between the finger electrode and the second conductive semiconductor layer, wherein the insertion element is formed such that at least one region thereof overlaps with the finger electrode in a vertical direction. Since the insertion element is formed under the finger electrode, it is possible to prevent light emitted by the active layer from being absorbed by the finger electrode. Accordingly, luminous efficacy of the light emitting device may be further enhanced. | 06-21-2012 |
20130082299 | LIGHT EMITTING DEVICE - Disclosed is a light emitting device including a substrate, a light emitting structure arranged on the substrate, the light emitting structure including a first semiconductor layer, a second semiconductor layer and an active layer arranged between the first semiconductor layer and the second semiconductor layer, a first electrode electrically connected to the first semiconductor layer, and a second electrode electrically connected to the second semiconductor layer, wherein the light emitting structure has a top surface including a first side and a second side which face each other, and a third side and a fourth side which face each other. | 04-04-2013 |
Patent application number | Description | Published |
20110204403 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE, AND LIGHTING SYSTEM - Provided are a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a substrate, a light emitting structure layer, a second electrode, a first electrode, a contact portion, and a first electrode layer. The first electrode is disposed in the substrate from a lower part of the substrate to a lower part of a first conductive type semiconductor layer in a region under an active layer. The contact portion is wider than the first electrode and makes contact with the lower part of the first conductive type semiconductor layer. The first electrode layer is disposed under the substrate and connected to the first electrode. | 08-25-2011 |
20110220946 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE, AND LIGHTING SYSTEM - Provided is a light emitting device. The light emitting device includes a first conductive type semiconductor layer, an active layer on the first conductive type semiconductor layer, a second conductive type semiconductor layer on the active layer, an undoped semiconductor layer disposed on the second conductive type semiconductor layer and comprising a plurality of first holes, and a third conductive type semiconductor layer disposed on the undoped semiconductor layer and comprising a plurality of second holes. | 09-15-2011 |
20110233590 | LIGHT EMITTING DEVICE, METHOD FOR FABRICATING LIGHT EMITTING DEVICE, AND LIGHT EMITTING DEVICE PACKAGE - Provided are a light emitting device, a method for fabricating the light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a first conductive type semiconductor layer having a first top surface and a second top surface under the first top surface, an active layer on the first top surface of the first conductive type semiconductor layer, a second conductive type semiconductor layer on the active layer, a first electrode on the second top surface of the first conductive type semiconductor layer, an intermediate refractive layer on the second top surface of the first conductive type semiconductor layer, and a second electrode connected to the second conductive type semiconductor layer. | 09-29-2011 |
20110254035 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE, AND ILLUMINATION SYSTEM - Disclosed are a light emitting device, a light emitting device package, and an illumination system. The light emitting device includes a substrate; a light emitting structure layer including a first conductive type semiconductor layer formed on the substrate and having first and second upper surfaces, in which the second upper surface is closer to the substrate than the first upper surface, an active layer on the first conductive type semiconductor layer, and a second conductive type semiconductor layer on the active layer; a second electrode on the second conductive type semiconductor layer; and at least one first electrode extending at least from the second upper surface of the first conductive type semiconductor layer to a lower surface of the substrate by passing through the substrate. | 10-20-2011 |
20110309383 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE, AND LIGHTING SYSTEM - Provided are a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a crystalline substrate having a plurality of side surfaces, a light emitting structure layer comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer on the substrate, and a first electrode on the first conductive type semiconductor layer and a second electrode on the second conductive type semiconductor layer. An amorphous region is defined in a side surface of the substrate, and the amorphous regions of two sides adjacent to each other have different depths from a top surface of the substrate. | 12-22-2011 |
20130161585 | LIGHT EMITTING DEVICE - A light emitting device is disclosed. The light emitting device includes a light emitting structure including a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer, a light-transmissive conductive layer disposed on the second conductive-type semiconductor layer and having a plurality of open regions through which the second conductive-type semiconductor layer is exposed, and a second electrode disposed on the light-transmissive conductive layer so as to extend beyond at least one of the open regions, wherein the second electrode contacts the second conductive-type semiconductor layer in the open regions and contacts the light-transmissive conductive layer in regions excluding the open regions. | 06-27-2013 |
20150048405 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE, AND LIGHTING SYSTEM - Provided are a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a substrate, a light emitting structure layer, a second electrode, a first electrode, a contact portion, and a first electrode layer. The first electrode is disposed in the substrate from a lower part of the substrate to a lower part of a first conductive type semiconductor layer in a region under an active layer. The contact portion is wider than the first electrode and makes contact with the lower part of the first conductive type semiconductor layer. The first electrode layer is disposed under the substrate and connected to the first electrode. | 02-19-2015 |
Patent application number | Description | Published |
20110125324 | ROBOT CLEANER AND CONTROLLING METHOD OF THE SAME - A robot cleaner and a method of controlling a robot cleaner are provided. The robot cleaner is capable of automatically compensating for and adjusting a moving angle and a position using an appropriate sensor and control algorithm while performing a cleaning operation in a relatively large space. This may reduce a position error, allow a cleaning region to be effectively identified as a region to be cleaned or a region having already been cleaned, thus improving cleaning performance and efficiency. | 05-26-2011 |
20110264305 | ROBOT CLEANER AND REMOTE MONITORING SYSTEM USING THE SAME - A robot cleaner has a camera to generate an image of a cleaning area, a controller to prepare a cleaning map based on the image and to drive a robot cleaner, and a communicator to transmit the image and cleaning map to an external device and to receive a control command from the external device. The image and map may be transmitted over a local or wide area network, and the external device may be a computer, television, smart phone, portable phone, or other type of wireless access device. | 10-27-2011 |
20120106829 | ROBOT CLEANER AND CONTROLLING METHOD OF THE SAME - A robot cleaner and a method for controlling the same are provided. A region to be cleaned may be divided into a plurality of sectors based on detection data collected by a detecting device, and a partial map for each sector may be generated. A full map of the cleaning region may then be generated based on a position of a partial map with respect to each sector, and a topological relationship between the partial maps. Based on the full map, the robot cleaner may recognize its position, allowing the entire region to be completely cleaned, and allowing the robot cleaner to rapidly move to sectors that have not yet been cleaned. | 05-03-2012 |
20120232697 | ROBOT CLEANER AND CONTROLLING METHOD THEREOF - Disclosed are a robot cleaner capable of performing a cleaning operation by selecting a cleaning algorithm suitable for the peripheral circumstances based on an analysis result of captured image information, and a controlling method thereof. The robot cleaner comprises an image sensor unit configured to capture image information when an operation instructing command is received, and a controller configured to analyze the image information captured by the image sensor unit, and configured to control a cleaning operation based on a first cleaning algorithm selected from a plurality of pre-stored cleaning algorithms based on a result of the analysis. | 09-13-2012 |
Patent application number | Description | Published |
20110150423 | DIGITAL VIDEO MANAGING AND SEARCHING SYSTEM - A system for managing and searching for a digital video includes: a video feature point extraction unit decoding an input video and extracting a feature point; a video feature point database (DB) storing and managing a feature point of a video to be compared (i.e., a comparison target video), and a video feature point comparison unit coarsely comparing the feature point of the input video and that of the comparison target video to acquire a candidate group, and minutely comparing the candidate group to detect a content repeated section, and informing a user of the content repeated section. | 06-23-2011 |
20120150890 | METHOD OF SEARCHING FOR MULTIMEDIA CONTENTS AND APPARATUS THEREFOR - Provided are a method of searching for multimedia contents and an apparatus therefor. The method includes separating an audio signal from indexing target multimedia contents and performing pre-processing on the audio signal, extracting a silence period of the audio signal, extracting an audio feature in at least one predetermined length period after an end point of the silence period, storing at least two of information for the multimedia contents, the audio feature and the end point of the silence period, to be associated with each other, in a database, and receiving the audio feature of the multimedia contents and searching the database for multimedia contents having the same or a similar audio feature as the search target multimedia contents. | 06-14-2012 |
20120163475 | FAST MATCHING SYSTEM FOR DIGITAL VIDEO - A fast matching system for a digital video is provided. The fast matching system includes a video feature point extractor for extracting feature points of video frames of a digital video when the digital video is input, a feature point index mapper for receiving the video feature points from the video feature point extractor and configuring an index table by mapping the video feature points to a plurality of indices, a video feature point database (DB) for storing the index table, and a video feature point comparator for outputting video information corresponding to matched indices by comparing the video feature points extracted by the video feature point extractor with the indices of the index table stored in the video feature point DB. | 06-28-2012 |
Patent application number | Description | Published |
20090077032 | CALM CAPABLE OF SEARCHING AGENT SERVICE THROUGH WEB, AGENT SYSTEM USING THE SAME AND OPERATION METHOD OF AGENT SYSTEM - The present invention discloses a CALM capable of the client's determining the CALM storing a service rapidly and accurately, and searching the service by accessing the corresponding CALM, and service agent's preparing the base environment in which a service agent for providing the service the Web can inform a client of the service agent's service by enabling the client to access a CALM-based directory facilitator through a Web server, and an agent service using the CALM. | 03-19-2009 |
20110306303 | INPUT APPARATUS AND INPUT METHOD USING HUMAN BODY CONTACT - Provided are an input apparatus and an input method using a human body contact in which an electric current at a contacted part of a human body varies at different parts of the human body, and an input corresponding to the measured electric current is sensed. | 12-15-2011 |
20120150834 | CREATION SUPPORTING SYSTEM USING METADATA BASED ON USER AND INFORMATION PROVIDING METHOD THEREOF - Provided is a creation supporting system and method using user-based metadata. According to the creation supporting system and method, metadata collected by a user for video content are stored so as to be provided to a creator. The creation supporting system includes a user terminal configured to receive evaluation data on video content from a user who watched the video content; a utilizer terminal configured to receive a search value from a utilizer desiring a search and request a video content search; and a service providing server configured to receive the evaluation data from the user terminal, construct metadata of video content, and compare the search value received from the utilizer server with the metadata for searching for a corresponding video content. | 06-14-2012 |
20130236049 | INDOOR USER POSITIONING METHOD USING MOTION RECOGNITION UNIT - An indoor user positioning method including storing user information on a user terminal and user feature information detected from a feature detection device in a central server, detecting the position of the user terminal periodically and storing the detected position in a database, detecting by a motion recognition device attribute information on a user at the front thereof and transmitting the detected attribute information to the central server, extracting user terminals corresponding to the position of the user that the motion recognition device recognizes from the user terminals stored in the database in order to select target users, and comparing the user feature information on the target users stored in the database with the user attribute information that the motion recognition device transmits in order to specify a user at the front of the motion recognition device. | 09-12-2013 |
Patent application number | Description | Published |
20080303491 | SWITCHED-MODE POWER SUPPLY QUASI-RESONANT CONVERTER, SWITCH CONTROL CIRCUIT CONTROLLING SWITCHING OPERATIONS OF SWITCHED-MODE POWER SUPPLY QUASI-RESONANT CONVERTER, AND INPUT SIGNAL PROCESSING CIRCUIT CONNECTED TO CONTROL INTEGRATED CIRCUIT OF SWITCH CONTROL CIRCUIT - Aspects of the invention relate to a Switched-Mode Power Supply (SMPS) quasi-resonant converter, a switch control circuit controlling switching operations of the SMPS quasi-resonant converter, and an input signal processing circuit connected to a control Integrated Circuit (IC) of the switch control circuit. The SMPS quasi-resonant converter includes a switch and the switch control circuit. The switch control circuit includes a control integrated circuit (IC) to control operation of the switch; a Zener diode connected to an input terminal of the control IC; and a diode connected in series with the Zener diode. | 12-11-2008 |
20090040798 | SWITCHING MODE POWER SUPPLY APPARATUS AND POWER SUPPLY METHOD THEREOF - A switching mode power supply apparatus includes a conversion unit to convert input power into output power having a predetermined voltage by performing a switching operation; a light emitting unit to emit light if the voltage of the output power exceeds a predetermined threshold voltage; a light receiving unit to receive the light emitted from the light emitting unit and output a signal indicative of the voltage of the output power; a switching controller to control the switching operation of the conversion unit according to the voltage of the output power indicated by the signal output from the light receiving unit; and a disconnection unit to disconnect power applied to the light receiving unit if a voltage of the power applied to the light receiving unit exceeds a predetermined trigger voltage. | 02-12-2009 |
20090046483 | SWITCHED-MODE POWER SUPPLY AND POWER SUPPLYING METHOD THEREOF - A switched-mode power supply includes a converter to convert input power into output power having a predetermined voltage level by performing a switching operation; a switching controller to control the switching operation of the converter based on an indication of a voltage of the output power; and an output power voltage indicating unit to provide the indication of the voltage of the output power to the switching controller according to a characteristic of the output power voltage indicating unit that varies according to the size of a load receiving the output power converted by the converter. | 02-19-2009 |
20090316357 | METHOD OF ARRANGING COMPONENTS OF CIRCUIT BOARD FOR OPTIMAL HEAT DISSIPATION AND CIRCUIT APPARATUS HAVING COMPONENTS ARRANGED BY PERFORMING THE METHOD - A method of arranging a plurality of components of a circuit board for optimal heat dissipation and a circuit apparatus having a plurality of components arranged by performing the method are provided. The method includes arranging a predetermined number of the plurality of components in the order of size of the components in a heat dissipation area having a predetermined width on a virtual straight line connecting the air inlet unit and the air outlet unit. | 12-24-2009 |
20100046254 | ENERGY EFFECTIVE SWITCHING POWER SUPPLY APPARATUS AND AN ENERGY EFFECTIVE METHOD THEREOF - An energy effective switching power supply apparatus and an energy effective method thereof. The energy effective switching power supply apparatus includes a power transforming part having first and second coils to induce a voltage to the second coil using interactions between the first and the second coils with respect to the input voltage, a power outputting part to output a sensing signal when it is determined that a first DC voltage output by rectifying and smoothing the voltage induced to the second coil is greater than or equal to a reference voltage level, and a switching controlling part to adjust a switching frequency of a switching device to interrupt a current flowing in the first coil of the power transforming part when the sensing signal is received. Accordingly, a switching loss is controlled and an energy loss is reduced. | 02-25-2010 |
20110091233 | APPARATUS AND METHOD OF CONTROLLING POWER SUPPLY TO HEATING ROLLER AND PHASE CONTROL CIRCUIT CORRESPONDING TO THE APPARATUS AND METHOD - A method and an apparatus to control power supplied to a heating roller and a phase control circuit corresponding to the method or the apparatus. The phase control circuit may include an examination unit to compare levels of a sine wave having a predetermined first period and a switching signal to increase and decrease repeatedly according to a predetermined second period, and a phase control signal generation unit to generate a phase control signal having a non-zero in intervals of time sections including a time when levels of the switching signal and the sine wave which is in a decreasing section are equal to each other during a time period when the level of the sine wave is zero, and a time when levels of the switching signal and the sine wave which is in an increasing section are equal to each other during a time period when the level of the sine wave is zero. | 04-21-2011 |
20110248695 | Switching mode power supply apparatus and power supply method thereof - A switching mode power supply apparatus includes a conversion unit to convert input power into output power having a predetermined voltage by performing a switching operation, a light emitting unit to emit light if the voltage of the output power exceeds a predetermined threshold voltage, a light receiving unit to receive the light emitted from the light emitting unit and output a signal indicative of the voltage of the output power, a switching controller to control the switching operation of the conversion unit according to the voltage of the output power indicated by the signal output from the light receiving unit, and a disconnection unit to disconnect power applied to the light receiving unit if a voltage of the power applied to the light receiving unit exceeds a predetermined trigger voltage. | 10-13-2011 |
20120117798 | METHOD OF ARRANGING COMPONENTS OF CIRCUIT BOARD FOR OPTIMAL HEAT DISSIPATION AND CIRCUIT APPARATUS HAVING COMPONENTS ARRANGED BY PERFORMING THE METHOD - A method of arranging a plurality of components of a circuit board for optimal heat dissipation and a circuit apparatus having a plurality of components arranged by performing the method are provided. The method includes arranging a predetermined number of the plurality of components in the order of size of the components in a heat dissipation area having a predetermined width on a virtual straight line connecting the air inlet unit and the air outlet unit. | 05-17-2012 |
20130003239 | SWITCHING MODE POWER SUPPLY APPARATUS AND POWER SUPPLY METHOD THEREOF - A switching mode power supply apparatus includes a conversion unit to convert input power into output power having a predetermined voltage by performing a switching operation, a light emitting unit to emit light if the voltage of the output power exceeds a predetermined threshold voltage, a light receiving unit to receive the light emitted from the light emitting unit and output a signal indicative of the voltage of the output power, a switching controller to control the switching operation of the conversion unit according to the voltage of the output power indicated by the signal output from the light receiving unit, and a disconnection unit to disconnect power applied to the light receiving unit if a voltage of the power applied to the light receiving unit exceeds a predetermined trigger voltage. | 01-03-2013 |
20130156456 | APPARATUS AND METHOD OF CONTROLLING POWER SUPPLY TO HEATING ROLLER AND PHASE CONTROL CIRCUIT CORRESPONDING TO THE APPARATUS AND METHOD - A method and an apparatus to control power supplied to a heating roller and a phase control circuit corresponding to the method or the apparatus. The phase control circuit may include an examination unit to compare levels of a sine wave having a predetermined first period and a switching signal to increase and decrease repeatedly according to a predetermined second period, and a phase control signal generation unit to generate a phase control signal having a non-zero in intervals of time sections including a time when levels of the switching signal and the sine wave which is in a decreasing section are equal to each other during a time period when the level of the sine wave is zero, and a time when levels of the switching signal and the sine wave which is in an increasing section are equal to each other during a time period when the level of the sine wave is zero. | 06-20-2013 |
Patent application number | Description | Published |
20110163789 | DUTY CYCLE CORRECTION CIRCUIT AND METHOD FOR CORRECTING DUTY CYCLE AND SEMICONDUCTOR DEVICE INCLUDING THE DUTY CYCLE CORRECTION CIRCUIT - Provided are a duty cycle correction circuit and method for correcting a duty cycle, and a semiconductor device including the duty cycle correction circuit. The duty cycle correction circuit includes a code generator configured to generate a first and a second duty code for adjusting the duty cycle of a clock to a target duty cycle, and a duty cycle corrector including a plurality of inverter circuits connected in series and whose driving capabilities are adjusted in response to the first and second duty code, wherein the duty cycle corrector is configured to correct the duty cycle of the clock based on the driving capabilities of the inverter circuits and to output a corrected clock. | 07-07-2011 |
20110298513 | DUTY CORRECTING CIRCUIT, DELAY-LOCKED LOOP CIRCUIT AND METHOD OF CORRECTING DUTY - The duty correcting circuit includes a duty cycle corrector, a duty detector and a duty correction code generator. The duty cycle corrector corrects a duty cycle of an input clock signal to generate an output clock signal. The duty detector adjusts a delay time of the output clock signal to generate a sampling clock signal, samples the output clock signal in response to the sampling clock signal to generate sample data, and detects a duty of the output clock signal based on logic states of the sample data. Therefore, the duty correcting circuit precisely detects and corrects a duty of the output clock signal. | 12-08-2011 |
20120086486 | PHASE INTERPOLATOR AND DELAY LOCKED-LOOP CIRCUIT - A phase interpolator includes a delay difference detector and a phase interpolation driver. The delay difference detector receives a delay code to detect a delay difference. The phase interpolation driver includes two or more driver blocks complementarily operating, and the phase interpolation driver interpolate two input signals in response to the delay difference to provide an interpolated output signal. Each of two or more driver blocks includes a plurality of unit drivers, each input of the unit drivers is commonly connected, and each delay of the two or more driver blocks is varied according to the delay difference. | 04-12-2012 |
20130223179 | DELAY LOCKED LOOP CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME - A delay locked loop (DLL) circuit having improved noise characteristics. The DLL circuit includes a first divider for generating a first divided signal by dividing an external clock; a second divider for generating a second divided signal by dividing an internal clock; a phase detector for detecting a phase difference between the first divided signal and the second divided signal; and an adjusting unit for synchronizing the internal clock and the external clock, based on the phase difference. | 08-29-2013 |
20140266351 | DELAY-LOCKED LOOP CIRCUIT AND METHOD OF CONTROLLING THE SAME - A delay-locked loop circuit includes a phase detector and a coarse-lock detector. The phase detector receives a feedback clock and a first clock to generate first and second phase detecting signals, respectively. The coarse-lock detector generates a coarse-lock signal based on changes of phase of the first and second phase detecting signals. | 09-18-2014 |
20140269119 | SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE HAVING DELAY LOCKED LOOP CIRCUIT AND METHOD OF CONTROLLING THE DELAY LOCKED LOOP CIRCUIT - An operating method of a delay locked loop (DLL) circuit for a semiconductor memory device is disclosed. The DLL circuit may include a plurality of sub-circuits. The method may include calculating an additive latency value based on predetermined parameters, and controlling a set of the plurality of sub-circuits of the DLL circuit to be maintained in a turn-off state based on the calculated additive latency value, during a period of time after the semiconductor device receives an operation command in a power saving mode. | 09-18-2014 |