Patent application number | Description | Published |
20130194213 | TOUCH-SENSING PANEL AND TOUCH-SENSING DISPLAY APPARATUS - A touch-sensing panel including a substrate, a plurality of first electrode series, a plurality of second electrode series, and a plurality of first floating patterns is provided. Each of the first electrode series includes a plurality of first touch-sensing pads and a plurality of first bridge patterns. The second electrode series are disposed on the substrate and electrically insulated from each other. The second sensing series are intersected with and electrically insulated from the first sensing series. Each of the second electrode series includes a plurality of second touch-sensing pads and a plurality of second bridge patterns. The first floating patterns are disposed between the first sensing series and the second sensing series. Each of the first touch-sensing pads includes at least one extending portion. In addition, there is no first floating pattern located between the extending portion and the second electrode series adjacent thereto. | 08-01-2013 |
20130240886 | ACTIVE DEVICE AND ACTIVE DEVICE ARRAY SUBSTRATE - An active device and an active device array substrate are provided, wherein the active device array substrate includes a substrate and a plurality of active devices being located on the substrate, and at least one of the active devices includes a first thin film transistor and a second thin film transistor. The first thin film transistor is located on the substrate and has a first channel layer. The second thin film transistor stacks on the first thin film transistor, wherein the second thin film transistor has a second channel layer. The first thin film transistor and the second thin film transistor share a common gate electrode and the common gate electrode is located between the first channel layer and the second channel layer. | 09-19-2013 |
20130301195 | TOUCH DISPLAY DEVICE AND DRIVING METHOD THEREOF - A touch display device includes a display panel, a plurality of first sensing-series and a plurality of second sensing-series. The display panel includes a first substrate, a second substrate, a plurality of pixel structures and the display medium located between the first substrate and the second substrate. The first sensing-series are on the first substrate. The second sensing-series are on the second substrate. | 11-14-2013 |
20140152915 | TOUCH PANEL - A touch panel includes a substrate, a plurality of first and second conductive series, and a plurality of first and second auxiliary electrodes. The first and the second conductive series are disposed alternately on the substrate and located on a light-transmission area of the substrate. A portion of each of the first and second conductive series extends to a peripheral area of the substrate. The first and the second auxiliary electrodes are disposed on the peripheral area. The first auxiliary electrodes connect to the portion of the first conductive series extending to the peripheral area and generate capacitive sensing with the portion of the second conductive series located on the peripheral area. The second auxiliary electrodes connect to the portion of the second conductive series extending to the peripheral area and generate capacitive sensing with the portion of the first conductive series located on the peripheral area. | 06-05-2014 |
20140184951 | TOUCH DISPLAY DEVICE - A touch display device includes a cover substrate, a display panel, a plurality of first touch electrodes, a plurality of first connecting pads, and a first conductive adhesive material. A visible region and a peripheral region adjacent to at least one side of the visible region are defined on the cover substrate. The display panel includes an upper substrate and an array substrate. The upper substrate is disposed between the cover substrate and the array substrate. The first touch electrodes are disposed in the visible region and the first connecting pads are disposed in the peripheral region. Each first connecting pad is electrically connected to the corresponding first touch electrode. The first conductive adhesive material is disposed between the cover substrate and the array substrate so as to electrically connect the first connecting pads and the array substrate. | 07-03-2014 |
20140293163 | TOUCH PANEL - A touch panel including a carrier component, a plurality of first electrode series and a plurality of second electrode series is provided. Each first electrode series includes a plurality of first electrodes connected in series in a first direction. Each second electrode series includes a plurality of second electrodes connected in series in a second direction. In a unit sensing area arbitrarily selected on the touch panel, a ratio of the unit sensing area occupied by each of the first electrodes to the unit sensing area occupied by each of the second electrodes is 1:1.2 to 1:1.4, wherein a length and a width of the unit sensing area are equal to pitches of the first electrodes in the first direction and the second direction respectively. | 10-02-2014 |
20140346027 | TOUCH PANEL - A touch panel, having a viewing region and a peripheral region adjacent to at least one edge of the viewing region, includes a plurality of first axis electrodes, a plurality of second axis electrodes, and a plurality of first traces. The first axis electrodes are disposed in the viewing region and extend along a first direction. The second axis electrodes are disposed in the viewing region and extend along a second direction. The first direction is not parallel to the second direction. The first traces are at least partially disposed in the viewing region. Each of the first traces is electrically connected to at least one of the first axis electrodes. The first traces extend from the viewing region to the peripheral region. | 11-27-2014 |
20140347319 | TOUCH PANEL - A touch panel, having a center region and a peripheral region disposed on at least one side of the center region, includes a first electrode. The first electrode includes a plurality of first sub-electrodes and a plurality of second sub-electrode. The first sub-electrodes are disposed in the center region, and the second sub-electrodes are disposed on the peripheral region. A pattern density of the second sub-electrodes in the peripheral region is higher than a pattern density of the first sub-electrodes in the center region. | 11-27-2014 |
20150085205 | TOUCH PANEL - A touch panel includes a substrate, a plurality of first conductive elements, and a plurality of second conductive elements. Each of the first conductive elements includes a plurality of first conductive patterns and a plurality of first connection portions alternately connected with each other. The first conductive elements and the second conductive elements are intersected with each other and electrically insulated. Each of the second conductive elements includes a plurality of intersection portions respectively intersected with the first connection portions of each of the first conductive elements. A linewidth of the intersection portions is W1, and 100 μm03-26-2015 | |
Patent application number | Description | Published |
20150036045 | Imaging Lens, and Electronic Apparatus Including the Same - An imaging lens includes first to fifth lens elements arranged from an object side to an image side in the given order. Through designs of surfaces of the lens elements and relevant optical parameters, a short system length of the imaging lens may be achieved while maintaining good optical performance. | 02-05-2015 |
20150098010 | OPTICAL IMAGING LENS AND ELECTRONIC DEVICE INCLUDING THE LENS - An imaging optical lens includes, in order from object side to image side, an aperture stop, first, second, third, fourth, and fifth lens elements, each of the five lens elements having an object side surface and an image side surface. The object side surface of the first lens element is convex along an optical axis. The image-side surface of the second lens element concave in the vicinity of an outer circumference. The object side of the fourth lens element is convex in the vicinity of the outer circumference. The image side surface of the fifth lens element is concave in the vicinity of the optical axis and convex in the vicinity of the outer circumference. The first, second, third, fourth, and fifth lens elements have a refractive power. The thicknesses of the first, second, third, fourth, and fifth lens elements and the air gaps between them satisfy specific conditions. | 04-09-2015 |
20150177482 | OPTICAL IMAGING SYSTEM AND ELECTRONIC APPARATUS INCLUDING THE SAME - An imaging optical system includes, in order from the object side to the image side, a first lens element, a second lens element, a third lens element, an aperture stop, a fourth lens element, a fifth lens element, and a sixth lens element arranged along an optical axis. The first lens element has a concave image-side surface in the vicinity of the optical axis. The second lens element has a negative refractive power. The third lens element has a convex object-side surface in a vicinity of an optical axis. The fourth lens element has a convex object-side surface in the vicinity of the optical axis. The fifth lens element has a convex image-side surface in the vicinity of the optical axis. The sixth lens element is made of plastic and has a convex image-side surface in a vicinity of an outer circumference. | 06-25-2015 |
20150177484 | OPTICAL IMAGING LENS AND ELETRONIC DEVICE COMPRISING THE SAME - An optical imaging lens includes a first, second, third, fourth, fifth and sixth lens element, the first lens element having an image-side surface with a concave part in a vicinity of its periphery, the second lens element having an object-side surface with a convex part in a vicinity of its periphery, the third lens element having an image-side surface with a convex part in a vicinity of its periphery, the fourth lens with positive refractive power, the fifth lens element having an object-side surface with a concave part in a vicinity of its periphery, the sixth lens element having an image-side surface with a convex part in a vicinity of its periphery, wherein the optical imaging lens set does not include any lens element with refractive power other than said first, second, third, fourth, fifth and sixth lens elements. | 06-25-2015 |
20150177485 | CAMERA DEVICE AND OPTICAL IMAGING LENS THEREOF - The present invention provides a camera device and an optical imaging lens thereof. The optical imaging lens comprises six lens elements positioned in an order from an object side to an image side. Through controlling the convex or concave shape of the surfaces of the lens elements, the view angle of the optical imaging lens is efficiently increased to shows better optical characteristics. | 06-25-2015 |
20150253540 | OPTICAL IMAGING LENS AND ELECTRONIC DEVICE COMPRISING THE SAME - An optical imaging lens includes: a first, second, third, fourth, fifth and sixth lens element, the first lens element with positive refractive power, the second lens element having an object-side surface with a concave part in a vicinity of its periphery and an image-side surface with a concave part in a vicinity of its periphery, the fourth lens element having an image-side surface with a convex part in a vicinity of the optical axis, the fifth lens element having an object-side surface with a convex part in a vicinity of the optical axis and an image-side surface with a concave part in a vicinity of the optical axis, the sixth lens element having an image-side surface with a convex part in a vicinity of its periphery, and the sixth lens element being made of plastic. | 09-10-2015 |
20150253541 | Imaging Lens, and Electronic Apparatus Including the Same - An imaging lens includes first to sixth lens elements arranged from an object side to an image side in the given order. Through designs of surfaces of the lens elements and relevant lens parameters, a short system length of the imaging lens may be achieved while maintaining good optical performance. | 09-10-2015 |
20150260952 | OPTICAL IMAGING LENS AND ELECTRONIC DEVICE COMPRISING THE SAME - An optical imaging lens includes: a first, second, third, fourth, fifth and sixth lens element, the first lens element has negative refractive power, the second lens element has negative refractive power, the third lens element has refractive power, the fourth lens element having an image-side surface with a convex portion in a vicinity of the optical axis, the fifth lens element having an image-side surface with a convex portion in a vicinity of the optical axis, and the sixth lens element having an image-side surface with a concave portion in a vicinity of its periphery, wherein the optical imaging lens set does not include any lens element with refractive power other than said first, second, third, fourth, fifth and sixth lens elements. | 09-17-2015 |
20150260960 | MOBILE DEVICE AND OPTICAL IMAGING LENS THEREOF - The present invention provides a camera device and an optical imaging lens thereof. The optical imaging lens comprises six lens elements positioned in an order from an object side to an image side and an aperture stop positioned between the third and fourth lens elements. Through controlling the convex or concave shape of the surfaces of the lens elements, the optical imaging lens shows better optical characteristics and the total length of the optical imaging lens is shortened. | 09-17-2015 |
20160116713 | OPTICAL IMAGING LENS AND ELETRONIC DEVICE COMPRISING THE SAME - An optical imaging lens includes: a first, second and third lens element. The first lens element has a positive refracting power, and has an object-side surface with a convex part in a vicinity of the optical axis, and a convex part in a vicinity of its periphery. The second lens element has a positive refracting power, and has an object-side surface with a concave part in a vicinity of the optical axis, and a concave part in a vicinity of its periphery, and has an image-side surface with a convex part in a vicinity of the optical axis. The third lens element has negative refracting power, and has an image-side surface with a concave part in a vicinity of the optical axis, and a convex part in a vicinity of its periphery. | 04-28-2016 |
Patent application number | Description | Published |
20090178758 | METHOD OF ARRANGING STACKED CHIP BY PHOTO-CURING ADHESIVE - A method of arranging stacked chips by photo-curing adhesive includes the steps of disposing a first chip on a top side of a substrate and electrically connecting the first chip to the substrate by wire bonding; forming a photo-curing adhesive layer on a top side of the first chip; hardening the photo-curing adhesive layer by irradiation to convert it from colloid to solid for 70-80% degree of solidification; softening the photo-curing adhesive layer by heating of 50-80° C. to convert it from solid to semisolid to enable the photo-curing adhesive layer to be adherent; disposing a second chip on a top side of the photo-curing adhesive layer, then converting the photo-curing adhesive layer from semisolid to complete solid by heating of 100-150° C., and finally electrically connecting the second chip to the substrate by wire bonding. | 07-16-2009 |
20090186450 | IC PACKAGING PROCESS BY PHOTO-CURING ADHESIVE - A IC packaging process includes the steps of mounting at least one retaining member on a top side of a substrate, the retaining member defining a receiving space, a chip being mounted to the substrate and located in the receiving space; forming a photo-curing adhesive layer in the receiving space, the photo-curing adhesive layer being capable of shielding the chip completely; irradiating and developing the photo-curing adhesive layer to harden a part of the photo-curing adhesive layer to define a hardened portion thereof, the other part of the photo-curing adhesive layer defining a non-hardened portion corresponding to the chip; and removing the non-hardened portion to expose an active portion of the chip. | 07-23-2009 |
20090236712 | IC PACKAGE HAVING REDUCED THICKNESS - An IC package having reduced thickness includes a lead frame, a chip, and a plurality of bonding wires. The lead frame includes a front side, a rear side, a plurality of pins located on the front side, and a hollow portion formed on the lead frame. The chip is larger than the rear side of the lead frame. The chip includes a plurality of electrodes and is adhered to the rear side of the lead frame. The electrodes correspond to the hollow portion. The bonding wires pass through the hollow portion to be connected with the pins and the electrodes. Accordingly, the IC package can effectively take good use of the space below the lead frame, reducing the height of the bonding wires and saving the packaging space above the lead frame, and reduce the thickness of the IC package without addition of the cost and equipment. | 09-24-2009 |
20090239339 | METHOD OF STACKING DIES FOR DIE STACK PACKAGE - A method of manufacturing a die stack package includes the steps of providing a wafer having a first surface and a second surface, said first surface having a plurality of cut ways thereon, the second surface being coated with adhesive of a predetermined thickness at a predetermined position thereof, removing parts of the adhesive by photo-lithography, each of the parts of the adhesive corresponds to the cut way and is wider than the cut way; cutting the wafer along the cut ways to make a plurality of dies, each of the dies having a part of the adhesive thereon; and stacking each of the dies, whose surface having the adhesive faces a lower-layer die, on the lower-layer die. Therefore, the method facilitates the stacking operation and saves the production cost. | 09-24-2009 |
20090239341 | IC PACKAGING PROCESS - An IC packaging process includes the steps of preparing a substrate having a chip-receiving place formed on a front side thereof; creating a dam layer on the front side of the substrate; coating an ultraviolet adhesive layer on the dam layer; removing a part of the ultraviolet adhesive layer that corresponds to the chip-receiving place; removing a part of the dam layer that corresponds to the chip-receiving place; mounting a chip to the chip-receiving place in the open chamber and bonding wires between the substrate and the chip for electrical connection of the chip and the substrate; and mounting a cover layer on the ultraviolet adhesive layer and then heating the ultraviolet adhesive layer to adhesively fasten the cover layer on the dam layer. Accordingly, the IC packaging process effectively reduces the adhesive squeeze-out to prevent it from damage to the chip. | 09-24-2009 |
20090286355 | FLIP-CHIP PROCESS BY PHOTO-CURING ADHESIVE - A flip-chip process includes the steps of disposing a plurality of spherical contact members on a surface of a wafer; forming a photo-curing adhesive layer on the surface of the wafer, wherein said photo-curing adhesive layer covers a part of each of the spherical contact members to expose the spherical contact members of the photo-curing adhesive layer; solidifying the photo-curing adhesive layer by exposure; cutting the wafer into a plurality of chip units; placing the chip units on a substrate to let the spherical contact members lie against contact points of the substrate; and pressurizing the chip units and then heating the spherical contact potions to enable the spherical contact members to be welded and electrically connected with the chip units and the contact points of the substrate | 11-19-2009 |
Patent application number | Description | Published |
20090160653 | Anti-metal RFID tag and manufacturing method thereof - An anti-metal radio frequency identification (RFID) tag and a manufacturing method thereof are described. The anti-metal RFID tag includes a substrate having a first surface and a second surface on an opposite side thereof; a planar integral antenna formed on the first surface of the substrate; a RFID transceiver chip (i.e., RFID chip) disposed on the surface of the substrate and coupled to a signal feed point of the planar integral antenna. The flexible planar integral antenna and substrate are folded and then fixed by a fixing mechanism to form an anti-metal RFID tag with a feed-in structure, a RFID transceiver chip, and a radiator on one side, and a ground plane on the opposite side. A spacer is further sandwiched in the center of the folded structure, which is helpful for improving the antenna gain of the anti-metal RFID tag. | 06-25-2009 |
20100116893 | RFID TAG - A radio frequency identification (RFID) tag including a substrate, an RFID chip, a chip contact part, a folding circuit and a radiation part is provided. The chip contact part is formed on the substrate and electrically coupled to the RFID chip. The folding circuit is formed on the substrate and electrically coupled to the chip contact part. The folding circuit has a winding part, which forms a hollow region, for compensating the antenna electric length. The radiation part is formed on the substrate and electrically coupled to the folding circuit, wherein one terminal of the winding part of the folding circuit is open, and the other terminal is electrically coupled to the radiation part. At least one of the folding circuit and the radiation part is asymmetric to the chip contact part. | 05-13-2010 |
20110134622 | Wireless Communication Apparatus - A wireless communication apparatus in one embodiment includes a bag body and a radio frequency device. The bag body has at least a first slot, which extends to an edge of the bag body. The radio frequency device including a wireless integrated circuit chip is for radio-frequency signal transmission or receiving, and is disposed across a portion of the first slot and coupled to two connection ends of the bag body so that the bag body between the two connection ends serves as an inductance circuit. The inductance circuit of the two connection ends of the bag body is based on metallic material. An impedance of the inductance circuit is for conjugate matching with that of the radio frequency device and is determined according to a plurality of geometric parameters including: a distance from the edge to the wireless integrated circuit chip, and size of the first slot. | 06-09-2011 |
20130044401 | PROTECTION COMPONENT AND PROTECTION DEVICE USING THE SAME - A protection component includes: a package substrate; a first fuse unit disposed in the package substrate, having a first fusing region; a second fuse unit disposed in the package substrate, having a second fusing region which is close to the first fusing region; and a first buried cave disposed in the package substrate corresponding to the first and second fusing regions. When one of the first and second fusing regions is blown out, the first buried cave assists energy of fuse melting to break the other of the first and second fusing regions. | 02-21-2013 |
20140141968 | PHOTOCATALYST MATERIAL AND METHOD FOR FABRICATING THE SAME - The disclosure provides a photocatalyst material and a method for fabricating the same. The photocatalyst material includes a zinc oxide material doped with metal, wherein the zinc oxide material has a lattice structure including a plurality of defects. A part of the defects are filled with a metal, | 05-22-2014 |
Patent application number | Description | Published |
20080266671 | OPTICAL AXIS ORIENTATING DEVICE FOR LIQUID LENS - The invention provides an optical axis orientating device for a liquid lens. The optical axis orientating device includes a transparent substrate, a symmetric electrode structure, and an insulating layer. The electrode structure is capable of supplying an electric field and defines a central axis. The insulating layer provides an optical axis orientating structure symmetric with respect to the central axis. In particular, at a rest state, an optical axis of the liquid lens and the central axis of electrode are substantially coaxial. | 10-30-2008 |
20090039826 | SOLAR ENERGY CHARGING/DISCHARGING SYSTEM AND CHARGING/DISCHARGING METHOD THEREOF - The invention discloses a solar energy charging/discharging system and a charging/discharging method thereof. The solar energy charging/discharging system according to the invention comprises a solar cell, a super-capacitor, and a switch. The solar cell is used for collecting solar energy and converting the solar energy into electrical energy. The super-capacitor is coupled to the solar cell. The super-capacitor and the solar cell are coupled to a load through the switch. The super-capacitor is selectively charged/discharged according to a threshold voltage. | 02-12-2009 |
20130069057 | WAFER WITH HIGH RUPTURE RESISTANCE - A wafer with high rupture resistance includes a plurality of surfaces, wherein the surfaces include a largest surface having a largest area than others and a side surface connected to the fringe of the largest surface. The side surface forms a nanostructured layer thereon to assist the stress dispersion of the wafer. Accordingly, the wafer is provided with a high rupture resistance so as to prevent the wafer from damages during semiconductor or other processes. | 03-21-2013 |
20130200333 | SEMICONDUCTOR LIGHT-EMITTING ELEMENT WITH CORTEX-LIKE NANOSTRUCTURES - The present invention is to provide a semiconductor light-emitting element. The element comprises a substrate and a nanostructural layer. The nanostructural layer is formed on the substrate and comprises a plurality of void-embedded cortex-like nanostructures, wherein the volumetric porosity of the nanostructural layer is ranged from 30% to 59%. Compared with the prior art, the present invention can not only improve the crystalline quality of epitaxial layers but also enhance the external quantum efficiency (EQE) of the semiconductor light-emitting element. | 08-08-2013 |
20140034979 | LED LIGHTING ASSEMBLY INTEGRATED WITH DIELECTRIC LIQUID LENS - An LED lighting assembly integrated with dielectric liquid lens, including: a heat dissipation substrate; an LED chip, located on the heat dissipation substrate; a transparent material, covering the heat dissipation substrate and the LED chip and having a curved surface; a transparent liquid, located above the transparent material; a transparent layer, located above the transparent liquid; a first dielectric liquid, located above the transparent layer; a second dielectric liquid, located above the first dielectric liquid and having a curved surface, wherein the second dielectric liquid has a second dielectric constant smaller than a first dielectric constant of the first dielectric liquid; a transparent electrode layer, located above the second dielectric liquid for applying a control voltage to generate a dielectric force on the second dielectric liquid; and an enclosing body. | 02-06-2014 |
20140049945 | LIGHTING DEVICE CAPABLE OF CHANGING LIGHT PATTERNS - A lighting device capable of changing light patterns, comprising: a heat dissipating substrate; a light source, located on the heat dissipating substrate; a first dielectric liquid, covering the light source and having a first dielectric constant; a second dielectric liquid, covering the first dielectric liquid and having a second dielectric constant; and an enclosing wall, located on the heat dissipating substrate for containing the first dielectric liquid and the second dielectric liquid. | 02-20-2014 |
20150343665 | INGOT CUTTING METHOD CAPABLE OF REDUCING WAFER DAMAGE PERCENTAGE - An ingot cutting method capable of reducing wafer damage percentage, comprising: forming a layer of nanostructures on at least one surface of an ingot; depositing a buffer layer on the layer of nanostructures; fixing the ingot to a mounting plate by applying a layer of epoxy between the buffer layer and the mounting plate; performing a dicing process on the ingot to get a plurality of wafers; and performing an epoxy removal process on the plurality of wafers. | 12-03-2015 |
20150349159 | BENDABLE SOLAR CELL CAPABLE OF OPTIMIZING THICKNESS AND CONVERSION EFFICIENCY - A bendable solar cell capable of optimizing thickness and conversion efficiency, comprising: a solar cell body having a top surface, a bottom surface, and four side walls; and a layer of nanostructures located on said side walls, wherein said solar cell body has a thickness ranging from about 50 μm to about 120 μm, and said layer of nanostructures has a depth ranging from about 2 μm to 8 μm. | 12-03-2015 |
Patent application number | Description | Published |
20130009316 | Apparatus and Methods for Dicing Interposer Assembly - Methods and apparatus for performing dicing of die on wafer interposers. Methods are disclosed that include receiving an interposer assembly including one or more integrated circuit dies mounted on a die side of an interposer substrate and having scribe areas defined in spaces between the integrated circuit dies, the interposer having an opposite side for receiving external connectors; mounting the die side of the interposer assembly to a tape assembly, the tape assembly comprising an adhesive tape and preformed spacers disposed between and filling gaps between the integrated circuit dies; and sawing the interposer assembly by cutting the opposite side of the interposer in the scribe areas to make cuts through the interposer, the cuts separating the interposer into one or more die on wafer assemblies. Apparatuses are disclosed for use with the methods. | 01-10-2013 |
20130119533 | Package for Three Dimensional Integrated Circuit - A wafer level package includes a semiconductor die bonded on a supporting wafer. The semiconductor die has at least a step recess at its substrate. An underfill layer is formed between the semiconductor die and the supporting wafer. Moreover, the height of the underfill layer is limited by the step recess. During a fabrication process of the wafer level package, the step recess helps to reduce the stress on the wafer level package. | 05-16-2013 |
20130122689 | Methods for De-Bonding Carriers - A method includes performing a dicing on a composite wafer including a plurality of dies, wherein the composite wafer is bonded on a carrier when the step of dicing is performed. After the step of dicing, the composite wafer is mounted onto a tape. The carrier is then de-bonded from the composite wafer and the first tape. | 05-16-2013 |
20130285241 | Apparatus For Dicing Interposer Assembly - Apparatus for performing dicing of die on wafer interposers. Apparatuses are disclosed for use with the methods of dicing an interposer having integrated circuit dies mounted thereon. An apparatus includes a wafer carrier mounted in a frame and having a size corresponding to a silicon interposer, a fixture mounted to the wafer carrier and comprising a layer of material to provide mechanical support to the die side of the silicon interposer, the fixture being patterned to fill spaces between integrated circuit dies mounted on an interposer; and an adhesive tape disposed on a surface of the fixture for adhering to the surface of a silicon interposer. Additional alternative apparatuses are disclosed. | 10-31-2013 |
20140322866 | Package for Three Dimensional Integrated Circuit - A wafer level package includes a semiconductor die bonded on a supporting wafer. The semiconductor die has at least a step recess at its substrate. An underfill layer is formed between the semiconductor die and the supporting wafer. Moreover, the height of the underfill layer is limited by the step recess. During a fabrication process of the wafer level package, the step recess helps to reduce the stress on the wafer level package. | 10-30-2014 |
20140353838 | 3D Packages and Methods for Forming the Same - Embodiments of the present disclosure include a semiconductor device and methods of forming a semiconductor device. An embodiment is a method of forming a semiconductor device, the method including bonding a die to a top surface of a first substrate, the die being electrically coupled to the first substrate, and forming a support structure on the top surface of the first substrate, the support structure being physically separated from the die with a top surface of the support structure being coplanar with a top surface of the die. The method further includes performing a sawing process on the first substrate, the sawing process sawing through the support structure. | 12-04-2014 |
20150145133 | Apparatus for Dicing Interposer Assembly - Apparatus for performing dicing of die on wafer interposers. Apparatuses are disclosed for use with the methods of dicing an interposer having integrated circuit dies mounted thereon. An apparatus includes a wafer carrier mounted in a frame and having a size corresponding to a silicon interposer, a fixture mounted to the wafer carrier and comprising a layer of material to provide mechanical support to the die side of the silicon interposer, the fixture being patterned to fill spaces between integrated circuit dies mounted on an interposer; and an adhesive tape disposed on a surface of the fixture for adhering to the surface of a silicon interposer. Additional alternative apparatuses are disclosed. | 05-28-2015 |
20150357255 | 3D Packages and Methods for Forming the Same - Embodiments of the present disclosure include a semiconductor device and methods of forming a semiconductor device. An embodiment is a method of forming a semiconductor device, the method including bonding a die to a top surface of a first substrate, the die being electrically coupled to the first substrate, and forming a support structure on the top surface of the first substrate, the support structure being physically separated from the die with a top surface of the support structure being coplanar with a top surface of the die. The method further includes performing a sawing process on the first substrate, the sawing process sawing through the support structure. | 12-10-2015 |
Patent application number | Description | Published |
20120228655 | LIGHT EMITTING DIODE WITH LARGE VIEWING ANGLE AND FABRICATING METHOD THEREOF - A light emitting diode includes a substrate, a plurality of pillar structures, a filler structure, a transparent conductive layer, a first electrode, and a second electrode. These pillar structures are formed on the substrate. Each of the pillar structures includes a first type semiconductor layer, an active layer, and a second type semiconductor layer. The first type semiconductor layers are formed on the substrate. The pillar structures are electrically connected with each other through the first type semiconductor layers. The filler structure is formed between the pillar structures. The filler structure and the second type semiconductor layers of the pillar structures are covered with the transparent conductive layer. The first electrode is in contact with the transparent conductive layer. The second electrode is in contact with the first type semiconductor layer. | 09-13-2012 |
20150090999 | WHITE LED - A white LED is provided. The white LED includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first metal oxide layer. The active layer includes a second metal oxide layer. The second barrier layer includes a third metal oxide layer. The N-type layer is disposed over the tunneling structure. The N-type electrode and the P-type electrode are respectively contacted with the N-type layer and the P-type layer. An energy gap of the second metal oxide layer is lower than an energy gap of the first metal oxide layer and is lower than an energy gap of the third metal oxide layer. | 04-02-2015 |
20150091019 | WHITE LED CHIP AND WHITE LED PACKAGING DEVICE - A white LED chip includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first material layer, the active layer includes a second material layer, and the second barrier layer includes a third material layer. The N-type layer is disposed over the tunneling structure. An energy gap of the second material layer is lower than an energy gap of the first material layer and an energy gap of the third material layer. Each of the first material layer, the second material layer and the third material layer is a metal oxide layer, a metal nitride layer or a metal oxynitride layer. | 04-02-2015 |
Patent application number | Description | Published |
20120234955 | FISHING REEL - The fishing reel has a body and a deceleration controller. The body has a magnetic spool and a side cover. The deceleration controller is mounted on the side cover and has a mounting tube, a moving shaft, a magnetic assembly and a switching button. The mounting tube is mounted through the side cover and has an inner thread. The moving shaft is movably mounted through the mounting tube and has an inside end, an outside end, an outer surface and a thread section. The thread section is formed in the outer surface of the moving shaft and screwed with the inner thread of the mounting tube. The magnetic assembly is securely mounted on the inside end of the moving shaft. The switching button is mounted securely on the outside end of the moving shaft to turn the moving shaft moveable inwardly or outwardly relative to the magnetic spool. | 09-20-2012 |
20140014756 | BRAKE-ADJUSTING ASSEMBLY FOR A FISHING REEL - A brake-adjusting assembly for a fishing reel with a spool and has a first brake-adjusting device and a second brake-adjusting device. The first brake-adjusting device is mounted around a spindle of the spool and has a clutch cam and a lever mount. The clutch cam has a main plate body, a mounting tube, a spring and an abutting base formed on and protruding from the main plate body. The lever mount abuts with the clutch cam and has two pushing blocks, a mounting recess and at least one lever. The second brake-adjusting device is connected to the first brake-adjusting device and the spindle and has a connecting mount, a threaded tube and an adjusting switch. The connecting mount is mounted in the mounting recess. The threaded tube is mounted in the connecting mount to screw with the spindle. The adjusting switch is securely connected to the connecting mount. | 01-16-2014 |
20140353414 | FISHING REEL - A fishing reel has a reel body and an adjusting device. The reel body has a spool that is made of metal. The adjusting device has an adjusting button, an adjusting base and a magnetic set. The adjusting button has an adjusting structure being spiral, facing the spool and forming a step between a highest part and a lowest part of the adjusting structure. The adjusting base has a coordinating portion being spiral, facing the adjusting structure and forming a step between a highest part and a lowest part of the coordinating portion. The magnet set is mounted on the adjusting base and faces the spool. | 12-04-2014 |
Patent application number | Description | Published |
20130126932 | PACKAGE OF ENVIRONMENTAL SENSITIVE ELECTRONIC ELEMENT - A package of an environmental sensitive electronic element including a first substrate, a second substrate, an environmental sensitive electronic element, a flexible structure layer and a filler layer is provided. The environmental sensitive electronic element is disposed on the first substrate and located between the first substrate and the second substrate. The environmental sensitive electronic element includes an anode layer, a hole injecting layer, a hole transporting layer, an organic light emitting layer, a cathode layer and an electron injection layer. The flexible structure layer is disposed on the environmental sensitive electronic element and includes a soft layer, a trapping layer and a protective layer. The material of the trapping layer is the same as the material of the electron injection layer. The filler layer is disposed between the first substrate and the second substrate and encapsulates the environmental sensitive electronic element and the flexible structure layer. | 05-23-2013 |
20130193843 | DOUBLE-SIDE LIGHT EMITTING DISPLAY PANEL - A double-side light emitting display panel includes a substrate, a plurality of top emission pixel structures and a plurality of bottom emission pixel structures. The top emission pixel structures are disposed on the substrate, and the bottom emission pixel structures are disposed on the substrate. The top emission pixel structures and the bottom emission pixel structures are arranged alternatively on the substrate. | 08-01-2013 |
20140160710 | ENVIRONMENTAL SENSITIVE ELECTRONIC DEVICE PACKAGE AND MANUFACTURING METHOD THEREOF - An environmental sensitive electronic device package including a first substrate, a second substrate, an environmental sensitive electronic device, a side wall barrier structure, a first adhesive, and a second adhesive is provided. The environmental sensitive electronic device is located on the first substrate. The first adhesive is located on the first substrate. The side wall barrier structure is located on the first adhesive, and the side wall barrier structure is adhered to the first substrate through the first adhesive. The second adhesive is located on the side wall barrier structure. The side wall barrier structure is adhered to the second substrate through the second adhesive, and the side wall barrier structure, the first adhesive, and the second adhesive are located between the first substrate and the second substrate. A manufacturing method of an environmental sensitive electronic device package is also provided. | 06-12-2014 |
20140175405 | ELECTRONIC DEVICE PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF - A package structure of an electronic device is provided. The substrate of such package structure has at least one embedded gas barrier structure, which protects the electronic device mounted thereon and offers good gas barrier capability so as to extend the life of the electronic device. | 06-26-2014 |
20140198435 | PACKAGE STRUCTURE OF ELECTRONIC DEVICE - A package structure of an electronic device includes a first substrate, a second substrate, an electronic device and a first barrier structure. The first substrate includes a first light-transmitting portion and a periphery portion. The second substrate includes a second light-transmitting portion and two covering portions located on two sides of the second light-transmitting portion. The first light-transmitting portion is disposed corresponding to the second light-transmitting portion, and a device disposition region exists therebetween. The covering portions cover the periphery portion of the first substrate and two opposite side surfaces of the first substrate. The electronic device is disposed on the first or second substrate, and is located in the device disposition region. The first barrier structure disposed on the first substrate or the second substrate is disposed corresponding to the periphery portion and disposed on at least one side of the device disposition region. | 07-17-2014 |
Patent application number | Description | Published |
20130044068 | TOUCH DISPLAY PANEL - A touch display panel including a display panel and a touch panel is provided. The display panel includes a shielding pattern and a plurality of pixels separated by the shielding pattern and including multiple edge directions. The touch panel is disposed on the display panel and includes a plurality of first sensing series, a plurality of second sensing series and a plurality of dielectric patterns. Each dielectric pattern is disposed between each first sensing series and each second sensing series intersected therewith, and includes multiple edge direction non-parallel to the edge direction of the pixel. | 02-21-2013 |
20130234969 | TOUCH DISPLAY PANEL - A touch display panel including a display panel and a touch panel is provided. The display panel includes a shielding pattern and a plurality of pixels separated by the shielding pattern and including multiple edge directions. The touch panel is disposed on the display panel and includes a plurality of first sensing series, a plurality of second sensing series and a plurality of dielectric patterns. Each dielectric pattern is disposed between each first sensing series and each second sensing series intersected therewith, and includes multiple edge direction non-parallel to the edge direction of the pixel. | 09-12-2013 |
20140300835 | TOUCH PANEL - A touch panel, having a light transmission touch sensing region and a peripheral region adjacent to at least one side of the light transmission touch sensing region, includes an inner frame and a decoration frame disposed in the peripheral region. The peripheral region has an inner edge and an outer edge, wherein the inner edge is closer to the light transmission touch sensing region than the outer edge. The inner sidewall of the inner frame is disposed along the inner edge of the peripheral region. The decoration frame includes at least one decoration layer. The pattern of the decoration layer does not exceed the inner edge of the peripheral region. | 10-09-2014 |
20150029419 | DECORATION PLATE AND TOUCH PANEL - A decoration plate includes a substrate, a decoration pattern layer, and at least one color decoration layer. The decoration pattern layer is disposed on the substrate, and the decoration pattern layer has a pattern in a projection direction perpendicular to the substrate. The color decoration layer is disposed on and covers the decoration pattern layer, and extends onto the substrate. | 01-29-2015 |
Patent application number | Description | Published |
20090179710 | Electromagnetic interference eliminating apparatus - An electromagnetic interference eliminating apparatus includes a multi-stage filter that is composed of inductors, capacitors and resistors, and an active filter. The multi-stage filter receives an input signal and provides an eliminating band to eliminate the noise in the input signal. The active filter is connected with the multi-stage filter for buffering the input signal that has been eliminated and exactly outputting an output signal. | 07-16-2009 |
20090244877 | PCB layout structrue for suppressing EMI and method thereof - A PCB layout structure for suppressing EMI and a method thereof is disclosed. The PCB layout structure for suppressing EMI includes a multi-layer PCB, a plurality of electric grids, and a plurality of conductive vias. The multi-layer PCB has a plurality of signal layers and a grounding layer. Each of the signal layers is disposed with a plurality of signal lines. The plurality of electric grids are disposed on each of the signal layers and cover the signal lines on each of the signal layers. The plurality of conductive vias are located between the layers of the multi-layer PCB to electrically connect the grounding layer with the electric grids on each of the signal layers. Thereby, electromagnetic waves of a specific wavelength are shielded by appropriately choosing the dimensions of the electric grids. | 10-01-2009 |
20120062341 | MICRO BAND-PASS FILTER - A micro band-pass filter is disclosed. The micro band-pass filter includes a first resonator having a first inter-digital unit and a second inter-digital unit, which is connected to a first wavelength-impedance converter, on two ends thereof, and a second resonator having a third inter-digital unit and a fourth inter-digital, which is connected to a second wavelength-impedance converter unit on two ends thereof. The second inter-digital unit is adapted to face the third inter-digital unit when forming a first inter-digital coupling structure along with the third inter-digital unit, and the first inter-digital unit is adapted to face the fourth inter-digital unit when forming a second inter-digital coupling structure. | 03-15-2012 |
20120062342 | MULTI BAND-PASS FILTER - A multi band-pass filter includes a first resonator and a second resonator. The first resonator has a first frequency pass band and a second frequency pass band. Moreover, the second resonator is electromagnetically coupled to another end of the first resonator. The second resonator has a third frequency pass band and a fourth frequency pass band, wherein the third frequency pass band overlaps (or is congruous with) the first frequency pass band and the fourth frequency pass band overlaps the second frequency pass band. | 03-15-2012 |
Patent application number | Description | Published |
20150028357 | PACKAGE STRUCTURE OF AN OPTICAL MODULE - This invention relates to a package structure of an optical module. A light emitting and light receiving chips are disposed on a light emitting and light receiving region of the substrate, respectively. Two encapsulating gels cover the light emitting chip and the light receiving chip, respectively, and form a first and a second hemispherical lens portions on the light emitting chip and the light receiving chip, respectively. A cover is affixed on the substrate and each of the encapsulating gels and has a light emitting hole and a light receiving hole, wherein the first and the second lens portions are accommodated, respectively. An engaging means is formed on an adjacent surface between each encapsulating gels and the cover in a horizontal direction. Thereby, the package structure of the optical module of the present invention increases the connection region between each encapsulating gels and the cover to enhance the engagement. | 01-29-2015 |
20150028360 | PACKAGE STRUCTURE OF OPTICAL MODULE - A package structure of an optical module includes: a substrate defined with a light-emitting region and a light-admitting region; a light-emitting chip disposed at the light-emitting region of the substrate; a light-admitting chip disposed at the light-admitting region of the substrate; two encapsulants for enclosing the light-emitting chip and the light-admitting chip, respectively; and a shielding layer formed on the substrate and the encapsulants and having a light-emitting hole and a light-admitting hole, wherein the light-emitting hole and the light-admitting hole are positioned above the light-emitting chip and the light-admitting chip, respectively. Accordingly, the optical module package structure simplifies a packaging process and cuts manufacturing costs. | 01-29-2015 |
20150028371 | PACKAGE STRUCTURE OF OPTICAL MODULE - A package structure of an optical module is provided and includes: a light-emitting chip and a light-admitting chip which are disposed at a light-emitting region and a light-admitting region of a substrate, respectively; two encapsulants for enclosing the light-emitting chip and the light-admitting chip, respectively, and forming hemispherical first and second lens portions above the light-emitting chip and the light-admitting chip, respectively; a cover disposed on the substrate and the encapsulants and having a light-emitting hole and a light-admitting hole, wherein the light-emitting hole and the light-admitting hole are positioned above the light-emitting chip and the light-admitting chip, respectively, and the first and second lens portions are received in the light-emitting hole and the light-admitting hole, respectively. The encapsulants of the optical module package structure can be of unequal curvature as needed to enhance light emission efficiency of the light-emitting chip and enhance reception efficiency of the light-admitting chip. | 01-29-2015 |
20150028378 | PACKAGE STRUCTURE OF OPTICAL MODULE - A package structure of an optical module includes: a substrate having a frame defined with a light-emitting region and a light-admitting region; a light-emitting chip disposed at the light-emitting region of the substrate; a light-admitting chip disposed at the light-admitting region of the substrate; two encapsulants formed in the frame and enclosing the light-emitting chip and the light-admitting chip, respectively; and a shielding layer formed on the frame and the encapsulants and having a light-emitting hole and a light-admitting hole, wherein the light-emitting hole and the light-admitting hole are positioned above the light-emitting chip and the light-admitting chip, respectively. The optical module package structure uses an opaque glue to reduce costs and total thickness of the package structure. | 01-29-2015 |
20150091024 | PACKAGE STRUCTURE OF OPTICAL MODULE - A package structure of an optical module includes: a substrate defined with a light-emitting region and a light-admitting region; a light-emitting chip disposed at the light-emitting region of the substrate; a light-admitting chip disposed at the light-admitting region of the substrate; two encapsulants for enclosing the light-emitting chip and the light-admitting chip, respectively; and a shielding layer formed on the substrate and the encapsulants and having a light-emitting hole and a light-admitting hole, wherein the light-emitting hole and the light-admitting hole are positioned above the light-emitting chip and the light-admitting chip, respectively. Accordingly, the optical module package structure simplifies a packaging process and cuts manufacturing costs. | 04-02-2015 |
20150111324 | PACKAGE STRUCTURE OF OPTICAL MODULE - A package structure of an optical module is provided and includes: a light-emitting chip and a light-admitting chip which are disposed at a light-emitting region and a light-admitting region of a substrate, respectively; two encapsulants for enclosing the light-emitting chip and the light-admitting chip, respectively, and forming hemispherical first and second lens portions above the light-emitting chip and the light-admitting chip, respectively; a cover disposed on the substrate and the encapsulants and having a light-emitting hole and a light-admitting hole, wherein the light-emitting hole and the light-admitting hole are positioned above the light-emitting chip and the light-admitting chip, respectively, and the first and second lens portions are received in the light-emitting hole and the light-admitting hole, respectively. The encapsulants of the optical module package structure can be of unequal curvature as needed to enhance light emission efficiency of the light-emitting chip and enhance reception efficiency of the light-admitting chip. | 04-23-2015 |
20150187963 | MICRO OPTICAL PACKAGE STRUCTURE WITH FILTRATION LAYER AND METHOD FOR MAKING THE SAME - A micro optical package structure with filtration layers includes a substrate having a light-emitting area and a light-receiving area, a light-emitting chip being deposited in a light-emitting area, a light-receiving chip being deposited in a light-receiving area, two packaging resin bodies for enclosing the light-emitting chip and the light-receiving chip, respectively, and being separately deposited in the light-emitting area and the light-receiving area, respectively, and the filtration layers formed on the packaging resin bodies surface for filtering out lights of different wavelengths. The micro optical package structure needs neither barrier nor protective cover between or outside the packaging resin bodies, so can be microminiaturized. The micro optical package structure can filter out visible lights of specific wavelengths without using any additional filters. | 07-02-2015 |
20150279827 | OPTICAL MODULE INTEGRATED PACKAGE - A an optical module integrated package includes a substrate, a light-receiving chip mounted in a light-receiving region of the substrate, an electronic component mounted in the substrate, a cover mounted on the substrate and having a light-receiving chip disposed above the light-receiving hole, and a lens fixedly mounted in the light-receiving hole of the cover. Thus, the optical module integrated package not only have the chip and the electronic component integrated therein to reduce the packaging cost and to improve the yield but also provide a light filtering, focusing or diffusing effect to enhance optical recognition accuracy. | 10-01-2015 |