Patent application number | Description | Published |
20090191665 | Electronic Device and Method of Manufacturing Same - This application relates to a method of manufacturing an electronic device comprising placing a first chip on a carrier; applying an insulating layer over the first chip and the carrier; applying a metal ions containing solution to the insulating layer for producing a first metal layer of a first thickness; and producing a second metal layer of a second thickness on the insulating layer wherein at least one of the first metal layer and the second metal layer comprises at least a portion that is laterally spaced apart from the respective other metal layer. | 07-30-2009 |
20090206456 | MODULE INCLUDING A SINTERED JOINT BONDING A SEMICONDUCTOR CHIP TO A COPPER SURFACE - A module includes a substrate including a first copper surface and a semiconductor chip. The module includes a first sintered joint bonding the semiconductor chip directly to the first copper surface. | 08-20-2009 |
20090273063 | SEMICONDUCTOR DEVICE - One embodiment provides a semiconductor device including a carrier, a first chip attached to the carrier, a structured dielectric coupled to the chip and to the carrier, and a conducting element electrically connected with the chip and extending over a portion of the structured dielectric. The conducting element includes a sintered region. | 11-05-2009 |
20090273066 | SEMICONDUCTOR DEVICE AND METHOD - An electronic device and fabrication of an electronic device. One embodiment provides applying a paste including electrically conductive particles to a surface of a semiconductor wafer. The semiconductor wafer is singulated with the electrically conductive particles for obtaining a plurality of semiconductor chips. At least one of the plurality of semiconductor chips is placed over a carrier with the electrically conductive particles facing the carrier. The electrically conductive particles are heated until the at least one semiconductor chip adheres to the carrier. | 11-05-2009 |
20090294963 | MODULE INCLUDING A SINTERED JOINT - A method comprises applying a paste comprising metal grains, a solvent, and a sintering inhibitor to one of a die and a metal layer. The method comprises evaporating the solvent in the paste and placing the one of the die and the metal layer on the other of the die and the metal layer such that the paste contacts the die and the metal layer. The method comprises applying a force to the one of the die and the metal layer and decomposing the sintering inhibitors to form a sintered joint joining the die to the metal layer. | 12-03-2009 |
20100044885 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD - A semiconductor device and manufacturing method. One embodiment provides at least two semiconductor chips. A dielectric material is applied to the at least two semiconductor chips to attach the at least two semiconductor chips to each other. A portion of the dielectric material is selectively removed between the at least two semiconductor chips to form at least one recess in the dielectric material. Metal particles including paste is applied to the at least one recess in the dielectric material. | 02-25-2010 |
20100055839 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device. One embodiment provides a carrier. A semiconductor chip is provided with a first face and a second face opposite to the first face. The semiconductor chip is placed over the carrier with the first face facing the carrier. A voltage is applied between the second face of the semiconductor chip and the carrier for attaching the semiconductor chip to the carrier. | 03-04-2010 |
20100059857 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device. One embodiment provides a metal carrier. A semiconductor chip is provided. A porous layer is produced at a surface of at least one of the carrier and the semiconductor chip. The semiconductor chip is placed on the carrier. The resulting structure is heated until the semiconductor chip is attached to the carrier. | 03-11-2010 |
20100072616 | METHOD OF MANUFACTURING AN ELECTRONIC SYSTEM - A method of manufacturing an electronic system. One embodiment provides a semiconductor chip having a first main face and a second main face opposite to the first main face. A mask is applied to the first main face of the semiconductor chip. A compound is applied to the first main face of the semiconductor chip. The compound includes electronically conductive particles. The semiconductor chip is coupled to a carrier with the compound facing the carrier. | 03-25-2010 |
20100072628 | SEMICONDUCTOR DEVICE - A semiconductor device includes a carrier and a first chip attached to the carrier. The semiconductor device includes a sintered insulation material over at least a portion of the carrier and the first chip. | 03-25-2010 |
20100148381 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed. One aspect provides a semiconductor device that includes a semiconductor chip including a first face and a second face opposite the first face, an encapsulant including inorganic particles encapsulating the semiconductor chip, a first metal layer attached to the first face of the semiconductor chip, a second metal layer attached the second face of the semiconductor chip, and electrically conducting material configured to connect the first metal layer with the second metal layer. | 06-17-2010 |
20100207263 | SEMICONDUCTOR DEVICE - A semiconductor device includes a first chip coupled to an electrical insulator, and a sintered heat conducting layer disposed between the electrical insulator and the first chip. | 08-19-2010 |
20100230798 | SEMICONDUCTOR DEVICE INCLUDING SPACER ELEMENT - A semiconductor device includes a metal carrier and a spacer element attached to the metal carrier. The semiconductor device includes a first sintered metal layer on the spacer element and a semiconductor chip on the first sintered metal layer. | 09-16-2010 |
20110074040 | Semiconductor Device And Method For Making Same - One or more embodiments may relate to a method for making a semiconductor structure, the method including: forming an opening at least partially through a workpiece; and forming an enclosed cavity within the opening, the forming the cavity comprising forming a paste within the opening. | 03-31-2011 |
20110084369 | DEVICE INCLUDING A SEMICONDUCTOR CHIP AND A CARRIER AND FABRICATION METHOD - A description is given of a method. In one embodiment the method includes providing a semiconductor chip with semiconductor material being exposed at a first surface of the semiconductor chip. The semiconductor chip is placed over a carrier with the first surface facing the carrier. An electrically conductive material is arranged between the semiconductor chip and the carrier. Heat is applied to attach the semiconductor chip to the carrier. | 04-14-2011 |
20110108971 | LAMINATE ELECTRONIC DEVICE - A laminate electronic device comprises a first semiconductor chip, the first semiconductor chip defining a first main face and a second main face opposite to the first main face, and having at least one electrode pad on the first main face. The laminate electronic device further comprises a carrier having a first structured metal layer arranged at a first main surface of the carrier. The first structured metal layer is bonded to the electrode pad via a first bond layer of a conductive material, wherein the first bond layer has a thickness of less than 10 μm. A first insulating layer overlies the first main surface of the carrier and the first semiconductor chip. | 05-12-2011 |
20110198743 | Method of Manufacturing a Semiconductor Device with a Carrier Having a Cavity and Semiconductor Device - A method includes providing a carrier having a first cavity, providing a dielectric foil with a metal layer attached to the dielectric foil, placing a first semiconductor chip in the first cavity of the carrier, and applying the dielectric foil to the carrier. | 08-18-2011 |
20120061845 | Methods for filling a contact hole in a chip package arrangement and chip package arrangements - In various embodiments, a method for filling a contact hole in a chip package arrangement is provided. The method may include introducing electrically conductive discrete particles into a contact hole of a chip package; and forming an electrical contact between the electrically conductive particles and a contact terminal of the front side and/or the back side of the chip. | 03-15-2012 |
20120086129 | Manufacturing of a Device Including a Semiconductor Chip - A method includes providing a semiconductor chip having a first main surface and a second main surface opposite to the first main surface. An electrically insulating material is deposited on the first main surface of the semiconductor chip using a plasma deposition method. A first electrically conductive material is deposited on the second main surface of the semiconductor chip using a plasma deposition method. | 04-12-2012 |
20120312864 | MODULE INCLUDING A SINTERED JOINT BONDING A SEMICONDUCTOR CHIP TO A COPPER SURFACE - A module includes a substrate including a first copper surface and a semiconductor chip. The module includes a first sintered joint bonding the semiconductor chip directly to the first copper surface. | 12-13-2012 |
20130001768 | METHOD OF MANUFACTURING AN ELECTRONIC SYSTEM - A method of manufacturing an electronic system. One embodiment provides a semiconductor chip having a first main face and a second main face opposite to the first main face. A mask is applied to the first main face of the semiconductor chip. A compound is applied to the first main face of the semiconductor chip. The compound includes electronically conductive particles. The semiconductor chip is coupled to a carrier with the compound facing the carrier. | 01-03-2013 |
20130010446 | LAMINATE ELECTRONIC DEVICE - A laminate electronic device comprises a first semiconductor chip, the first semiconductor chip defining a first main face and a second main face opposite to the first main face, and having at least one electrode pad on the first main face. The laminate electronic device further comprises a carrier having a first structured metal layer arranged at a first main surface of the carrier. The first structured metal layer is bonded to the electrode pad via a first bond layer of a conductive material, wherein the first bond layer has a thickness of less than 10 μm. A first insulating layer overlies the first main surface of the carrier and the first semiconductor chip. | 01-10-2013 |
20130187259 | Electronic Device and a Method for Fabricating an Electronic Device - An electronic device includes a semiconductor chip. A contact element, an electrical connector, and a dielectric layer are disposed on a first surface of a conductive layer facing the semiconductor chip. A first conductive member is disposed in a first recess of the dielectric layer. The first conductive member electrically connects the contact element of the semiconductor chip with the conductive layer. A second conductive member is disposed in a second recess of the dielectric layer. The second conductive member electrically connects the conductive layer with the electrical connector. | 07-25-2013 |
20130200502 | Semiconductor Device and Method of Manufacturing Thereof - A method of manufacturing a semiconductor device includes providing a transfer foil. A plurality of semiconductor chips is placed on and adhered to the transfer foil. The plurality of semiconductor chips adhered to the transfer foil is placed over a multi-device carrier. Heat is applied to laminate the transfer foil over the multi-device carrier, thereby accommodating the plurality of semiconductor chips between the laminated transfer foil and the multi-device carrier. | 08-08-2013 |
20130264721 | Electronic Module - The electronic module includes a first carrier and a first semiconductor chip arranged on the first carrier. A second semiconductor chip is arranged above the first semiconductor chip. A material layer adheres the second semiconductor chip to the first carrier and encapsulates the first semiconductor chip. | 10-10-2013 |
20130292684 | Semiconductor Package and Methods of Formation Thereof - In one embodiment, a semiconductor package includes a semiconductor chip having a first contact region on a first major surface and a second contact region on an opposite second major surface. The semiconductor chip is configured to regulate flow of a current from the first contact region to the second contact region. An encapsulant is disposed at the semiconductor chip. A first contact plug is disposed within the encapsulant and coupled to the first contact region. A second side conductive layer is disposed under the second major surface and coupled to the second contact region. A through via is disposed within the encapsulant and coupled to the second side conductive layer. The first contact plug and the through via form terminals above the first major surface for contacting the semiconductor package. | 11-07-2013 |
20140021634 | Method of Manufacturing a Semiconductor Device with a Carrier Having a Cavity and Semiconductor Device - A method includes providing a carrier having a first cavity, providing a dielectric foil with a metal layer attached to the dielectric foil, placing a first semiconductor chip in the first cavity of the carrier, and applying the dielectric foil to the carrier. | 01-23-2014 |
20140042603 | Electronic Device and Method of Fabricating an Electronic Device - A semiconductor device includes an electrically conducting carrier and a semiconductor chip disposed over the carrier. The semiconductor device also includes a porous diffusion solder layer provided between the carrier and the semiconductor chip. | 02-13-2014 |
20140057396 | Method of Manufacturing a Component Comprising Cutting a Carrier - A method of manufacturing a component is disclosed. An embodiment of the method comprises dicing a carrier in a plurality of components, the carrier being disposed on a support carrier, after dicing, placing a connection layer on the carrier and removing the components from the support carrier. | 02-27-2014 |
20140061878 | INTEGRATED CIRCUITS AND A METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT - An integrated circuit is provided. The integrated circuit includes: a chip and encapsulation material covering at least three sides of the chip, the encapsulation material being formed from adhesive material. The integrated circuit includes a carrier adhered to the chip by means of the encapsulation material. | 03-06-2014 |
20140167266 | SEMICONDUCTOR DEVICE HAVING PERIPHERAL POLYMER STRUCTURES - A semiconductor device includes a semiconductor chip including a first main face and a second main face wherein the second main face is the backside of the semiconductor chip. Further, the semiconductor device includes an electrically conductive layer, in particular an electrically conductive layer, arranged on a first region of the second main face of the semiconductor chip. Further, the semiconductor device includes a polymer structure arranged on a second region of the second main face of the semiconductor chip, wherein the second region is a peripheral region of the second main face of the semiconductor chip and the first region is adjacent to the second region. | 06-19-2014 |
20140353818 | Power module comprising two substrates and method of manufacturing the same - A method of manufacturing a power module comprising two substrates is provided, wherein the method comprises disposing a compensation layer of a first thickness above a first substrate; disposing a second substrate above the compensation layer; and reducing the thickness of the compensation layer from the first thickness to a second thickness after the second substrate is disposed on the compensation layer | 12-04-2014 |
20150035170 | MULTICHIP DEVICE INCLUDING A SUBSTRATE - A device includes a substrate including an electrically insulating core, a first electrically conductive material arranged over a first main surface of the substrate, and a second electrically conductive material arranged over a second main surface of the substrate opposite to the first main surface. The device further includes an electrically conductive connection extending from the first main surface to the second main surface and electrically coupling the first electrically conductive material and the second electrically conductive material, a first semiconductor chip arranged over the first main surface and electrically coupled to the first electrically conductive material, and a second semiconductor chip arranged over the second main surface and electrically coupled to the second electrically conductive material. | 02-05-2015 |
20150043169 | Electronic module and method of manufacturing the same - According to an exemplary aspect an electronic module is provided, wherein the electronic module comprises an electronic chip comprising at least one electronic component, a spacing element comprising a main surface arranged on the electronic chip and being in thermally conductive connection with the at least one electronic component, and a mold compound at least partially enclosing the electronic chip and the spacing element, wherein the spacing element comprises a lateral surface which is in contact to the mould compound and comprises surface structures. | 02-12-2015 |
20150060872 | Encapsulated Semiconductor Device - A semiconductor device includes a carrier and a semiconductor chip disposed over the carrier. The semiconductor chip has a first surface and a second surface opposite to the first surface, wherein the second surface faces the carrier. Further, the semiconductor device includes a pre-encapsulant covering at least partially the second surface of the semiconductor chip and at least partially a side wall surface of the semiconductor chip. The pre-encapsulant has a thermal conductivity of equal to or greater than 10 W/(m·K) and a specific heat capacity of equal to or greater than 0.2 J/(g·K). | 03-05-2015 |
20150077941 | Electronic Power Device and Method of Fabricating an Electronic Power Device - An electronic device comprises a power module comprising a first main surface and a second main surface opposite to the first main surface, wherein at least a portion of the first main surface is configured as a heat dissipating surface without electrical power terminal functionality. The electronic device comprises a porous metal layer arranged on the portion of the first main surface. | 03-19-2015 |