Daga, US
Anand Daga, Cupertino, CA US
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20120096424 | Interconnect and Transistor Reliability Analysis for Deep Sub-Micron Designs - A system and method for providing a statistical budgeting approach to modeling reliability effects such as interconnect electromigration (EM), transistor time-dependant dielectric breakdown (TDDB), hot-carrier injection effects (HCI) and bias temperature instability (BTI) is disclosed. A static analysis flow captures the effects of design topology, switching constraints, interactions between signal nets and supply rails as well as thermal gradients due to interconnect and transistor self as well as mutual heating, and was used to verify successive iterations of deep sub-micron integrated circuit designs. | 04-19-2012 |
Andrew W. Daga, Malvern, PA US
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20150145345 | Method and Apparatus for Wireless Transmission of Line Frequency, Line Voltage Alternating Current - A wireless power transmission circuit for wirelessly transmitting line frequency sinusoidal AC power to a load where the line frequency ripple filter of conventional circuits is eliminated and a DC-to-AC inverter is replaced by a simple polarity inversion circuit. The envelope of the high frequency AC on the AC line frequency source side is not constant but varies continuously in a half-sinusoidal fashion at the line frequency. Wireless transmission occurs only with a half-sinusoidal, constantly varying envelope, not the constant amplitude envelope of prior art. High frequency rectification and high frequency ripple filtering occurs as in the prior art but the ripple filter time constant is selected so that resulting waveform is an accurate replica of the rectified line frequency voltage present on the transmitter side. A polarity inversion stage replaces the DC-to-AC inverter of conventional art to generate the line frequency AC. | 05-28-2015 |
Andrew William Daga, Malvern, PA US
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20130300209 | MTHOD OF AND APPARATUS FOR GENERATING AN ADJUSTABLE REACTANCE - A method for adjusting reactance includes an adjustable reactance generator including a comparator receiving an input sinusoidal waveform and outputting a square wave that retains the frequency and phase of the applied sinusoidal waveform. The reactance adjustment is generated using a power switching circuit that receives the square wave from the comparator as a control signal and outputs a square wave that retains the frequency and phase of the applied sinusoidal voltage waveform, an adjustable power supply that adjusts the amplitude of the square wave output by the power switching circuit, and an amplitude detector that controls the output level of the adjustable power supply. The power switching circuit output, when converted to a sinusoid, provides the effect of an adjustable reactance. | 11-14-2013 |
Bharat Daga, Fremont, CA US
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20090184735 | AUTOMATIC PHASE-DETECTION CIRCUIT FOR CLOCKS WITH KNOWN RATIOS - An automatic phase detection circuit for generating an internal synchronization signal when two clock input signals achieve a certain phase relationship. No external reference signal is required. The logic state of one clock is sampled on the active edge of the other clock and stored in a shift register. The content of the shift register is compared to a pre-defined signature and a sync signal is generated when the content matches the pre-defined signature. A mask register may be used to define which bits of the shift register and pre-defined signature are compared. | 07-23-2009 |
Bharat K. Daga, Fremont, CA US
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20100241814 | BANDWIDTH-EFFICIENT DIRECTORY-BASED COHERENCE PROTOCOL - Some embodiments of the present invention provide a system that processes a request for a cache line in a multiprocessor system that supports a directory-based cache-coherence scheme. During operation, the system receives the request for the cache line from a requesting node at a home node, wherein the home node maintains directory information for all or a subset of the address space which includes the cache line. Next, the system performs an action at the home node, which causes a valid copy of the cache line to be sent to the requesting node. The system then completes processing of the request at the home node without waiting for an acknowledgment indicating that the requesting node received the valid copy of the cache line. | 09-23-2010 |
20100332944 | FACILITATING ERROR DETECTION AND CORRECTION AFTER A MEMORY COMPONENT FAILURE - Some embodiments of the present invention provide a system that can be reconfigured to provide error detection and correction after a failure of a memory component in a memory system. During operation, the system accesses a block of data from the memory system, wherein each block of data in the memory system includes an array of bits logically organized into R rows and C columns, including two checkbit columns containing checkbits, and C-2 data-bit columns containing data bits, wherein each column is stored in a different memory component, and wherein the checkbits are generated from the data bits to provide block-level detection and correction for a failed memory component. Next, upon examining the block of data, the system determines that a specific memory component in the memory system has failed. If the failed memory component contains a data-bit column for the block of data, the system uses checkbits from the two checkbit columns to correct the data-bit column, and then stores the corrected data-bit column. Next, the system generates and stores new checkbits in a functioning memory component, wherein the new checkbits provide single-error-correction and double-error-detection for erroneous bits in the block of data, but do not provide for detection and correction of a failed memory component. | 12-30-2010 |
20110047346 | EFFICIENT INTERLEAVING BETWEEN A NON-POWER-OF-TWO NUMBER OF ENTITIES - Some embodiments of the present invention provide a system that maps an address to an entity, wherein the mapping interleaves addresses between a number of entities. During operation, the system receives an address A from a set of X consecutive addresses, wherein the address A is to be mapped to an entity E in a set of Y entities, and wherein Y need not be a power of two. Next, the system obtains F=floor(log | 02-24-2011 |
20110289368 | MEMORY SYSTEM THAT SUPPORTS PROBALISTIC COMPONENT-FAILURE CORRECTION WITH PARTIAL-COMPONENT SPARING - The disclosed embodiments relate to a memory system that facilitates probabilistic error correction for a failed memory component with partial-component sparing. During operation, the memory system accesses blocks of data, wherein each block of data includes an array of bits logically organized into R rows and C columns. The C columns include (1) a row-checkbit column containing row-parity bits for each of the R rows, (2) an inner-checkbit column containing X=R−S inner checkbits and S spare bits, and ( | 11-24-2011 |
20110289381 | MEMORY SYSTEM THAT PROVIDES GUARANTEED COMPONENT-FAILURE CORRECTION WITH DOUBLE-ERROR CORRECTION - The disclosed embodiments relate to a memory system that provides guaranteed component-failure correction and double-error correction. During operation, the memory system accesses a block of data, wherein each block of data in the memory system includes an array of bits logically organized into R rows and C columns. The C columns include (1) a row-checkbit column containing row checkbits for each of the R rows, (2) an inner-checkbit column containing R inner checkbits, and (3) C-2 data-bit columns containing databits. In addition, each column is stored in a different memory component, and the checkbits are generated from the databits to provide block-level correction for a failed memory component, and double-error correction for errors in different memory components. Next, the system calculates a row syndrome and an inner syndrome for the block of data, wherein the inner syndrome that results from any two-bit error in the same row is unique. If the row syndrome and the inner syndrome are both non-zero, the system determines from the row syndrome and the inner syndrome whether errors in the block of data are associated with a failed memory component. If not, and if exactly two bits in the row syndrome are one, the system assumes that there exists a single-bit error in each of the two rows which have a row syndrome of one, and compares the calculated inner syndrome against inner syndromes for all possible combinations of one-bit errors occurring in each of the two rows. Then, if the comparison matches a given inner syndrome, the system corrects the two bits associated with the given inner syndrome. | 11-24-2011 |
Bharat K. Daga, Framont, CA US
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20100077240 | METHODS AND APPARATUSES FOR REDUCING POWER CONSUMPTION OF FULLY-BUFFERED DUAL INLINE MEMORY MODULES - Methods and apparatuses are presented for reducing the power consumed in an in-line memory module. In some embodiments, the method may include monitoring a memory requirement of a computer system, the computer system comprising a plurality of memory modules. In the event that the memory requirement changes, unmapping at least one of the plurality of memory modules and maintaining a low power state for the at least one unmapped memory module. The method may further comprise selectively re-initializing the plurality of memory modules such that the at least one unmapped memory module remains in a low power state while the remainder of the plurality of memory modules are in a non-low power state. Where, in the event that the memory requirement changes again, the method also may comprise re-programming the memory controller with an identifier associated with the at least one unmapped memory module. | 03-25-2010 |
Dushyant R. Daga, Ridgefield, CT US
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20130321148 | MOBLE GAS DETECTION CART WITH WIRELESS TRANSCEIVER - An apparatus comprises at least one frame, wheels operatively connected to the frame, at least one processor operatively connected to the frame, a plurality of gas detectors operatively connected to the processor, and at least one wireless transceiver operatively connected to the processor. Further, a rechargeable power storage unit is operatively connected to the processor, the gas detectors, and the wireless transceiver. | 12-05-2013 |
Gaurav Daga, Redmond, WA US
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20080201485 | Printer user interface redirection over a terminal services session - User interface (“UI”) redirection for a local device, such as a printer that is operatively coupled to a client, is provided by an arrangement in which a dummy driver is installed on the terminal server. When an application on the terminal server makes a call to show a UI, the dummy driver redirects the call to a process operating on the client that exposes the specific UI associated with the local device. User input to the UI indicative of preferences and/or other user-selected parameters is recorded and passed to the terminal server through the dummy driver and reported to the calling application. In an illustrative example, the terminal server and client communicate over a virtual channel using a remote desktop protocol in order to redirect print jobs to a local printer that is coupled to the client either directly or over a network such as a local area network. | 08-21-2008 |
20080246985 | Printer Redirection - In client-server architectures, systems and methods for XPS based printer redirection are disclosed. In an implementation, a client computing device issues a print command to print an application hosted on a server computing device. The server computing device implements a generic printer driver to emulate exact properties of a client printer driver installed in the client computing device. The generic printer driver redirects one or more calls related to printer settings to the client printer driver. The client computing device returns the printer settings which are combined with the application (to be printed) to generate an XPS file. The XPS file is redirected to a printer connected to the client computing device for printing. | 10-09-2008 |
Mayank Daga, Austin, TX US
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20160140084 | EFFICIENT SPARSE MATRIX-VECTOR MULTIPLICATION ON PARALLEL PROCESSORS - A method of multiplication of a sparse matrix and a vector to obtain a new vector and a system for implementing the method are claimed. Embodiments of the method are intended to optimize the performance of sparse matrix-vector multiplication in highly parallel processors, such as GPUs. The sparse matrix is stored in compressed sparse row (CSR) format. | 05-19-2016 |
Subhash Singh Daga, Cupertino, CA US
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20130232401 | METHOD AND APPARATUS FOR PROVIDING COMB TEXT FIELD INPUTS ON A MOBILE DEVICE - A computer implemented method and apparatus for providing comb field text inputs on a mobile device comprising displaying a document on a mobile device, detecting entry of a comb field of the document on the mobile device, the comb field comprising at least one comb cell, determining a size of a canvas that fits onto the comb field on the mobile device, and generating a mobile platform canvas based on the comb field parameters, the mobile platform canvas capable of receiving at least one text character input. | 09-05-2013 |
Subhash Singh Daga, Sunnyvale, CA US
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20140040718 | TRACKING NEW SUBMISSIONS FOR AN ONLINE FORMS SERVICE - A method and system to track new submissions for an online forms service is provided. The system may include a request detector to detect a request to load a view (e.g., a web page) and a view provider to provide the view for display in response to the request. The view may comprise submission information for an electronic form and a value indicative of a number of new submissions. | 02-06-2014 |
Vijay Daga, Sunnyvale, CA US
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20160023422 | HEAT RECOVERABLE TUBE ASSEMBLY AND ADHESIVE COMPOSITION FOR HEAT RECOVERABLE TUBE ASSEMBLY - A tube assembly includes glass fiber, a heat-recovered heat recoverable tube surrounding at least a portion of the glass fiber, an adhesive having an adhesive composition comprising a reactive polyethylene and a reactive propylene copolymer. The adhesive adhesively couples the heat-recovered heat recoverable tube to the glass fiber. The adhesive composition includes a reactive polyethylene, such as, a maleic anhydride modified linear low density polyethylene resin, and a reactive propylene copolymer, such as, a maleic anhydride grafted polypropylene copolymer. The adhesive composition is capable of adhering to glass fiber with an axial load of 5 N at 70° C. for a period of at least 60 seconds. | 01-28-2016 |
Vikram Daga, Evansville, IN US
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20130317143 | FLAME RETARDANT POLYCARBONATE COMPOSITIONS, METHODS OF MANUFACTURE THEREOF AND ARTICLES COMPRISING THE SAME - Disclosed herein is a flame retardant composition comprising 20 to 80 weight percent of a polycarbonate composition; where the polycarbonate composition comprises a polysiloxane-carbonate copolymer; an impact modifier in an amount of 0.5 to 25 weight percent; and 1 to 20 weight percent of a phosphazene compound; where all weight percents are based on the total weight of the flame retardant composition. Disclosed herein too is a method comprising blending 20 to 80 weight percent of a polycarbonate composition; where the polycarbonate composition comprises a polysiloxane-carbonate copolymer; an impact modifier in an amount of 0.5 to 25 weight percent; and 1 to 20 weight percent of a phosphazene compound to produce a flame retardant composition; where all weight percents are based on the total weight of the flame retardant composition; and extruding and molding the flame retardant composition. | 11-28-2013 |
20130317149 | FLAME RETARDANT COMPOSITIONS, ARTICLES COMPRISING THE SAME AND METHODS OF MANUFACTURE THEREOF - Disclosed herein is a flame retardant composition comprising a polycarbonate; a polylactide; and a flame retardant; where the flame retardant is a phenoxyphosphazene, a di- or polyfunctional aromatic phosphorus-containing compound, or a combination comprising at least one of the foregoing flame retardants. Disclosed herein is a method comprising blending a polycarbonate, a polylactide and a flame retardant to form a flame retardant composition; where the flame retardant is a phenoxyphosphazene, a di- or polyfunctional aromatic phosphorus-containing compound, or a combination comprising at least one of the foregoing flame retardants. | 11-28-2013 |
Vikram K. Daga, Amherst, MA US
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20110086985 | INDUCED POLYMER ASSEMBLIES - The invention provides compositions and methods for inducing and enhancing order and nanostructures in block copolymers and surfactants by certain nonpolymeric additives, such as nanoparticles having an inorganic core and organic functional groups capable of hydrogen bonding. Various compositions having lattice order and nanostructures have been made from a variety of copolymers or surfactants that are mixed with nonpolymeric additives. Particularly, a variety of nanoparticles with an inorganic core and organic functional groups have been discovered to be effective in introducing or enhancing the degree of orders and nanostructures in diverse block copolymers and surfactants. | 04-14-2011 |
20130310525 | INDUCED POLYMER ASSEMBLIES - The invention provides compositions and methods for inducing and enhancing order and nanostructures in block copolymers and surfactants by certain nonpolymeric additives, such as nanoparticles having an inorganic core and organic functional groups capable of hydrogen bonding. Various compositions having lattice order and nanostructures have been made from a variety of copolymers or surfactants that are mixed with nonpolymeric additives. Particularly, a variety of nanoparticles with an inorganic core and organic functional groups have been discovered to be effective in introducing or enhancing the degree of orders and nanostructures in diverse block copolymers and surfactants. | 11-21-2013 |
Vikram K. Daga, Evansville, IN US
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20140066556 | HEAT RESISTANCE IN POLYCARBONATE COMPOSITIONS - Disclosed herein are methods and compositions of blended polycarbonate compositions with improved heat resistance. The resulting compositions, comprising a first polycarbonate polymer, a second polycarbonate polycarbonate, an impact modifier, optionally a flow promoter, and optionally a flame retardant, can be used in the manufacture of articles while still retaining the advantageous physical properties of blended polycarbonate compositions with improved heat resistance. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present invention. | 03-06-2014 |
20140200302 | POLYCARBONATE BLEND COMPOSITIONS CONTAINING RECYCLE FOR IMPROVEMENT IN SURFACE AESTHETICS - Disclosed herein are compositions and methods for the manufacture of polycarbonate blend compositions containing recycle for improvement in surface aesthetics. The resulting compositions, can be used in the manufacture of articles while still retaining the advantageous physical properties of polycarbonate blend reference compositions that do not contain recycle material. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present invention. | 07-17-2014 |
20150080515 | MINERAL REINFORCED THERMOPLASTIC POLYMER COMPOSITIONS WITH IMPROVED PROPERTIES - Disclosed herein are methods and compositions of thermoplastic compositions with improved flow and impact properties. The resulting compositions, comprising one or more polycarbonate polymers, an impact modifier, and a poly(alkylene oxide) additive, can be used in the manufacture of articles requiring improved flow characteristics while still retaining the advantageous physical properties of thermoplastic compositions. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present invention. | 03-19-2015 |
20150099845 | FLAME RETARDANT THERMOPLASTIC COMPOSITIONS WITH IMPROVED PROPERTIES - Disclosed herein are blended thermoplastic compositions comprising at least one polycarbonate component, at least one impact modifier component, and at least one flame retardant component. The resulting flame retardant compositions can be used in the manufacture of articles requiring materials with high impact strength and ductility, good flow, thin wall flame retardancy and good thermal resistance. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present invention. | 04-09-2015 |
Vinod Daga, Santa Clara, CA US
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20140304239 | SYSTEMS AND METHODS FOR SCHEDULING DEDUPLICATION OF A STORAGE SYSTEM - Systems for deduplicating one or more storage units of a storage system provide a scheduler, which is operable to select at least one storage unit (e.g. a storage volume) for deduplication and perform a deduplication process, which removes duplicate data blocks from the selected storage volume. The systems are operable to determine the state of one or more storage units and manage deduplication requests in part based state information. The system is further operable to manage user generated requests and manage deduplication requests in part based on user input information. The system may include a rules engine which prioritizes system operations including determining an order in which to perform state-gathering information and determining an order in which to perform deduplication. The system is further operable to determine the order in which storage units are processed. | 10-09-2014 |
20160034489 | SCHEDULING DEDUPLICATION IN A STORAGE SYSTEM - A system can maintain multiple queues for deduplication requests of different priorities. The system can also designate priority of storage units. The scheduling priority of a deduplication request is based on the priority of the storage unit indicated in the deduplication request and a trigger for the deduplication request. | 02-04-2016 |
Vinod Kumar Daga, Santa Clara, CA US
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20130262404 | Systems, Methods, And Computer Program Products For Scheduling Processing To Achieve Space Savings - A method performed in a system that has a plurality of volumes stored to storage hardware, the method including generating, for each of the volumes, a respective space saving potential iteratively over time and scheduling space saving operations among the plurality of volumes by analyzing each of the volumes for space saving potential and assigning priority of resources based at least in part on space saving potential. | 10-03-2013 |
20140358873 | Systems, Methods, and Computer Program Products for Scheduling Processing to Achieve Space Savings - A method performed in a system that has a plurality of volumes stored to storage hardware, the method including generating, for each of the volumes, a respective space saving potential iteratively over time and scheduling space saving operations among the plurality of volumes by analyzing each of the volumes for space saving potential and assigning priority of resources based at least in part on space saving potential. | 12-04-2014 |