Lujan, US
Brandon Lujan, Berkeley, CA US
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20150015846 | Directional Optical Coherence Tomography Systems and Methods - An optical coherence tomography system that includes an optical device having an adjustable optical element configured to displace a pupil entry point of light is provided. Optical coherence tomography methods using the optical coherence tomography system are also provided. The subject optical coherence tomography systems and methods find use in a variety of different applications, including imaging applications. | 01-15-2015 |
Carlos J. Lujan, Tucson, AZ US
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20140380099 | BASE PROTOCOL LAYER TESTING DEVICE - Embodiments relate to testing of a computing system using a base protocol layer testing device. An aspect includes, based on determining, by the base protocol layer testing device, that a current test comprises a test of a base protocol layer of the computing system, enabling a low level test assist device of the base protocol layer testing device for the current test, wherein the low level test assist device comprises a hardware device that is directly attached to an input/output (I/O) card of the computing system. Another aspect includes storing base protocol layer traffic that passes through the I/O card by the low level test assist device during performance of the current test by the base protocol layer testing device. Yet another aspect includes analyzing the stored base protocol layer traffic after completion of the current test to determine a result of the current test. | 12-25-2014 |
20150019914 | BASE PROTOCOL LAYER TESTING DEVICE - Embodiments relate to testing of a computing system using a base protocol layer testing device. An aspect includes, based on determining, by the base protocol layer testing device, that a current test comprises a test of a base protocol layer of the computing system, enabling a low level test assist device of the base protocol layer testing device for the current test, wherein the low level test assist device comprises a hardware device that is directly attached to an input/output (I/O) card of the computing system. Another aspect includes storing base protocol layer traffic that passes through the I/O card by the low level test assist device during performance of the current test by the base protocol layer testing device. Yet another aspect includes analyzing the stored base protocol layer traffic after completion of the current test to determine a result of the current test. | 01-15-2015 |
Carlos Jacobo Lujan, Tucson, AZ US
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20100071423 | PORTABLE ELECTRONIC DEVICE COMPRISING AN INTEGRATED LOCK MECHANISM - An article of manufacture, such as a laptop computer, comprising a housing, a processor disposed within the housing, a computer readable medium disposed within the housing and in communication with the processor, a lock mechanism disposed within the housing, wherein the lock mechanism can be moved between a locked configuration and an unlocked configuration, and computer readable program code encoded in the computer readable medium and useable with the processor, the computer readable program code comprising a series of computer readable program steps to effect moving the lock mechanism between the locked configuration and the unlocked configuration. | 03-25-2010 |
Jeff Lujan, Austin, TX US
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20130045803 | Cross-platform gaming between multiple devices of multiple types - Cross-platform gaming between multiple devices of multiple types, including: determining, by a cross-platform gaming server, the device type of a first gaming device; sending, in dependence upon the device type of the first gaming device, a gaming application from the cross-platform gaming server to the first gaming device; determining, by the cross-platform gaming server, the device type of the second gaming device; sending, in dependence upon the device type of the second gaming device, a gaming application from the cross-platform gaming server to the second gaming device; and communicating, in real-time, between the gaming application on the first gaming device and the gaming application on the second gaming device. | 02-21-2013 |
J. Luis Lujan, Mayfield Heights, OH US
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20120116211 | Methods for identifying target stimulation regions associated with therapeutic and non-therapeutic clinical outcomes for neural stimulation - method for identifying and activating specific axonal pathways for achieving therapeutic benefits during a neural stimulation, such as deep brain stimulation. Clinical data, diffusion tensor tractography, and computer models of patient-specific neurostimulation may be used to identify particular axonal pathways activated by deep brain stimulation and to determine their correlations with specific clinical outcomes. | 05-10-2012 |
20130218819 | SYSTEM AND METHOD TO ESTIMATE REGION OF TISSUE ACTIVATION - A computer-implemented method for determining the volume of activation of neural tissue. In one embodiment, the method uses one or more parametric equations that define a volume of activation, wherein the parameters for the one or more parametric equations are given as a function of an input vector that includes stimulation parameters. After receiving input data that includes values for the stimulation parameters and defining the input vector using the input data, the input vector is applied to the function to obtain the parameters for the one or more parametric equations. The parametric equation is solved to obtain a calculated volume of activation. | 08-22-2013 |
J. Luis Lujan, Cleveland, OH US
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20090118635 | AUTOMATED 3D BRAIN ATLAS FITTING USING INTRA-OPERATIVE NEUROPHYSIOLOGICAL DATA - A method includes storing in memory preoperative brain atlas data. Neurophysiological data is obtained intra-operatively for a plurality of known sites in a brain of a given patient to provide corresponding intra-operative neurophysiological data for at least a portion of the sites. A constrained optimization is performed to fit the pre-operative brain atlas data based at least in part on the intra-operative neurophysiological data. | 05-07-2009 |
20110191275 | SYSTEM AND METHOD TO ESTIMATE REGION OF TISSUE ACTIVATION - A computer-implemented method for determining the volume of activation of neural tissue. In one embodiment, the method uses one or more parametric equations that define a volume of activation, wherein the parameters for the one or more parametric equations are given as a function of an input vector that includes stimulation parameters. After receiving input data that includes values for the stimulation parameters and defining the input vector using the input data, the input vector is applied to the function to obtain the parameters for the one or more parametric equations. The parametric equation is solved to obtain a calculated volume of activation. | 08-04-2011 |
Leonard D. Lujan, Carthage, MO US
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20090178201 | Adjustable Bed Having Movable Lumbar Support - An adjustable bed includes an articulated deck comprising head, seat, leg and foot deck boards hingedly joined together and supported from a frame movable relative to a stationary base. An lumbar support assembly, including a linear actuator operatively coupled to one of the deck boards, includes a plate which may be raised or lowered through an opening the articulated deck. | 07-16-2009 |
Pedro S. Lujan, Toledo, OH US
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20120316031 | Controlling a Transmission Skip Change Upshift - A method for controlling a transmission gear change to a desired gear includes disengaging an offgoing transmission control element, changing engine speed to a synchronous speed of the desired gear, decreasing engine output torque, and engaging an oncoming transmission control element. | 12-13-2012 |
Rene Lujan, Sunnyvale, CA US
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20090289333 | Annealing a Buffer Layer for Fabricating Electronic Devices on Compliant Substrates - A method of forming a thin-film layered electronic device over a flexible substrate comprises the steps of depositing a buffer layer over the flexible substrate, heating the substrate and buffer layer stack to a temperature at which plastic deformation of the buffer layer takes place, cooling the stack, then forming the thin-film electronic device over the plastically deformed buffer layer without further plastic deformation of the buffer layer. The heating and cooling to cause plastic deformation of the buffer layer is referred to as annealing. The thin-film electronic device is formed by a process according to which all steps are performed at a temperature below that at which further plastic deformation of the buffer layer occurs. In-process strain and runout are reduced, improving device yield on flexible substrates. An optional metal base layer may be formed over the buffer layer prior annealing. | 11-26-2009 |
20090294767 | Isolated Sensor Structures Such As For Flexible Substrates - A photosensor structure includes a pixel metal layer disposed in physical and electrical contact with a pixel thin film transistor and a lower sensor layer of a p-i-n photosensor. The pixel metal layer extends laterally to an extent less that the lower sensor layer such that an overhang region is defined below the lower sensor layer and the adjacent the lateral edge of the pixel metal layer. When the relatively thick intrinsic sensor layer is formed over the lower sensor layer, it attaches to the upper surface and, due to the presence of the overhang region, the lateral edge of the lower sensor layer, forming a discrete intrinsic sensor layer structure over the pixel which is physically isolated from adjacent corresponding structures. This isolation allows for thermal expansion and contraction during formation of the intrinsic sensor layer without cracking the intrinsic sensor layer structure. | 12-03-2009 |
20090294768 | SELF-ALIGNED THIN-FILM TRANSISTOR AND METHOD OF FORMING SAME - A method of manufacturing a thin-film transistor or like structure provides conductive “tails” below an overhang region formed by a top gate structure. The tails increase in thickness as they extend outward from a point under the overhang to the source and drain contacts. The tails provide a low resistance conduction path between the source and drain regions and the channel, with low parasitic capacitance. The thickness profile of the tails is controlled by the deposition of material over and on the lateral side surfaces of the gate structure. | 12-03-2009 |
20090298240 | SELF-ALIGNED THIN-FILM TRANSISTOR AND METHOD OF FORMING SAME - A method of manufacturing a thin-film transistor or like structure provides conductive “tails” below an overhang region formed by a top gate structure. The tails increase in thickness as they extend outward from a point under the overhang to the source and drain contacts. The tails provide a low resistance conduction path between the source and drain regions and the channel, with low parasitic capacitance. The thickness profile of the tails is controlled by the deposition of material over and on the lateral side surfaces of the gate structure. | 12-03-2009 |
20120205656 | Thin-Film Electronic Devices Including Pre-Deformed Compliant Substrate - A thin-film layered electronic device, or array of devices, is formed over a layer structure comprising a flexible substrate, a buffer layer, and a metal layer. The layer structure is annealed to permanently deform the layer structure beyond its plastic deformation limit. The thin-film electronic device is formed thereover by a process according to which all steps are performed at a temperature below that at which further plastic deformation of the buffer layer occurs. In-process strain and runout are reduced, improving device yield on flexible substrates. The metal layer forms a first layer of the thin-film layered device, or array of devices. | 08-16-2012 |
Rene A. Lujan, Sunnyvale, CA US
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20090159940 | STRUCTURE AND METHOD FOR FLEXIBLE SENSOR ARRAY - A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array. | 06-25-2009 |
20100181604 | STRUCTURE AND METHOD FOR FLEXIBLE SENSOR ARRAY - A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array. | 07-22-2010 |
20100252927 | Pattern-Print Thin-Film Transistors with Top Gate Geometry - A self-aligned, thin-film, top-gate transistor and method of manufacturing same are disclosed. A first print-patterned mask is formed over a metal layer by digital lithography, for example by printing with a phase change material using a droplet ejector. The metal layer is then etched using the first print-patterned mask to form source and drain electrodes. A semiconductive layer and an insulative layer are formed thereover. A layer of photosensitive material is then deposited and exposed through the substrate, with the source and drain electrodes acting as masks for the exposure. Following development of the photosensitive material, a gate metal layer is deposited. A second print-patterned mask is then formed over the device, again by digital lithography. Etching and removal of the photosensitive material leaves the self-aligned top-gate electrode. | 10-07-2010 |
Scott Lujan, Chapel Hill, NC US
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20090221530 | Relaxase Modulators and Methods of Using Same - Methods of treating a microbial infection in a subject by administering to the subject an effective amount of a compound that modulates an enzymatic activity of a relaxase polypeptide is provided. Methods of inhibiting bacterial conjugation by modulating activity of a relaxase polypeptide in a bacterium are also provided. Novel compounds that modulate relaxase enzymes and assays for measuring kinetics of relaxase enzymes and selecting for modulators of relaxase enzyme activity are further provided. | 09-03-2009 |
Thomas R. Lujan, Minnetonka, MN US
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20120263529 | Waterproof roadbed construction - A process for hardening and rendering a roadbed water resistant by measuring and ensuring the clay content of the roadbed soil is a minimum of 12%, amending the soil to bring the clay content within this range. Treating the top six inches of the roadbed soil with an enzyme formulation and removing and setting aside the treated roadbed soil. Applying two mixtures of organo-silane solution to soil remaining in the roadbed in two separate steps, allowing the treated soil to cure between applications. Adding the enzyme treated soil back onto the roadbed, compacting and crowning the soil, then spraying the surface of the treated roadbed and its associated shoulders with the organo-silane mixture. Once again, the organo-silane mixture is applied in a two step process with two different dilutions of the organo-silane formulation to form a hardened and water resistant envelope of soil within the roadbed. | 10-18-2012 |