Youk Hee
Youk Hee Kim, Gyeonggi-Do KR
Patent application number | Description | Published |
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20100329048 | PRECHARGE SIGNAL GENERATOR AND SEMICONDUCTOR MEMORY DEVICE - A precharge signal generator having a latch signal generator, an internal signal generator, and a pulse generator is presented. The latch signal generator is configured to generate a latch signal that is activated in response to an auto-precharge command and inactivated in response to an active pulse. The internal signal generator is configured to generate an internal signal activated when a delayed active signal and the latch signal are all activated. The pulse generator is configured to generate a precharge signal including a pulse that is activated in a period for which the internal signal is being active. | 12-30-2010 |
Youk Hee Kim, Seoul KR
Patent application number | Description | Published |
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20090168589 | Thermal code transmission circuit and semiconductor memory device using the same - Disclosed are a thermal code transmission circuit and a semiconductor memory device using the same. The thermal code transmission circuit includes a select signal generator which generates a select signal in response to a first enable signal, a level signal generator which receives the first enable signal to generate a level signal, an update signal generator which receives the level signal and a first update signal to generate a second update signal, a latch unit which receives a thermal code in response to the second update signal and outputs the thermal code as an output thermal code, and a thermal code output unit which selectively outputs the output thermal code in response to the select signal. | 07-02-2009 |
20100246279 | Pipe latch circuit and semiconductor memory device using the same - A pipe latch circuit comprises a reset signal generating unit which receives a read-write flag signal and a read period signal and generates a reset signal, wherein the reset signal is enabled upon entry into a write operation or after all data are outputted to an outside upon read operation, an input/output control signal generating unit which generates a plurality of input control signals and output control signals in response to a read strobe signal and a clock signal, and is reset in response to the reset signal, and a pipe latch unit which latches inputted data in response to the input control signals and outputs the latched data in response to the output control signals. | 09-30-2010 |
Youk Hee Kim, Icheon-Si KR
Patent application number | Description | Published |
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20140048803 | SEMICONDUCTOR DEVICE CAPABLE OF TESTING BONDING OF PAD - A test circuit includes a phase difference detection unit and a determination unit. The phase difference detection unit detects a phase difference between a first signal received through a first pad and a second signal received through a second pad. The determination unit compares the detected phase difference with a preset amount of delay and outputs a result signal. | 02-20-2014 |