Patent application number | Description | Published |
20090323515 | OFDM TRANSMITTTER AND OFDM RECEIVER - In an environment with large transmission delays, use of an OFDM transmitter which includes: a pilot/data allocator for allocating pilot/data symbols on OFDM symbols and an OFDM receiver which includes: an antenna for receiving the OFDM signals sent out from the antenna of this OFDM transmitter; a ratio unit for frequency transforming the OFDM signals received as RF signals to baseband signals; a frequency offset estimate for estimating an offset value; and a frequency offset corrector for performing frequency compensation by the amount of the frequency offset, improves data transmission efficiency while reducing interference of data between sub-carriers to prevent degradation of reception characteristics by performing appropriate frequency offset correction. | 12-31-2009 |
20110003551 | TRANSMITTER, RECEIVER, TRANSMISSION METHOD, AND RECEPTION METHOD - A transmitter which communicates with a receiver. The transmitter includes a null subcarrier allocation unit which allocates a null subcarrier based on a priority and a signal. The priority is for allocating a null subcarrier to each subcarrier. The priority is a ranking predetermined with the receiver. The signal is allocated to each subcarrier. The transmitter includes a transmission unit which transmits the signal using the subcarrier allocated by the null subcarrier allocation unit as the null subcarrier to the receiver. | 01-06-2011 |
20110038398 | COMMUNICATION SYSTEM, TRANSMITTER, RECEIVER AND COMMUNICATION METHOD - A transmitter communicating with a receiver, the transmitter including: a first hopping sequence generation unit which generates a hopping sequence whose hopping subcarrier interval is less than or equal to a predetermined threshold value based on a cell ID; a first reference signal pattern generation unit which generates a reference signal pattern based on a reference signal basic pattern including a predetermined known signal sequence and the hopping sequence generated by the first hopping sequence generation unit; an arrangement unit which arranges the reference signal and a data symbol in a predetermined position within the symbol, based on the reference signal pattern generated by the first reference signal pattern generation unit; and a signal transmission unit which transmits the symbol having the reference signal and the data symbol arranged by the arrangement unit to the receiver. | 02-17-2011 |
20110116438 | COMMUNICATION SYSTEM, RECEPTION DEVICE, AND COMMUNICATION METHOD - A communication system includes a reception device and at least one transmission device. The transmission device includes: a signal transmission unit which transmits at least one unicast signals and a multicast signal to the reception device. The reception device includes: a plurality of signal reception units which receive at least one the unicast signals and the multicast signal from the transmission device; a first control unit which receives the unicast signals from the transmission device using all of the plurality of signal reception units when only the unicast signals are received; and a second control unit which receives the unicast signals from the transmission device using some of the plurality of signal reception units, and simultaneously receives the multicast signal from the transmission device using another signal reception unit of the plurality of signal reception units, when the unicast signals and the multicast signal are received. | 05-19-2011 |
20110217961 | COMMUNICATION SYSTEM, BASE STATION DEVICE, MOBILE STATION DEVICE, AND COMMUNICATION METHOD - A communication system includes a unicast base station device, a multicast base station device, and a mobile station device. Before receiving information concerning a multicast service, the mobile station device transmits, to a position register server, identification information identifying a reception area in which a multicast service is provided. When receiving incoming call information indicating that information concerning a unicast service has been received, the multicast base station device transmits the incoming call information to the mobile station device. The mobile station device receives the incoming call information even while receiving the information concerning the multicast service. | 09-08-2011 |
20110256840 | SYNCHRONIZATION DEVICE, RECEPTION DEVICE, SYNCHRONIZATION METHOD, AND RECEPTION METHOD - A synchronization device including a plurality of counter sections each outputting a numerical signal indicating a counted number by detecting a clock, the synchronization device includes: a first counter section which outputs the numerical signal; a counter synchronization signal output section which outputs a counter synchronization signal indicating the same number as the number indicated by the numerical signal output by the first counter section; and a second counter section which outputs a numerical signal indicating the same number at the same timing as that of the first counter section based on the number indicated by the counter synchronization signal output by the counter synchronization signal output section. | 10-20-2011 |
20120077445 | WIRELESS COMMUNICATION SYSTEM, WIRELESS COMMUNICATION METHOD, BASE STATION APPARATUS, AND TERMINAL STATION APPARATUS - A wireless communication system includes a terminal station apparatus and a base station apparatus which transmits data to the terminal station apparatus using a plurality of component carriers that are communication frequency bands in which wireless communication is performed. The base station apparatus includes: a frequency band determination unit which determines component carriers in which data is transmitted and notifies the terminal station apparatus of the determined component carriers on the basis of radio quality of each of the plurality of component carriers when transmission of the data to the terminal station apparatus is initiated or when the component carriers to be used for transmission of the data to the terminal station apparatus are changed. | 03-29-2012 |
20120094706 | WIRELESS COMMUNICATION SYSTEM, WIRELESS COMMUNICATION METHOD, TERMINAL APPARATUS, AND COMMUNICATION APPARATUS - A wireless communication system includes at least one terminal apparatus and one communication apparatus which perform communication in a plurality of frequency bands. The terminal apparatus includes: a function information storing unit which pre-stores frequency band information indicating available frequency bands among the plurality of frequency bands and the number of simultaneously available frequency bands; and a terminal control unit which reads the frequency band information stored in the function information storing unit and transmits the read frequency band information to the communication apparatus via a first wireless communication unit. The communication apparatus includes: a base station control unit which selects at least one frequency band from the plurality of frequency bands based on the frequency band information transmitted from the terminal apparatus; and a second wireless communication unit which communicates with the terminal apparatus by use of the frequency band selected by the base station control unit. | 04-19-2012 |
Patent application number | Description | Published |
20080253171 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes: a memory cell array including a plurality of SRAM memory cells; a characteristic measuring circuit including a plurality of transistor circuits connected in parallel; and a first terminal. The plurality of transistor circuits each include a first transistor configured in the same manner as one of transistors included in one of the SRAM memory cells. The first transistor is connected so as to control current between the first terminal and a node at a reference potential according to a voltage supplied to a gate of the first transistor. | 10-16-2008 |
20090161412 | SEMICONDUCTOR MEMORY - In a semiconductor memory including word lines and bit lines arranged in a matrix and a plurality of memory cells provided at intersections of the word lines and the bit lines, a bit line precharge circuit is provided for controlling the potential of a low-data holding power supply coupled to memory cells provided on a corresponding one of the bit lines. In a write operation, the bit line precharge circuit controls the potential of a low-data holding power supply of a memory cell corresponding to a selected bit line to be higher than the potential of a low-data holding power supply of a memory cell corresponding to an unselected bit line. | 06-25-2009 |
20090201745 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a memory cell having a circuit configuration in which a potential supplied to sources of load transistors | 08-13-2009 |
20100277991 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a memory cell having a circuit configuration in which a potential supplied to sources of load transistors | 11-04-2010 |
20110007575 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device comprises a plurality of memory cells each including a holding circuit for holding memory data, and a read-only output circuit for outputting a signal corresponding to the data held by the holding circuit. The read-only output circuit has a read drive transistor controlled in accordance with a signal held by the holding circuit. A gate length of the read drive transistor is longer than a gate length of a transistor included in the holding circuit. Alternatively, the read-only output circuit has a read access transistor controlled in accordance with a read word select signal, and a gate length of the read access transistor is longer than a gate length of a transistor included in the holding circuit. | 01-13-2011 |
20110188327 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device comprises a plurality of memory cells each including a holding circuit for holding memory data, and a read-only output circuit for outputting a signal corresponding to the data held by the holding circuit. The read-only output circuit has a read drive transistor controlled in accordance with a signal held by the holding circuit. A gate length of the read drive transistor is longer than a gate length of a transistor included in the holding circuit. Alternatively, the read-only output circuit has a read access transistor controlled in accordance with a read word select signal, and a gate length of the read access transistor is longer than a gate length of a transistor included in the holding circuit. | 08-04-2011 |
20110267914 | SEMICONDUCTOR MEMORY DEVICE - Characteristics of both a memory cell and a peripheral circuit are degraded due to random variations, and a defective characteristic occurs in a combination of components having a substantially worst characteristic at a macro level. To solve this problem, a selector is provided between the memory cell and the peripheral circuit so that a positive phase and a negative phase of bit lines are switched at a portion where the defective characteristic occurs. Alternatively, the combination of a bit line and a sense amplifier is switched between adjacent data input/output sections, for example. In other words, the defective characteristic is repaired or corrected by canceling the combination of worst components. | 11-03-2011 |
20130021839 | SEMICONDUCTOR MEMORY - A semiconductor memory includes a plurality of memory cells. The plurality of memory cells each include a latch having two inverters, where an input node and an output node of one of the inverters are respectively coupled to an output node and to an input node of the other one of the inverters, a first switch coupled in series with the latch between a first and a second power sources, and a second switch coupled in parallel with the first switch. | 01-24-2013 |
Patent application number | Description | Published |
20100207922 | PLASMA DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME - Having a low-cost transparent electrode, the plasma display panel suppresses variations in discharge characteristics between discharge cells and provides high quality image. To attain above, a scan electrode has a scan transparent electrode formed by applying a dispersion liquid containing particles of metal or metal oxide onto a front substrate, and a scan bus electrode on the front substrate. A sustain electrode has a sustain transparent electrode formed by applying a dispersion liquid containing particles of metal or particles of metal oxide onto the front substrate, and a sustain bus electrode on the front substrate. Besides, a discharge gap is formed by a scan bus electrode and a sustain bus electrode. An outer periphery section on a discharge-gap side of a scan transparent electrode overlaps with a scan bus electrode, and an outer periphery section on a discharge-gap side of a sustain transparent electrode overlaps with a sustain bus electrode. | 08-19-2010 |
20110018927 | METHOD FOR MANUFACTURING PLASMA DISPLAY PANEL - The present invention provides a method for manufacturing a panel. According to the method, employing an ink containing particles of metal or particles of metal oxide allows transparent electrodes to be formed with high dimensional accuracy and little loss of productivity. Specifically, the transparent electrodes are formed in a manner that an ink containing particles of metal or particles of metal oxide is printed by inkjet printing as a plurality of ink dots with different diameters onto the front substrate. | 01-27-2011 |
20110102399 | PLASMA DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME - The present invention provides a plasma display panel having a low-cost transparent electrode, without decrease in yield. To achieve above, the panel has a first bus electrode, a second bus electrode, a first transparent electrode, and a second transparent electrode on the front substrate. The first transparent electrode covers at least a part of the first bus electrode, and similarly, the second transparent electrode covers at least a part of the second bus electrode. | 05-05-2011 |
20110221728 | PLASMA DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME - Having a low-cost transparent electrode, the plasma display panel suppresses variations in discharge characteristics between discharge cells and provides high quality image. To attain above, a scan bus electrode is formed so as to constitute an outer periphery in the lengthwise direction of a scan electrode and have a clearance inside, similarly, a sustain bus electrode is formed so as to constitute an outer periphery in the lengthwise direction of a sustain electrode and have a clearance inside. Besides, a scan transparent electrode is formed in the clearance of the scan bus electrode with use of a dispersion liquid containing particles of metal or particles of metal oxide, similarly, a sustain transparent electrode is formed in the clearance of the sustain bus electrode with use of a dispersion liquid containing particles of metal or particles of metal oxide. | 09-15-2011 |