Patent application number | Description | Published |
20090166577 | Electrode of Supercapacitor and Method for Manufacturing the Same - A method for manufacturing an electrode of a supercapacitor is provided. First, a poly(acrylonitrile) (PAN) fabric is provided. The PAN fabric includes a plurality of PAN fibers each having a diameter of about 50-500 nm. Then, the PAN fabric undergoes a heat treatment so that the PAN fibers are carbonized to form a carbon fiber textile. The carbon fiber fabric includes a plurality of carbon fibers each having a diameter of about 50-500 nm. The surface of each carbon fiber is nano-porous having a plurality of nano pores of about 1-50 nm in diameter. The total surface area of the nano pores account for about 85-95% of the total surface area of the carbon fibers. The carbon fiber fabric is then cut to acquire the electrode of the supercapacitor. | 07-02-2009 |
20100159049 | Spunbonding Apparatus - A spunbonding apparatus includes at least one nozzle, a coagulating tank, a deformation region, a slit passage, and a drawing flow pump. The nozzle extrudes at least one spinning solution. The coagulating tank contains coagulating liquid to coagulate the spinning solution into at least one fiber. The deformation region is located between the coagulating tank and the nozzle. The slit passage is connected to the coagulating tank and allows the fiber to pass therethrough. The drawing flow pump provides a drawing flow to the slit passage. | 06-24-2010 |
20100159050 | Machine for Manufacturing Nonwoven Fabric - A machine for manufacturing a nonwoven fabric includes a conveyer net, a spunbonding apparatus, and a container. In use, the spunbonding apparatus can project at least one fiber onto the conveyer net. The container can contain liquid, wherein the liquid level of the container is higher than at least a part of the conveyer net which the fiber is projected onto. | 06-24-2010 |
Patent application number | Description | Published |
20080284775 | Liquid crystal display driving system and method for driving the same - The present invention discloses a liquid crystal display driving system that uses at least one temperature sensor to detect a temperature of a LCD panel, and outputs a gamma compensation voltage value according to the detected temperature, and further uses an overdrive compensation unit to receive the gamma compensation voltage value, and obtains the overdrive compensation voltage value of two gamma overdrive compensation curves of a temperature gradient corresponding to a region of the LCD panel by a gamma mapping method, or uses an overdrive compensation unit to derive a corresponding partial compensation data table according to the temperature and the compensation data table, and at least one overdrive compensation table (OD compensation table) corresponding to the change of temperature gradient in a region of the LCD panel is derived, an outputted display image after being processed by an overdrive lookup table (OD LUT) is compensated, so as to adjust the overdrive voltage of the LCD panel and enhance the response time of the liquid crystal display. | 11-20-2008 |
20090180029 | System for adjusting color image quality and method thereof - A system for adjusting color image quality includes converting color video signal sources into component video signals including a luminance signal and chrominance signals. A signal axis rotation circuit performs coordination transformation on the chrominance signals in accordance with a hue calibration parameter; and a multiplier multiplies the coordinate-transformed chrominance signals with a chroma calibration parameter to obtain output chrominance signals. The output chrominance signals and the luminance signal together form a component chrominance signal, which is applied to and output by a chrominance signal inverse conversion unit. | 07-16-2009 |
20100265443 | LIQUID CRYSTAL DISPLAY DEVICE - This object aims to provide a liquid crystal display panel with good in viewing angle characteristic, and capable of carrying out a high brightness display. The liquid crystal display device includes a first substrate having at least one pixel unit and at least one first orienting structure, a second substrate disposed opposite to the first substrate, and a liquid crystal layer sealed between the first and second substrates and having negative dielectric anisotropy. The pixel unit includes a pixel electrode that is located in the display area, while the first orienting structure is located outside the display area. In addition, the liquid crystal layer contains an optical rotation material, and some of the liquid crystal molecules in the liquid crystal layer are inclined toward the internal part or the external part of the pixel unit by the first orienting structure. | 10-21-2010 |
Patent application number | Description | Published |
20090161055 | PIXEL STRUCTURE AND LIQUID CRYSTAL DISPLAY PANEL - A pixel structure including an active device, a first pixel electrode, a second pixel electrode, a coupling line, a common electrode, and a liquid crystal layer is provided. The first pixel electrode and the second pixel electrode have a plurality of sets of stripped electrode patterns extending along different directions, respectively, and the first pixel electrode is electrically insulated from the second pixel electrode. The coupling line is disposed under the first and the second pixel electrode and electrically insulated from the second pixel electrode. The first pixel electrode is electrically connected to the active device through the coupling line. The common electrode is disposed over the first and the second pixel electrode. The liquid crystal layer is disposed between the common electrode and the first and second pixel electrodes. Moreover, the liquid crystal layer has two polymer layers and a liquid crystal molecule layer disposed between the polymer layers. | 06-25-2009 |
20120229740 | COLOR DISPLAY APPARATUS AND COLOR FILTER THEREOF - A color display apparatus includes a driving substrate, a color filter and a display layer. The driving substrate has a display region and a non-display region, and at least a first alignment mark is disposed on the non-display region. The color filter is opposite to the driving substrate. The color filter includes a substrate and a filter layer disposed on the substrate. The substrate has a first region corresponding to the display region and a second region corresponding to the non-display region. The filter layer includes color filter patterns located on the first region and at least a second alignment mark located on the second region and corresponding to the first alignment mark. The display layer is disposed between the driving substrate and the color filter. Alignment precision between the driving substrate and the color filter of the color display apparatus is improved. Besides, a color filter is also provided. | 09-13-2012 |
20120229741 | COLOR DISPLAY APPARATUS - A color display apparatus includes a driving substrate, a color filter, a display layer and an adhesive. The color filter is faced to the driving substrate. The color filter includes a substrate and a filter layer, and the filter layer is disposed on the substrate and faced to the driving substrate. The display layer is disposed between the driving substrate and the color filter, and an orthographic projection of the display layer projecting on the filter layer is surrounded by a periphery boundary of the filter layer. An interval is existed between the orthographic projection of the display layer projecting on the filter layer and the periphery boundary of the filter layer. Besides, the adhesive is disposed between the display layer and the color filter, and a periphery boundary of the display layer and the periphery boundary of the filter layer are surrounded by the adhesive. | 09-13-2012 |
Patent application number | Description | Published |
20130099809 | METHODS AND SYSTEMS FOR PROBING SEMICONDUCTOR WAFERS - A wafer probing method includes calibrating a wafer probing system, checking continuity between probe pins of the wafer probing system and respective conductors of a wafer under test, and identifying at least an interconnect structure in the wafer under test to determine whether a fault exists. | 04-25-2013 |
20140167799 | THREE DIMENSIONAL INTEGRATED CIRCUIT ELECTROSTATIC DISCHARGE PROTECTION AND PREVENTION TEST INTERFACE - The present disclosure provides a system and method for providing electrostatic discharge protection. A probe card assembly is provided which is electrically connected to a plurality of input/output channels. The probe card assembly can be contacted with a secondary assembly having an interposer electrically connected to one or more wafers each wafer having a device under test. Voltage can be forced on ones of the plural input/output channels of the probe card assembly to slowly dissipate charges resident on the wafer to thereby provide electrostatic discharge protection. A socket assembly adaptable to accept a 3DIC package is also provided, the assembly having a loadboard assembly electrically connected to a plurality of input/output channels. Once the 3DIC package is placed within the socket assembly, voltage is forced on ones of the input/output channels to slowly dissipate charges resident on the 3DIC package to thereby provide electrostatic discharge protection. | 06-19-2014 |
20140253162 | INTEGRATED CIRCUIT TEST SYSTEM AND METHOD - A system for testing a device under test (DUT) includes a probe card and a test module. The probe card includes probe beds electrically coupled to a circuit board and a first plurality of electrical contacts coupled to the circuit board, which are for engaging respective ones of a plurality of electrical contacts of a test equipment module. Probes are coupled to respective probe beds and are disposed to engage electrical contacts of the DUT. The probe card includes a second plurality of electrical contacts coupled to the circuit board. The first and second pluralities of contacts are mutually exclusive. The test module includes a memory, a processor, and a plurality of electrical contacts electrically coupled to respective ones of the second plurality of electrical contacts of the probe card. The circuit board includes a first electrical path for electrically coupling the test equipment module to the test module. | 09-11-2014 |
20140266273 | TEST-YIELD IMPROVEMENT DEVICES FOR HIGH-DENSITY PROBING TECHNIQUES AND METHOD OF IMPLEMENTING THE SAME - A testing apparatus with reduced warping of the probe card and a method of reducing warping of a probe card of a testing apparatus are disclosed. The testing apparatus can include a testing head and a platform opposite the testing head, where the testing head and platform move relative to one another to bring a sample into contact with probing tips of the testing apparatus. The testing head can include a probe card printed circuit board, a stiffener, a discontinuous backer and a plurality of probing tips. The stiffener can be coupled to and reinforcing the probe card. The discontinuous backer can extend from the probe card to the stiffener, and can include at least one unfilled void extending from the stiffener to the probe card. The plurality of probing tips can extend from a distal end of the testing head. | 09-18-2014 |
Patent application number | Description | Published |
20110221489 | AUTOMATIC FREQUENCY CALIBRATION CIRCUIT AND AUTOMATIC FREQUENCY CALIBRATION METHOD - An automatic frequency calibration circuit and an automatic frequency calibration method for a fractional-N frequency synthesizer are provided. In a calibration mode, a state machine adjusts a fractional part and an integer part of a division ratio of a frequency divider unit according to a required precision. A first and a second frequency detecting units detect a reference frequency and an output frequency of the frequency divider unit, respectively. A judging interval unit defines at least one judging period in a total comparison time. A comparator compares the outputs of the first and the second frequency detecting units and outputs a comparison result at the judging period. Wherein, the state machine changes the capacitor configuration of a voltage-controlled oscillator when the comparison result shows that the reference frequency does not match the output frequency of the frequency divider unit. | 09-15-2011 |
20120044006 | DC OFFSET CALIBRATION APPARATUS, DC OFFSET CALIBRATION SYSTEM, AND METHOD THEREOF - A DC offset calibration apparatus including a signal processing unit, a comparison unit, a first resistor array, a second resistor array, and a resistor array control unit is provided. The signal processing unit receives an input differential signal and generates an output differential signal. The comparison unit detects and determines a first DC output voltage and a second DC output voltage of the output differential signal and generates a DC offset signal. First ends of the first resistor array and the second resistor array are respectively coupled to a first input terminal and a second input terminal of the signal processing unit. The resistor array control unit adjusts resistances of the first and the second resistor array according to the DC offset signal and a bit code sequence until the DC offset signal enters a transient state, so as to calibrate a DC offset voltage in the output differential signal. | 02-23-2012 |
20130156135 | I/Q DEMODULATION APPARATUS AND METHOD WITH PHASE SCANNING - An I/Q demodulation apparatus and method with phase scanning are provided. The demodulation apparatus includes a ring oscillator, a first latch unit, a decoding unit, a counter unit, a second latch unit, a first arithmetical unit and a second arithmetical unit. The first latch unit samples phase signals outputted from the ring oscillator. The decoding unit decodes the output of the first latch unit to correspondingly generate fine code of a first, a second, a third and a fourth codes. The counter unit counts the phase signals. The second latch unit samples the output of the counter unit to correspondingly generate coarse code of the first, the second, the third and the fourth codes. The first arithmetical unit performs an addition/subtraction operation by using the first code and the second code. The second arithmetical unit performs the addition/subtraction operation by using the third code and the fourth code. | 06-20-2013 |
20130338513 | NON-CONTACT APPARATUS FOR MONITORING CARDIOPULMONARY ACTIVITY SIGNALS AND METHOD FOR THE SAME - A laser apparatus includes an optical fiber component and a pump light source coupled to the optical fiber component. The optical fiber component includes a first fiber segment, a second fiber segment and a connecting segment that connects the first and second fiber segments. The first fiber segment includes a fiber core having a first diameter, and the second fiber segment includes a fiber core having a second diameter. The first diameter may be greater than the second diameter, and the connecting segment may have a periodically varying refractive index. | 12-19-2013 |
Patent application number | Description | Published |
20130156947 | Track Spin Wafer Chuck - The present disclosure relates to a wafer chuck configured to provide a uniform photoresist layer on a workpiece. In some embodiments, the wafer chuck comprises a plurality of vacuum holes. The plurality of vacuum holes (i.e., more than one) are in fluid communication with a cavity that continuously extends along the top surface between the vacuum holes. A vacuum source, connected to each vacuum hole, is configured to remove gas molecules from the cavity located below the workpiece leaving behind a low pressure vacuum. The use of a plurality of vacuum holes increase the uniformity of the vacuum, thereby preventing the formation of high vacuum areas in close proximity to any specific vacuum hole. The reduction of high vacuum areas reduces wafer bending associated with the high vacuum areas. | 06-20-2013 |
20130258339 | WAFER ALIGNMENT MARK SCHEME - A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide light directed to a backside of the wafer. The light detection device is configured to detect reflected light intensity from the backside of the wafer to find a position of at least one wafer alignment mark formed on the back side of the wafer. | 10-03-2013 |
20130293857 | LITHOGRAPHY APPARATUS HAVING DUAL RETICLE EDGE MASKING ASSEMBLIES AND METHOD OF USE - A lithography apparatus includes at least two reticle edge masking assemblies (REMAs). The lithography apparatus further includes a light source configured to emit a light beam having a wavelength and a beam separating element configured to divide the light beam into more than one collimated light beam. Each REMA is positioned to receive one of the more than one collimating light beams and each REMA comprises a movable slit for passing the one collimated light beam therethrough. The lithography apparatus further includes at least one mask having a pattern, where the at least one mask is configured to receive light from at least one of the REMA and a projection lens configured to receive light from the at least one mask. A method of using a lithography apparatus is also discussed. | 11-07-2013 |
20140362359 | FLEXIBLE WAFER LEVELING DESIGN FOR VARIOUS ORIENTATION OF LINE/TRENCH - The present disclosure relates to a photolithography system having an ambulatory projection and/or detection gratings that provide for high quality height measurements without the use of an air gauge. In some embodiments, the photolithography system has a level sensor having a projection source that generates a measurement beam that is provided to a semiconductor substrate via a projection grating. A detector is positioned to receive a measurement beam reflected from the semiconductor substrate via a detection grating. An ambulatory element selectively varies an orientation of the projection grating and/or the detection grating to improve the measurement of the level sensor. By selectively varying an orientation of the projection and/or detection gratings, erroneous measurements of the level sensor can be eliminated. | 12-11-2014 |
20150015870 | Overlay Abnormality Gating by Z Data - The present disclosure relates to a method of monitoring wafer topography. A position and orientation of a plurality first alignment shapes disposed on a surface of a wafer are measured. Wafer topography as a function of wafer position is modeled by subjecting the wafer to an alignment which simultaneously minimizes misalignment between the wafer and a patterning apparatus and maximizes a focus of radiation on the surface. A non-correctable error is determined as a difference between the modeled wafer topography and a measured wafer topography. A maximum non-correctable error per field is determined for a wafer, and a mean variation in the maximum non-correctable error across each field within each wafer of a lot is determined, both within a layer and across layers. These values are then verified against a set of statistical process control rules to determine if they are within a specification limit of the manufacturing process. | 01-15-2015 |
Patent application number | Description | Published |
20080204104 | Clocking architecture in stacked and bonded dice - A method and apparatus for distributing clock signals throughout an integrated circuit is provided. An embodiment comprises a distribution die which contains either the clock signal distribution network by itself, or the clock signal distribution network in tandem with a clock signal generator. The distribution die is electrically connected through an interface technology, such as microbumps, to route the clock signals to the functional circuits on a separate functional die. Alternatively, the distribution die could be electrically connected to more than one die at a time, using vias through the distribution die to route the clock signals to the different die. This separate distribution die reduces the coupling between lines and also helps to prevent signal skew as the signal moves through the distribution network. | 08-28-2008 |
20080233710 | METHODS FOR FORMING SINGLE DIES WITH MULTI-LAYER INTERCONNECT STRUCTURES AND STRUCTURES FORMED THEREFROM - A method for forming a single die includes forming at least one first active device over a first substrate and at least one first metallic layer coupled to the first active device. At least one second metallic layer is formed over a second substrate, wherein the second substrate does not include any active device The at least one fist metallic layer is bonded with the at least one second metallic layer such that the first substrate and the second substrate constitute a single die. | 09-25-2008 |
20080250182 | SIP (SYSTEM IN PACKAGE) DESIGN SYSTEMS AND METHODS - SiP design systems and methods. The system comprises a system partitioning module, a subsystem integration module, a physical design module, and an analysis module. The system partitioning module partitions a target system into subsystem partitions according to partition criteria. The subsystem integration module generates an architecture design and/or a cost estimation for the target system according to the subsystem partitions, at least one SiP platform, and IC geometry data. The physical design module generates a SiP physical design with physical routing for the target system according to the architecture design, the subsystem partitions, the SiP platform, and the IC geometry data. The analysis module performs a performance check within the subsystem partitions based on the SiP physical design and/or simulations of the target system. | 10-09-2008 |
20080296697 | Programmable semiconductor interposer for electronic package and method of forming - Various structures of a programmable semiconductor interposer for electronic packaging are described. An array of semiconductor devices having various values is formed in said interposer. A user can program said interposer and form a “virtual” device having a desired value by selectively connecting various one of the array of devices to contact pads formed on the surface of said interposer. An inventive electronic package structure includes a standard interposer having an array of unconnected devices of various values and a device selection unit, which selectively connects various one of the array of devices in said standard interposer to an integrated circuit die encapsulated in said electronic package. Methods of forming said programmable semiconductor interposer and said electronic package are also illustrated. | 12-04-2008 |
20120112352 | INTEGRATED CIRCUIT SYSTEM WITH DISTRIBUTED POWER SUPPLY - An integrated circuit system having an interposer and an integrated circuit with first and second bond pads, the integrated circuit die bonded to the interposer using the first bond pads. The integrated circuit having circuit blocks, that operate at different operating voltages and voltage regulator modules die bonded to the second bond pads of the integrated circuit. The voltage regulator modules converting a power supply voltage to the operating voltage of a respective circuit block and supply the respective operating voltage to the circuit block via the second bond pads. | 05-10-2012 |
20140210077 | INTEGRATED CIRCUIT SYSTEM WITH DISTRIBUTED POWER SUPPLY - An integrated circuit system comprises an interposer, a first integrated circuit, and at least one voltage regulator module. The first integrated circuit comprises first bond pads, and is electrically connected to the interposer at a first position of the interposer via the first bond pads. The first integrated circuit also comprises second bond pads. The first integrated circuit further comprises at least two circuit blocks. The at least two circuit blocks are configured to operate at different operating voltages. The at least one voltage regulator module is electrically connected to the first integrated circuit via the second bond pads, and the at least one voltage regulator module is configured to convert a received power supply voltage to the respective operating voltage of one of the at least two circuit blocks and supply the respective operating voltage via the second bond pads. | 07-31-2014 |
Patent application number | Description | Published |
20140145630 | LED LIGHT STRING COLOR MIXING AND SYNCHRONIZATION CIRCUIT - The present invention provides an LED light string color mixing and synchronization circuit, in which each of LED lights composed of an LED light string includes two input terminals and two output terminals. The two input terminals are respectively an input terminal of reverse parallel connection of any two of three primary light-emitting chips of R, G, B and an anode input terminal of the remaining primary light-emitting chip and the two output terminals are respectively an output terminal of reverse parallel connection of any two of three primary light-emitting chips of R, B and a cathode output terminal of the remaining primary light-emitting chip. Thus, each of the LED lights of the LED light string is connected in a two-input two-output series connection to form a light string arrangement with two terminals thereof in combination with four electrical wires. | 05-29-2014 |
20140151727 | STRUCTURE OF LED LIGHT COLOR MIXING CIRCUIT - The present invention provides a structure of color mixing circuit of LED light. The LED light includes two input terminals and two output terminals. The two input terminals are respectively an input terminal of reverse parallel connection of any two light-emitting chips of three primary-color light-emitting chips of R, G, B and an anode input terminal of the remaining light-emitting chip and the two output terminals are respectively an output terminal of reverse parallel connection of any two light-emitting chips of the three primary-color light-emitting chips of R, G, B and a cathode output terminal of the remaining light-emitting chip. The structure is simple and the purposes of reducing the number of IC control chips and synchronous color change of light-emitting chips are achieved with modification only made on electrical connection among the three primary-color light-emitting chips in realizing operation of a group of LED lights connected in series. | 06-05-2014 |
20150048747 | STRUCTURE OF COLOR MIXING CIRCUIT OF LED LIGHT STRING - Disclosed is a structure of a color mixing circuit of an LED light. The LED light includes two input pins that are respectively an input pin of two light emitting chips of four primary color light emitting chips of R, G, B, and Y that are connected in parallel and opposite in direction and an input pin of the remaining two light emitting chips that are connected in parallel and opposite in direction; and two output pins that are respectively an output pin of the two light emitting chips of the four primary color light emitting chips of R, G, B, and Y that correspond to one of the input pins and are connected in parallel and opposite in direction and an output pin of the remaining two light emitting chips that correspond to another one of the input pins and are connected in parallel and opposite in direction. | 02-19-2015 |
20150048748 | STRUCTURE OF COLOR MIXTURE SYNCHRONIZATION CIRCUIT OF LED LIGHT STRING - Disclosed is a structure of a color mixture synchronization circuit of an LED light string. The LED light string includes a plurality of LED lights each of which has two input pins that are respectively an input pin of two light emitting chips of four primary color light emitting chips of R, G, B, and Y that are connected in parallel and opposite in direction and an input pin of the remaining two light emitting chips that are connected in parallel and opposite in direction; and two output pins that are respectively an output pin of the two light emitting chips of the four primary color light emitting chips of R, G, B, and Y that are connected in parallel and opposite in direction and an output pin of the remaining two light emitting chips that are connected in parallel and opposite in direction. | 02-19-2015 |
Patent application number | Description | Published |
20130077317 | LIGHT-GUIDING MEMBER AND LIGHT BULB HAVING THE SAME - The instant disclosure relates to a light bulb, which includes a connecting cap, a heat-dissipating seat, a LED module, a light-guiding member, and a bulb. The heat-dissipating seat is disposed on one end of the connecting cap, and the LED module is disposed on the heat-dissipating seat. The light-guiding member is connected to the heat-dissipating seat and covers the LED module. At least one microstructure is formed on the surface of the light-guiding member for changing the light projection path. The bulb is arranged over the light-guiding member. Thereby, the light bulb can illuminate a wider area and achieve more uniform brightness. A light-guiding member is also disclosed. | 03-28-2013 |
20130279149 | LED LIGHT BULB - The instant disclosure relates to an LED light bulb, which includes a cap, a glass bulb, an LED module, an optical element, and a power supply module. The glass bulb is disposed on one end of the cap to cooperatively define an accommodating space. The LED module, used for emitting a first light having a first bandwidth, is received inside the accommodating space. To guide the first light, the optical element is received inside the accommodating space and located at a light path of the LED module. The optical element has a light guiding portion and a wavelength transformation portion used for changing the bandwidth of the emitted light from the LED module. The light guiding portion and the wavelength transformation portion are connected seamlessly to each other. The power supply module is disposed inside the cap and electrically connected to the LED module and the cap. | 10-24-2013 |
Patent application number | Description | Published |
20090040086 | DWA STRUCTURE AND METHOD THEREOF, DIGITAL-TO-ANALOG SIGNAL CONVERSION METHOD AND SIGNAL ROUTING METHOD - A data weighted average (DWA) structure including a first delay unit, a binary to thermometer code converter, an adder, a second delay unit, a decoder, a barrel shifter, and a plurality of signal lines is provided. The first delay unit delays an input digital signal. The binary to thermometer code converter converts an output signal of the first delay unit into a thermal code. The second delay unit delays an output signal of the adder. The adder adds the input digital signal to an output signal of the second delay unit. The decoder decodes the output signal of the second delay unit. The barrel shifter generates an output signal from the thermal code in accordance with an output signal of the decoder. The signal lines route the output signal of the barrel shifter into two independent control signal groups. | 02-12-2009 |
20090110102 | SIGNAL ROUTING METHOD - A signal routing method adapted to a DWA structure is provided. The signal routing method at least includes following steps. An M-bit input digital signal is provided. The odd bit in the input digital signal is routed into a low-bit signal of an output digital signal, and the even bit in the input digital signal is routed into a high-bit signal of the output digital signal, wherein the output digital signal has M bits. | 04-30-2009 |
20120275073 | ESD PROTECTION CIRCUIT - Electrostatic discharge (ESD) protection circuit including a first silicon controlled rectifier (SCR) and a trigger circuit; the trigger circuit including a first MOS transistor and a second transistor, triggering the first SCR and providing a second SCR shunt with the first SCR during ESD. | 11-01-2012 |
20130044397 | ESD PROTECTION CIRCUIT - ESD protection circuit including a resistor and at least one protection transistor; the resistor coupled between an I/O signal node and an internal node of internal circuit, the protection transistors serially coupled between the internal node and a voltage node with each protection transistor comprising a gate and a drain which is coupled to the gate. | 02-21-2013 |
20130088801 | ELECTROSTATIC DISCHARGE PROTECTION APPARATUS - An electrostatic discharge (ESD) protection apparatus includes at least one first transistor and at least one second transistor. The first transistor includes a control terminal, a first terminal, a second terminal, and a bulk. The control terminal and the second terminal of the first transistor are coupled to each other. The first terminal of the first transistor is coupled to one of a pad and a power rail line. Likewise, the second transistor also includes a control terminal, a first terminal, and a second terminal. The first terminal of the second transistor is coupled to the bulk of the first transistor, the bulk of the second transistor is coupled to the second terminal of the first transistor, and the second terminal of the second transistor is coupled to the other of the pad and the power rail line. | 04-11-2013 |
Patent application number | Description | Published |
20110217687 | EXAMINATION SYSTEM AND METHOD THEREOF - An examination system and an examination method are disclosed. The examination method includes: generating a first test data by a host device, in which the first test data has a plurality of questions; rearranging the questions of the first test data in order to generate a second test data; and sending the second test data to a corresponding examination device for taking the examination. An anti-cheating module is provided for detecting distances between the examination devices or detecting a deviation angle of a character image of the examinee. When the distance is less than a predetermined value or the deviation angle is greater than a predetermined value, an anti-cheating signal is then generated for avoiding cheating actions. | 09-08-2011 |
20120013983 | DISPLAY DEVICE - A display device includes a transparent active element array substrate and a color display layer. The transparent active element array substrate has a first surface and a second surface opposite to the first surface. The color display layer disposed on the first surface of the transparent active element array substrate. | 01-19-2012 |
20120070984 | METHOD FOR FORMING ELECTRODE STRUCTURE - In a method for forming an electrode structure in a display device, e.g. a source, drain or gate electrode or a pixel electrode, a photoactive conductive layer, which includes conductive material containing photoactive material, is formed above a substrate of the display device. The photoactive conductive layer is then patterned with a photo-mask and partially removed without the presence of a photo-resist to form the electrode structure. | 03-22-2012 |
Patent application number | Description | Published |
20110156071 | MULTI-STACK PACKAGE LED - A multi-stack package light emitting diode (LED) includes an LED chip, a first fluorescent powder layer, a first optical bandpass filter layer and a second fluorescent powder layer. The LED chip generates an LED light. The first fluorescent powder layer and the second fluorescent powder layer respectively have a first fluorescent powder and a second fluorescent powder. The first fluorescent powder and the second fluorescent powder are excited by the LED light to respectively generate a first excitation light and a second excitation light. The first optical bandpass filter layer allows the LED light and the first excitation light to pass and reflects the second excitation light. A wavelength of the LED light is shorter than a wavelength of the second excitation light. The wavelength of the second excitation light is shorter than a wavelength of the first excitation light. Therefore, the multi-stack package LED improves a light emission efficiency. | 06-30-2011 |
20130139808 | SOLAR HEATING DEVICE - The disclosure relates to a solar heating device comprising at least one incidence collector and a thermal container. The thermal container includes at least one light absorbing recess, wherein at least one of the incidence collectors focuses solar beams on a focal point, which is located inside the light absorbing recess. The inner surface of the light absorbing recess converts the energy of the solar beams into radiant heating. | 06-06-2013 |
20150014719 | LIGHT-EMITTING DIODE CHIP - A light-emitting diode chip includes an illuminating body and a first phosphor layer. The first phosphor layer is disposed on the illuminating body, and the first phosphor layer includes multiple first phosphor powder groups and multiple second phosphor powder groups. The illuminating body has a first emission wavelength, the first phosphor powder groups have a second emission wavelength, and the second phosphor powder groups have a third emission wavelength. The first wavelength is smaller than the second emission wavelength, and the second emission wavelength is smaller than the third emission wavelength. | 01-15-2015 |
Patent application number | Description | Published |
20090035575 | METHOD FOR MANUFACTURING METAL NANO PARTICLES HAVING HOLLOW STRUCTURE AND METAL NANO PARTICLES MANUFACTURED BY THE METHOD - A method for manufacturing metal nano particles having a hollow structure is provided. First, a suitable reducing agent is added into a first metal salt solution, and first metal ions are reduced to form first metal nano particles. Next, after the reducing agent is decomposed, a second metal salt solution with a higher reduction potential than that of the first metal is added. Then, the first metal particles are oxidized to form first metal ions when the second metal ions are reduced on the surface of the first metal by electrochemical oxidation reduction reaction, and thus, second metal nano particles having a hollow structure and a larger surface area are obtained. The method is simple and the metal nano particles with uniform particle size are obtained by this method. | 02-05-2009 |
20090131247 | HIGHLY DISPERSED CARBON SUPPORTED METAL CATALYST AND METHOD FOR MANUFACTURING THE SAME - The invention provides a method for manufacturing a highly dispersed carbon supported metal catalyst, including charging a carbon support and a dispersing agent in water. The carbon support is evenly dispersed in water with an average diameter of 10 nm to 2000 nm and a specific surface area of 50 m | 05-21-2009 |
20110159340 | PROTECTION STRUCTURE FORTHERMAL DISSIPATION AND PREVENTING THERMAL RUNAWAY DIFFUSION IN BATTERY SYSTEM - A protection structure for preventing thermal dissipation and thermal runaway diffusion in battery system is provided. The protection structure includes a battery module casing and at least one composite heat conduction plate. There is a plurality of unit cells disposed in the battery module casing. The composite heat conduction plate is located within the battery module casing, contacted with the battery module casing, and sandwiched between at least two of the unit cells as a heat transmission medium between the cells and the casing to control heat transmission among the cells. The composite heat conduction plate is a multilayer anisotropic heat conduction structure constituted by at least one heat conduction layer and at least one heat insulation layer. | 06-30-2011 |
20120009477 | Anode material of rapidly chargeable lithium battery and manufacturing method thereof - An anode material of rapidly chargeable lithium battery and a manufacturing method thereof are provided. The anode material includes a carbon core and a modification layer. The modification layer is formed on a surface of the carbon core by sol-gel method. This modification layer is a composite lithium metal oxide represented by the formula Li | 01-12-2012 |
20120164511 | LITHIUM BATTERY AND ELECTRODE PLATE STRUCTURE - A lithium battery is provided. The lithium battery comprises an positive electrode plate having a first surface, a negative electrode plate having a second surface, a first thermal insulating layer and a separator. The first surface is opposite to the second surface. The thermal insulating layer is disposed on one of the first surface and the second surface. The thermal insulating layer is comprised of an inorganic material, a thermal activation material and a binder. The separator is disposed between the positive electrode plate and the negative electrode plate. | 06-28-2012 |
20120164513 | BATTERY SEPARATOR AND METHOD FOR MANUFACTURING THE SAME - The present discloser provides a battery separator, including: a porous hyper-branched polymer which undergoes a closed-pore mechanism at a field effect condition, wherein the field effect condition includes at least one of a temperature being above 150° C., a voltage being 20V, or a current being 6 A; and a porous structure material. The invention also provides a method for manufacturing the battery separator and a secondary battery having the battery separator. | 06-28-2012 |
20130127423 | BATTERY PACK AND METHOD OF CONTROLLING CHARGE-AND-DISCHARGE OF BATTERY PACK BY ITS THERMOELECTRIC PROPERTY - A battery pack and a method for controlling charge-and-discharge of the battery pack by its thermoelectric property are provided, in which the battery pack has a plurality of thermal regions divided by different ranges of temperature. The battery pack includes a plurality of parallel-connected battery groups and a plurality of variable resistances. The parallel-connected battery groups are located in the thermal regions respectively, and each of the parallel-connected battery groups includes batteries connected in parallel. The variable resistances are disposed between two parallel-connected battery groups. | 05-23-2013 |
Patent application number | Description | Published |
20090057048 | Anti-tilt apparatus and frame structure of tilting vehicle using the same - An anti-tilt apparatus is provided in the present invention, in which a frame of a vehicle is locked or released for tilt by a locking mechanism controlled according to the vehicle moving status. In addition, the present invention further provides a frame structure of a tilt vehicle wherein the anti-tilt apparatus and an independent suspended wheel set with a tiltable frame are combined together for maintaining certain comfort, good tracking capability and driving safety while the vehicle is moving and swerving. The anti-tilt apparatus of the present invention functions to lock the tiltable frame while the vehicle is operated in low speed or stop and functions to make wheels simultaneously inwardly incline for providing a tilt capability while the vehicle is swerving in high speed so as to increase higher stability and anti-turnover capability of the vehicle. | 03-05-2009 |
20100136425 | RAPID EXCHANGE BATTERY CONSTRUCTION - A rapid exchange battery construction is applied in a battery module of an electric device to supply power. The battery module is pivoted with a rotatable handle, a catching member is disposed on the handle, and a fixing structure is erected on a base of a battery assembly structure. A pressing portion and a releasing opening are disposed at a top edge of the fixing structure. The handle is rotated to a gripping position for lifting the battery module to install the battery module on the base along the fixing structure, and then, the handle is rotated to a withdrawal position to move the catching member to the pressing portion. The battery structure is designed in such a manner that the battery module is secured and fixed on the base, and an electrical connection relationship between the battery module and the electric device is ensured. | 06-03-2010 |
20110130907 | POWER SOURCE MODULE AND METHOD FOR USING THE SAME - A power source module comprises a plurality of socket modules, at least one exchangeable battery module, and at least one system control unit. The socket modules are connected in parallel. The exchangeable battery module can be arbitrarily inserted into one of the socket modules. The system control unit is configured to transmit an instruction signal for controlling a switch of the exchangeable battery module according to a state of charge of the exchangeable battery module, a sensing result, and operating information of an external device (for example, a motor or a charger), so as to charge or discharge only one exchangeable battery module during a charging and discharging period. | 06-02-2011 |
20140183930 | DETACHABLE POWER MODULE - A disassembled and assembled power module includes: a wheel shaft; a power module; a central shaft, arranged in the power module and passing through the wheel shaft; and an engaging unit, capable of fastening the central shaft to the wheel shaft. In an embodiment when the detachable power module is applied in an electric driven wheelchair, it enables the weight of the wheelchair to be reduced by simply detach and remove the detachable power from the wheelchair so that the electric driven wheelchair without the heavy power module can be carry and transport easily, and also the moving range of the electric driven wheelchair can be increased as its power module can be easily detached and replaced with another fully charged power module so that the range anxiety of the disabled person using the same or the assistant can be relieved. | 07-03-2014 |