Patent application number | Description | Published |
20090053459 | CONDUCTIVE CONNECTING PIN AND PACKAGE SUBSTRATE - A package substrate | 02-26-2009 |
20090107711 | PLATING APPARATUS, PLATING METHOD AND MULTILAYER PRINTED CIRCUIT BOARD - A multilayer printed circuit board has an insulation layer, a first conductor layer provided over a first side of the insulation layer, a second conductor layer provided over a second side of the insulation layer opposite to the first side, and multiple filled vias electrically connecting the first conductor layer and the second conductor layer. The filled vias have upper surfaces, respectively, and each of the upper surfaces is made such that a difference between a lowest point and a highest point of each of the upper surfaces is less than or equal to about 7 μm. | 04-30-2009 |
20090107847 | PLATING APPARATUS, PLATING METHOD AND MULTILAYER PRINTED CIRCUIT BOARD - A plating method includes providing an article in a plating bath, covering a surface of the article with an insulating member in the plating bath, and electrolytically plating the article while moving one of the insulating member and the article relative to each other. | 04-30-2009 |
20090154131 | CONDUCTIVE CONNECTING PIN AND PACKAGE SUBSTRATE - A package substrate | 06-18-2009 |
20090314537 | CONDUCTIVE CONNECTING PIN AND PACKAGE SUBSTRATE - A package substrate including an outermost interlayer resin insulating layer, a pad structure formed on the outermost interlayer resin insulating layer, a conductive connecting pin for establishing an electrical connection with another substrate, the conductive connecting pin being secured to the pad structure via a solder, and via holes formed through the outermost interlayer resin insulating layer and for electrically connecting the pad structure to one or more conductive circuits formed below the outermost interlayer resin insulating layer, the via holes being positioned directly below the pad structure. | 12-24-2009 |
20100032200 | CONDUCTIVE CONNECTING PIN AND PACKAGE SUBSTRATE - A package substrate | 02-11-2010 |
20120005888 | PLATING APPARATUS, PLATING METHOD AND MULTILAYER PRINTED CIRCUIT BOARD - A method for manufacturing a multilayer printed circuit board including providing a core substrate having a penetrating-hole, forming an electroless plated film on a surface of the substrate and an inner wall surface of the penetrating-hole, electrolytically plating the substrate while moving with respect to the surface of the substrate an insulating member in contact with the surface of the substrate such that an electrolytic plated film is formed on the electroless plated film, an opening space inside the penetrating-hole is filled with an electrolytic material, and a through-hole conductor structure is formed in the penetrating-hole, forming an etching resist having an opening pattern on the electrolytic plated film, and removing an exposed pattern of the electrolytic plated film exposed by the opening pattern and a pattern of the electroless plated film under the exposed pattern such that a conductor circuit is formed on the surface of the substrate. | 01-12-2012 |