Patent application number | Description | Published |
20080244884 | Method for Forming Ceramic Thick Film Element Arrays with Fine Feature Size, High-Precision Definition, and/or High Aspect Ratios - A method is provided that includes providing a mold on a temporary substrate, e.g., a sapphire substrate. Next, a material such as PZT paste is deposited into the mold. Then, the mold is removed to obtain elements formed by the mold. The formed elements will then be sintered. After sintering, electrode deposition is optionally performed. The sintered elements are then bonded to a final target substrate and released from the temporary substrate through laser liftoff. Further, electrodes may also be optionally deposited at this point. | 10-09-2008 |
20090070975 | METHOD OF FORMING MICROMACHINED FLUID EJECTORS USING PIEZOELECTRIC ACTUATION - A method of forming a fluid ejector includes forming a recess well into a silicon wafer on a first side of the silicon wafer, and filling the recess well with a sacrificial material. A thin layer structure is deposited onto the first side of a silicon wafer covering the filled recess well. Then a thin film piezoelectric is bonded or deposited to the thin layer structure, and a hole is formed in the thin layer structure exposing at least a portion of the sacrificial material. The sacrificial material is removed from the recess well, wherein the hole in the thin layer in the recess well with the sacrificial material removed, form a fluid inlet. An opening area in the silicon wafer is formed on a second side of the silicon wafer. Then a nozzle plate is formed having a recess portion and an aperture within the recess portion. The nozzle plate is attached to the second side of the silicon wafer, with the recess portion positioned within the open area. The thin layer structure and the recess portion of the nozzle plate define a depth of a fluid cavity defined by the thin layer structure, the recess portion of the nozzle plate and the sidewalls of the silicon wafer. | 03-19-2009 |
20090073242 | MULTI-LAYER MONOLITHIC FLUID EJECTORS USING PIEZOELECTRIC ACTUATION - A fluid ejector including a silicon wafer having a first side and a second side. A multi-layer monolithic structure is formed on the first side of the silicon wafer. The multi-layer monolithic structure includes a first structure layer formed on the first side of the silicon wafer, and the first structure layer has an aperture. A second structure layer has a horizontal portion and closed, filled trenches or vertical sidewalls. The first structure layer, horizontal portion and the closed, filled trenches or vertical sidewalls of the second structure layer define a fluid cavity. An actuator is associated with the horizontal portion of the second structure layer, and an etched portion of the silicon wafer defines an open area which exposes the aperture in the first structure layer. | 03-19-2009 |
20090113685 | Methods to make piezoelectric ceramic thick film array and single elements and devices - A method of producing at least one piezoelectric element includes depositing a piezoelectric ceramic material onto a surface of a first substrate to form at least one piezoelectric element structure. Then an electrode is deposited on a surface of the at least one piezoelectric element structure. Next, the at least one piezoelectric element structure is bonded to a second substrate, the second substrate being conductive or having a conductive layer. The first substrate is then removed from the at least one piezoelectric element structure and a second side electrode is deposited on a second surface of the at least one piezoelectric element structure. A poling operation is performed to provide the at least one piezoelectric element structure with piezoelectric characteristics. | 05-07-2009 |
20090320992 | METHODS FOR MANUFACTURING STRESSED MATERIAL AND SHAPE MEMORY MATERIAL MEMS DEVICES - Disclosed is a MEMS device which comprises at least one shape memory material such as a shape memory alloy (SMA) layer and at least one stressed material layer. Examples of such MEMS devices include an actuator, a micropump, a microvalve, or a non-destructive fuse-type connection probe. The device exhibits a variety of improved properties, for example, large deformation ability and high energy density. Also provided is a method of easily fabricating the MEMS device in the form of a cantilever-type or diaphragm-type structure. | 12-31-2009 |
Patent application number | Description | Published |
20080299582 | Culture System for Rapid Expansion of Human Embryonic Stem Cells - This disclosure provides an improved system for culturing human pluripotent stem cells. Traditionally, pluripotent stem cells are cultured on a layer of feeder cells (such as mouse embryonic fibroblasts) to prevent them from differentiating. In the system described here, the role of feeder cells is replaced by components added to the culture environment that support rapid proliferation without differentiation. Effective features are a suitable support structure for the cells, and an effective medium that can be added fresh to the culture without being preconditioned by another cell type. Culturing human embryonic stem cells in fresh medium according to this invention causes the cells to expand surprisingly rapidly, while retaining the ability to differentiate into cells representing all three embryonic germ layers. This new culture system allows for bulk proliferation of pPS cells for commercial production of important products for use in drug screening and human therapy. | 12-04-2008 |
20090017465 | Compound Screening Using Cardiomyocytes - This invention provides populations human cells of the cardiomyocyte lineage. The cells are obtained by causing cultures of pluripotent stem cells to differentiate in vitro, and then harvesting cells with certain phenotypic features. Differentiated cells bear cell surface and morphologic markers characteristic of cardiomyocytes, and a proportion of them undergo spontaneous periodic contraction. Highly enriched populations of cardiomyocytes and their replicating precursors can be obtained, suitable for use in a variety of applications, such as drug screening and therapy for cardiac disease. | 01-15-2009 |
20100203633 | Culture System for Rapid Expansion of Human Embryonic Stem Cells - This disclosure provides an improved system for culturing human pluripotent stem cells. Traditionally, pluripotent stem cells are cultured on a layer of feeder cells (such as mouse embryonic fibroblasts) to prevent them from differentiating. In the system described here, the role of feeder cells is replaced by components added to the culture environment that support rapid proliferation without differentiation. Effective features are a suitable support structure for the cells, and an effective medium that can be added fresh to the culture without being preconditioned by another cell type. Culturing human embryonic stem cells in fresh medium according to this invention causes the cells to expand surprisingly rapidly, while retaining the ability to differentiate into cells representing all three embryonic germ layers. This new culture system allows for bulk proliferation of pPS cells for commercial production of important products for use in drug screening and human therapy. | 08-12-2010 |
20100317101 | Culture System for Rapid Expansion of Human Embryonic Stem Cells - This disclosure provides an improved system for culturing human pluripotent stem cells. Traditionally, pluripotent stem cells are cultured on a layer of feeder cells (such as mouse embryonic fibroblasts) to prevent them from differentiating. In the system described here, the role of feeder cells is replaced by components added to the culture environment that support rapid proliferation without differentiation. Effective features are a suitable support structure for the cells, and an effective medium that can be added fresh to the culture without being preconditioned by another cell type. Culturing human embryonic stem cells in fresh medium according to this invention causes the cells to expand surprisingly rapidly, while retaining the ability to differentiate into cells representing all three embryonic germ layers. This new culture system allows for bulk proliferation of pPS cells for commercial production of important products for use in drug screening and human therapy. | 12-16-2010 |
20120149025 | Screening Methods for Human Embryonic Stem Cells - This disclosure provides an improved system for culturing human pluripotent stem cells. Traditionally, pluripotent stem cells are cultured on a layer of feeder cells (such as mouse embryonic fibroblasts) to prevent them from differentiating. In the system described here, the role of feeder cells is replaced by components added to the culture environment that support rapid proliferation without differentiation. Effective features are a suitable support structure for the cells, and an effective medium that can be added fresh to the culture without being preconditioned by another cell type. Culturing human embryonic stem cells in fresh medium according to this invention causes the cells to expand surprisingly rapidly, while retaining the ability to differentiate into cells representing all three embryonic germ layers. This new culture system allows for bulk proliferation of pPS cells for commercial production of important products for use in drug screening and human therapy. | 06-14-2012 |
20140302600 | PRIMATE PLURIPOTENT STEM CELL EXPANSION WITHOUT FEEDER CELLS AND IN THE PRESENCE OF FGF AND MATRIGEL OR ENGELBRETH-HOLM-SWARM TUMOR CELL PREAPARATION - This disclosure provides an improved system for culturing human pluripotent stem cells. Traditionally, pluripotent stem cells are cultured on a layer of feeder cells (such as mouse embryonic fibroblasts) to prevent them from differentiating. In the system described here, the role of feeder cells is replaced by components added to the culture environment that support rapid proliferation without differentiation. Effective features are a suitable support structure for the cells, and an effective medium that can be added fresh to the culture without being preconditioned by another cell type. Culturing human embryonic stem cells in fresh medium according to this invention causes the cells to expand surprisingly rapidly, while retaining the ability to differentiate into cells representing all three embryonic germ layers. This new culture system allows for bulk proliferation of pPS cells for commercial production of important products for use in drug screening and human therapy. | 10-09-2014 |
Patent application number | Description | Published |
20120284223 | Dataset Previews for ETL Transforms - Disclosed is a user interface on a display for editing data transformations comprising an ETL process. A first display area presents a data representation of a data transformation. A second display area presents a view of input data, and a third display are presents a view of output data. User input to modify the data transformation is received. In response to receiving the user input, the third display area is updated with output data generated by applying the modified data transformation to the input data. | 11-08-2012 |
20130238669 | Using Target Columns in Data Transformation - A data transform leverages a known hierarchy within a target data structure, in order to improve query and mapping capabilities and enhance performance. Where a target data structure is hierarchical, output data of that target data structure is often built in the document order of the nodes in the structure (from top down and from left to right). Hence, when the data for a child node in the target structure is being built, the data for the parent nodes of the child node has been built. Embodiments utilize this available portion of the target data in the form of target columns, to increase processing efficiency of the transformation process. Use of target columns according to embodiments may also allow powerful and concise expression of mapping logic in the transform, facilitating the use of functions such as selection (e.g. Where clauses), uniqueness (e.g. DISTINCT), ordering (Order By, Group By), and Aggregation. | 09-12-2013 |
20130262417 | Graphical Representation and Automatic Generation of Iteration Rule - Embodiments relate to graphical representation and/or automatic generation of an iteration rule in mapping design that is to integrate or transform one or more input data sets into another target data set. The input and output data set can be of flat or hierarchical in nature. In an embodiment, a graphical interface allows users to specify an iteration rule (e.g. JOIN operation in a relational database) in a tree-like structure (e.g. a JOIN tree). The interface allows users to visualize and implement complicated and powerful combinations of multiple data sets, including data sets exhibiting hierarchical structure. Drag-and-drop techniques may be employed to reduce the need for manual typing. Also disclosed are procedures automatically generating an iteration rule based on the data mapping information, thereby reducing a need for manual mapping. | 10-03-2013 |
20130282740 | System and Method of Querying Data - A system and method of querying data. The method includes transforming first data according to a unified data model. The unified data model has a hierarchical structure with tree nodes and leaf nodes. A leaf node contains a table. The method further includes executing a unified data model query on the first data (having been transformed) to result in second data. The method further includes outputting the second data. | 10-24-2013 |
Patent application number | Description | Published |
20130160794 | METHODS AND APPARATUS FOR CLEANING SUBSTRATE SURFACES WITH ATOMIC HYDROGEN - Methods and apparatus for cleaning substrate surfaces are provided herein. In some embodiments, a method of cleaning a surface of a substrate may include providing a hydrogen containing gas to a first chamber having a plurality of filaments disposed therein; flowing a current through the plurality of filaments to raise a temperature of the plurality of filaments to a process temperature sufficient to decompose at least some of the hydrogen containing gas; and cleaning the surface of the substrate by exposing the substrate to hydrogen atoms formed from the decomposed hydrogen containing gas for a period of time. | 06-27-2013 |
20140248754 | CONTROLLED AIR GAP FORMATION - A method of forming and controlling air gaps between adjacent raised features on a substrate includes forming a silicon-containing film in a bottom region between the adjacent raised features using a flowable deposition process. The method also includes forming carbon-containing material on top of the silicon-containing film and forming a second film over the carbon-containing material using a flowable deposition process. The second film fills an upper region between the adjacent raised features. The method also includes curing the materials at an elevated temperature for a period of time to form the air gaps between the adjacent raised features. The thickness and number layers of films can be used to control the thickness, vertical position and number of air gaps. | 09-04-2014 |
20150126040 | SILICON GERMANIUM PROCESSING - Methods of selectively etching silicon germanium relative to silicon are described. The methods include a remote plasma etch using plasma effluents formed from a fluorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the silicon germanium. The plasmas effluents react with exposed surfaces and selectively remove silicon germanium while very slowly removing other exposed materials. Generally speaking, the methods are useful for removing Si | 05-07-2015 |
20150162214 | Methods Of Selective Layer Deposition - Provided are methods for selective deposition. Certain methods describe providing a first substrate surface; providing a second substrate surface; depositing a first layer of film over the first and second substrate surfaces, wherein the deposition has an incubation delay over the second substrate surface such that the first layer of film over the first substrate surface is thicker than the first layer of film deposited over the second substrate surface; and etching the first layer of film over the first and second substrate surfaces, wherein the first layer of film over the second substrate surface is at least substantially removed, but the first layer of film over the first substrate is only partially removed. | 06-11-2015 |
20150275364 | Cyclic Spike Anneal Chemical Exposure For Low Thermal Budget Processing - Provided are apparatus and methods for the sequential deposition and annealing of a film within a single processing chamber. An energy source positioned within the processing chamber in an area isolated from process gases can be used to rapidly form and decompose a film on the substrate without damaging underlying layers due to exceeding the thermal budget of the device being formed. | 10-01-2015 |
20150311061 | METHODS AND APPARATUS FOR CLEANING SUBSTRATE SURFACES WITH ATOMIC HYDROGEN - Methods and apparatus for cleaning substrate surfaces are provided herein. In some embodiments, a method of cleaning a surface of a substrate may include providing a hydrogen containing gas to a first chamber having a plurality of filaments disposed therein; flowing a current through the plurality of filaments to raise a temperature of the plurality of filaments to a process temperature sufficient to decompose at least some of the hydrogen containing gas; and cleaning the surface of the substrate by exposing the substrate to hydrogen atoms formed from the decomposed hydrogen containing gas for a period of time. | 10-29-2015 |
Patent application number | Description | Published |
20100329045 | Adjustment of Write Timing in a Memory Device - A method and system are provided for adjusting a write timing in a memory device. For instance, the method can include receiving a data signal, a write clock signal, and a reference signal. The method can also include detecting a phase shift in the reference signal over time. The phase shift of the reference signal can be used to adjust a phase difference between the data signal and the write clock signal, where the memory device recovers data from the data signal based on an adjusted write timing of the data signal and the write clock signal. | 12-30-2010 |
20110019787 | Method and Apparatus Synchronizing Integrated Circuit Clocks - Embodiments described herein include a method and system for synchronizing clocks between coupled integrated circuits (ICs) in a computer system. According to an embodiment, a dedicated timing pin is provided on a first IC. The first IC configures a second IC to change a pin assignment, so that the second IC interprets a signal sent on the timing pin by the first IC and received on the reassigned pin as a request to transmit a return signal. The return signal is received on the timing pin. The return signal is used to determine whether timing should be adjusted by the first IC. In an embodiment a clock and data recover (CDR) circuit compares the signal sent to the signal received in order to make the determination. In an embodiment the first IC is a processor-based device, and the second IC is a memory device controlled by the first device. | 01-27-2011 |
20110185218 | Adjustment of Write Timing Based on a Training Signal - A method, system, and computer program product are provided for adjusting write timing in a memory device based on a training signal. For instance, the method can include configuring the memory device in a training mode of operation. The method can also include determining a write timing window between a signal on a data bus and a write clock signal based on the training signal. Further, the method includes adjusting a phase difference between the signal on the data bus and the write clock signal based on the write timing window. The memory device can recover data on the data bus based on the adjusted phase difference. | 07-28-2011 |
20110185256 | Adjustment of Write Timing Based on Error Detection Techniques - A method, system, and computer program product are provided for adjusting write timing in a memory device based on results of an error detection function. For instance, the method can include determining a write timing window between a signal on a data bus and a write clock signal based on the results of the error detection function. The method can also include adjusting a phase difference between the signal on the data bus and the write clock signal based on the write timing window. The memory device can recover data on the data bus based on the adjusted phase difference. | 07-28-2011 |
20110208989 | Command Protocol for Adjustment of Write Timing Delay - A method, system, and computer program product are provided for adjusting write timing in a memory device based on a command protocol. For instance, the method can include enabling a write clock data recovery (WCDR) mode of operation. The method can also include transmitting WCDR data from a processing unit to the memory device during the WCDR mode of operation and another mode of operation of the memory device. Based on a phase shift in the WCDR data, a phase difference between a signal on a data bus and a write clock signal can be adjusted. Further, the method can include transmitting the signal on the data bus based on the adjusted phase difference between the signal on the data bus and the write clock signal. | 08-25-2011 |
20120303995 | METHOD AND APPARATUS SYNCHRONIZING INTEGRATED CIRCUIT CLOCKS - Embodiments described herein include a method and system for synchronizing clocks between coupled integrated circuits (ICs) in a computer system. According to an embodiment, a dedicated timing pin is provided on a first IC. The first IC configures a second IC to change a pin assignment, so that the second IC interprets a signal sent on the timing pin by the first IC and received on the reassigned pin as a request to transmit a return signal. The return signal is received on the timing pin. The return signal is used to determine whether timing should be adjusted by the first IC. In an embodiment a clock and data recover (CDR) circuit compares the signal sent to the signal received in order to make the determination. In an embodiment the first IC is a processor-based device, and the second IC is a memory device controlled by the first device. | 11-29-2012 |
20130290767 | COMMAND PROTOCOL FOR ADJUSTMENT OF WRITE TIMING DELAY - Apparatuses are provided for adjusting the write timing. For instance, the apparatus can include an address/control bus, a write clock data recovery (WCDR) signal bus, and a timing adjustment module. The address/control bus can be configured to concurrently enable a WCDR mode of operation and an active mode of operation. The WCDR signal bus can be configured to transmit WCDR data to a memory device during the WCDR mode of operation. And the timing adjustment module can be configured to adjust a timing based on a phase shift in the WCDR data. | 10-31-2013 |
20140211571 | Adjustment of Write Timing in a Memory Device - A method and system are provided for adjusting a write timing in a memory device. For instance, the method can include receiving a data signal, a write clock signal, and a reference signal. The method can also include detecting a phase shift in the reference signal over time. The phase shift of the reference signal can be used to adjust a phase difference between the data signal and the write clock signal, where the memory device recovers data from the data signal based on an adjusted write timing of the data signal and the write clock signal. | 07-31-2014 |
Patent application number | Description | Published |
20100270597 | METHOD AND APPARATUS FOR PLACING TRANSISTORS IN PROXIMITY TO THROUGH-SILICON VIAS - Roughly described, the invention involves ways to characterize, take account of, or take advantage of stresses introduced by TSV's near transistors. The physical relationship between the TSV and nearby transistors can be taken into account when characterizing a circuit. A layout derived without knowledge of the physical relationships between TSV and nearby transistors, can be modified to do so. A macrocell can include both a TSV and nearby transistors, and a simulation model for the macrocell which takes into account physical relationships between the transistors and the TSV. A macrocell can include both a TSV and nearby transistors, one of the transistors being rotated relative to others. An IC can also include a transistor in such proximity to a TSV as to change the carrier mobility in the channel by more than the limit previously thought to define an exclusion zone. | 10-28-2010 |
20100274376 | Method and Apparatus for Performing Stress Modeling of Integrated Circuit Material Undergoing Material Conversion - A method, a computer medium storing computer instructions performing a method, and a computer with processor and memory perform stress modeling as follows. The stress model transforms a representation of a material conversion of a first material in the integrated circuit to a second material in the integrated circuit. Prior to the material conversion the first material occupies a first space having a first boundary. After the material conversion the first material and the second material together occupy a second space having a second boundary. The first space and the second space are different. The stress model performed by the computer system transforms the representation of the material conversion of the first material to the second material into: i) the first material occupying the first space having the first boundary, and ii) a strain displacement condition of the first material. The strain displacement condition is determined by a spatial change from the first boundary to the second boundary. | 10-28-2010 |
20130132914 | Method and Apparatus for Placing Transistors In Proximity to Through-Silicon Vias - Roughly described, the invention involves ways to characterize, take account of, or take advantage of stresses introduced by TSV's near transistors. The physical relationship between the TSV and nearby transistors can be taken into account when characterizing a circuit. A layout derived without knowledge of the physical relationships between TSV and nearby transistors, can be modified to do so. A macrocell can include both a TSV and nearby transistors, and a simulation model for the macrocell which takes into account physical relationships between the transistors and the TSV. A macrocell can include both a TSV and nearby transistors, one of the transistors being rotated relative to others. An IC can also include a transistor in such proximity to a TSV as to change the carrier mobility in the channel by more than the limit previously thought to define an exclusion zone. | 05-23-2013 |
20140173545 | PLACING TRANSISTORS IN PROXIMITY TO THROUGH-SILICON VIAS - Roughly described, the invention involves ways to characterize, take account of, or take advantage of stresses introduced by TSV's near transistors. The physical relationship between the TSV and nearby transistors can be taken into account when characterizing a circuit. A layout derived without knowledge of the physical relationships between TSV and nearby transistors, can be modified to do so. A macrocell can include both a TSV and nearby transistors, and a simulation model for the macrocell which takes into account physical relationships between the transistors and the TSV. A macrocell can include both a TSV and nearby transistors, one of the transistors being rotated relative to others. An IC can also include a transistor in such proximity to a TSV as to change the carrier mobility in the channel by more than the limit previously thought to define an exclusion zone. | 06-19-2014 |
20140208280 | MODELING MECHANICAL BEHAVIOR WITH LAYOUT-DEPENDENT MATERIAL PROPERTIES - Computer-implemented techniques for modeling the mechanical behavior of integrated circuits using layout-dependent material properties are disclosed. The back end of line wiring that connects an integrated circuit to a substrate undergoes stresses and strains due to many heating and cooling cycles during a chip's packaging and lifecycle. Depending on integrated circuit design style, there may be vastly different thermal profiles across the integrated circuit. The mechanical behavior caused by the thermal cycles of the wire, vias, and insulators comprising the BEOL materials is simulated. Extraction of the integrated circuit structural information, regarding the BEOL materials, yields anisotropic information. Layout-dependent material volume fractions are computed using integrated circuit structural information. Anisotropic mechanical properties are determined based on the structural information. Mechanical responses are calculated based on the anisotropic material properties and the calculated material-volume fractions. | 07-24-2014 |
20150205904 | PLACING TRANSISTORS IN PROXIMITY TO THROUGH-SILICON VIAS - Roughly described, the invention involves ways to characterize, take account of, or take advantage of stresses introduced by TSV's near transistors. The physical relationship between the TSV and nearby transistors can be taken into account when characterizing a circuit. A layout derived without knowledge of the physical relationships between TSV and nearby transistors, can be modified to do so. A macrocell can include both a TSV and nearby transistors, and a simulation model for the macrocell which takes into account physical relationships between the transistors and the TSV. A macrocell can include both a TSV and nearby transistors, one of the transistors being rotated relative to others. An IC can also include a transistor in such proximity to a TSV as to change the carrier mobility in the channel by more than the limit previously thought to define an exclusion zone. | 07-23-2015 |
Patent application number | Description | Published |
20130291125 | Method and Apparatus for Facilitating the Transfer of a Software License between Computer Systems - One embodiment of the present invention provides a system that facilitates the transfer of a software license from a first client to a second client. The system operates by receiving a request at the first client to deactivate the software license for an associated application installed on the first client. The system then receives a deactivation request that includes an identifier for the license at a license activation server from the first client. Next, the system validates the identifier on the license activation server to determine if the identifier is a valid identifier. If so, the system sends a deactivation message to the first client, receives a deactivation response from the first client, and increments a count of license instances available for the identifier on the license activation server. | 10-31-2013 |
20140033313 | SOFTWARE SUITE ACTIVATION - A method and a system perform software suite activation. In some embodiments, a method includes installing a software suite having a number of software products onto a computer device. If a copy of one of the number of software products is already activated on the computer device, the installing includes deactivating a license of the copy of the one of the number of software products. Additionally, if a copy of one of the number of software products is already activated on the computer device, the installing includes adopting, by the software suite, the copy of the one of the number of software products. | 01-30-2014 |
20140304129 | Surrender and management of software licenses - A vendor-operated server can be configured to receive requests from one or more customers to return corresponding sets of (one or more) software licenses for financial credit. In response to receiving a request to return a set of software licenses, the vendor-operated server verifies the return of the set of software licenses to ensure that the customer (making the request) no longer uses the software licenses to operate the vendor's software application(s). After receiving and confirming a return of the set of software licenses back to the vendor-operated server, the vendor-operated server provides notification to, for example, a vendor's corresponding order management system (e.g., financial/license management system) to indicate that the customer has returned the set of software licenses. This verification ensures that the customer does not inadvertently or intentionally continue to use the vendor's software application after obtaining credit for the returned licenses. | 10-09-2014 |
20150033023 | PREVENTING PLAYBACK OF STREAMING VIDEO IF ADS ARE REMOVED - A digitally signed manifest file includes metadata that specifies whether a policy regarding the digital signature should be enforced. The policy is then used to generate additional metadata associated with the program and ad content of the video stream. The metadata is tamper resistant so that any modification or removal of the metadata will prevent the video stream from playing. If the metadata indicates that the policy should be enforced, the digital signature of the manifest is verified by the client, and an invalid or missing signature prevents the video stream from being played back. The metadata defines which media players are allowed and/or not allowed to play back a video stream, including media players that are configured to skip or remove ads, and/or includes an encryption key identifier for verifying the digital signature. The ad content is digitally signed to prevent modification or replacement of the ad content. | 01-29-2015 |