Patent application number | Description | Published |
20080220567 | Semiconductor Component and Production Method - A semiconductor component is disclosed. In one embodiment, the semiconductor component includes a semiconductor chip, which is arranged on a substrate, and a housing, which at least partially surrounds the semiconductor chip. The substrate is at least partly provided with a layer of polymer foam. | 09-11-2008 |
20080224301 | Lead Structure for a Semiconductor Component and Method for Producing the Same - A lead structure for a semiconductor component includes: external leads for external connections outside a plastic housing composition, internal leads for electrical connections within the plastic housing composition, and a chip mounting island composed of the lead material. While leaving free contact pads of the internal leads, the top sides of the chip mounting island and the internal leads are equipped with nanotubes as an anchoring layer. The plastic housing composition is arranged in the interspaces between the nanotubes arranged on the internal leads, while an adhesive composition for the semiconductor chip is arranged in the interspaces between the nanotubes arranged on the chip mounting island. The adhesive composition and the plastic housing composition fill the interspaces in a manner free of voids. | 09-18-2008 |
20080242057 | SEMICONDUCTOR DEVICE WITH A THINNED SEMICONDUCTOR CHIP AND METHOD FOR PRODUCING THE THINNED SEMICONDUCTOR CHIP - A semiconductor device with a thinned semiconductor chip and a method for producing the latter is disclosed. In one embodiment, the thinned semiconductor chip has a top side with contact areas and a rear side with a rear side electrode. In this case, the rear side electrode is cohesively connected to a chip pad of a circuit carrier via an electrically conductive layer. In another embodiment, the thinned semiconductor chips of this semiconductor device according to the invention have low-microdefect edge side regions with semiconductor element structures and edge sides patterned by etching technology. | 10-02-2008 |
20080303172 | METHOD FOR STACKING SEMICONDUCTOR CHIPS AND SEMICONDUCTOR CHIP STACK PRODUCED BY THE METHOD - Apparatus for packaging two chips includes, in some embodiments, a first chip having at least one elevation and at least one cutout on a bottom thereof. It also includes a second chip having at least one elevation and at least one cutout on a top thereof. In some embodiments disclosed, the elevations and cutouts of the first chip and the second chip are configured to allow the elevations to be intermeshed with the cutouts when the chips are stacked with the bottom of the first chip engaging the top of the second chip. | 12-11-2008 |
20080315399 | Semiconductor Device Having Through Contacts Through a Plastic Housing Composition and Method for the Production Thereof - The invention relates to a semiconductor device comprising through contacts through a plastic housing composition and a method for the production thereof. For this purpose, the wiring substrate has a solder deposit on which through contact elements are arranged vertically with respect to the wiring substrate and extend as far as the top side of the semiconductor device. | 12-25-2008 |
20080315438 | SEMICONDUCTOR DEVICE INCLUDING A STRESS BUFFER - An integrated circuit includes a first surface configured for mounting to a carrier, an active area of the integrated circuit spaced from the first surface, a bond pad disposed over and in electrical communication with the active area, and a ceramic inorganic stress-buffering layer disposed between the active area and the bond pad. | 12-25-2008 |
20090026558 | SEMICONDUCTOR DEVICE HAVING A SENSOR CHIP, AND METHOD FOR PRODUCING THE SAME - A semiconductor sensor device and method is disclosed. In one embodiment, the semiconductor device includes a cavity housing and a sensor chip. In one embodiment, the cavity housing has an opening to the surroundings. The sensor region of the sensor chip faces said opening. The sensor chip is mechanically decoupled from the cavity housing. In one embodiment, the sensor chip is embedded into a rubber-elastic composition on all sides in the cavity of the cavity housing. | 01-29-2009 |
20090039484 | Semiconductor device with semiconductor chip and method for producing it - A semiconductor chip has at least one first contact and one second contact on its top side and has connecting elements which are arranged jointly on a structure element and which connect the first contact and the second contact of the top side of the semiconductor chip to the external contacts. | 02-12-2009 |
20090065914 | SEMICONDUCTOR DEVICE WITH LEADERFRAME INCLUDING A DIFFUSION BARRIER - A semiconductor device includes a leadframe having a first face and an opposing second face, a portion of the first face defining a die pad, a diffusion barrier deposited on at least a portion of the die pad, and at least one chip coupled to the diffusion barrier. | 03-12-2009 |
20090079065 | SEMICONDUCTOR DEVICE INCLUDING ELECTRONIC COMPONENT COUPLED TO A BACKSIDE OF A CHIP - A semiconductor package includes a substrate, at least one chip including a first side and a backside opposite of the first side, the first side electrically coupled to the substrate, a conductive layer coupled to the backside of the at least one chip, and at least one electronic component coupled to the conductive layer and in electrical communication with the substrate. | 03-26-2009 |
20090102044 | DEVICE INCLUDING A HOUSING FOR A SEMICONDUCTOR CHIP - A device including a housing for a semiconductor chip is disclosed. One embodiment provides a plurality of leads. A first lead forms an external contact element at a first housing side and extends at the first housing side into the housing in the direction of an opposite second housing side. The length of the first lead within the housing is greater than half the distance between the first and the second housing side. | 04-23-2009 |
20090280314 | THERMOPLASTIC-THERMOSETTING COMPOSITE AND METHOD FOR BONDING A THERMOPLASTIC MATERIAL TO A THERMOSETTING MATERIAL - Composite with a first part composed of a thermoset material and with a second part composed of a thermoplastic material, and with an adhesion-promoter layer located between these, where the first part has been bonded by way of the adhesion-promoter layer to the second part, and where the adhesion-promoter layer comprises pyrolytically deposited semiconductor oxides and/or pyrolytically deposited metal oxides. | 11-12-2009 |
20100078822 | Electronic Device and Method of Manufacturing Same - This application relates to a method of manufacturing a semiconductor device comprising: providing multiple chips each comprising contact elements on a first main face of each of the multiple chips, and a first layer applied to each of the first main faces of the multiple chips; placing the multiple chips over a carrier with the first layers facing the carrier; applying encapsulation material to the multiple chips and the carrier to form an encapsulation workpiece embedding the multiple chips; and removing the carrier from the encapsulation workpiece. | 04-01-2010 |
20100207277 | SEMICONDUCTOR COMPONENT HAVING A STACK OF SEMICONDUCTOR CHIPS AND METHOD FOR PRODUCING THE SAME - A semiconductor component including a stack of semiconductor chips, the semiconductor chips being fixed cohesively one on top of another, is disclosed. The contact areas of the semiconductor chips are led as far as the edges of the semiconductor chips and conductor portions extend at least from an upper edge to a lower edge of the edge sides of the semiconductor chips in order to electrically connect the contact area of the stacked semiconductor chips to one another. | 08-19-2010 |
20100297792 | SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR CHIP, AND METHOD FOR THE PRODUCTION THEREOF - A semiconductor device having a semiconductor chip having an active surface with flip-chip contacts and a passive surface is disclosed. In one embodiment, the flip-chip contacts are surrounded by an electrically insulating layer as underfill material, the layer having a UV B-stageable material. The UV B-stageable material is applied on the active surface of the semiconductor wafer. | 11-25-2010 |
20110155297 | METHOD OF APPLYING AN ADHESIVE LAYER ON THINCUT SEMICONDUCTOR CHIPS OF A SEMICONDUCTOR WAFER - The invention relates to a method for making a semiconductor. In one embodiment the method includes applying an adhesive layer to ground-thin or thinned semiconductor chips of a semiconductor wafer. In this embodiment, the adhesive layer composed of curable adhesive is introduced relatively early into a method for the thinning by grinding, separation and singulation of a semiconductor wafer to form thinned semiconductor chips, and is used further in a semiconductor device into which the thinned semiconductor chip is to be incorporated. | 06-30-2011 |
20120028382 | SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR CHIP, AND METHOD FOR THE PRODUCTION THEREOF - A semiconductor device having a semiconductor chip having an active surface with flip-chip contacts and a passive surface is disclosed. In one embodiment, the flip-chip contacts are surrounded by an electrically insulating layer as underfill material, the layer having a UV B-stageable material. The UV B-stageable material is applied on the active surface of the semiconductor wafer. | 02-02-2012 |
20120178218 | SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR CHIP, AND METHOD FOR THE PRODUCTION THEREOF - A semiconductor device having a semiconductor chip having an active surface with flip-chip contacts and a passive surface is disclosed. The flip-chip contacts are surrounded by an electrically insulating layer as underfill material, the layer having a UV B-stageable material. The UV B-stageable material is applied on the active surface of the semiconductor wafer. | 07-12-2012 |
20120223424 | SEMICONDUCTOR COMPONENT AND PRODUCTION METHOD - Semiconductor component and method for production of a semiconductor component. The invention relates to a semiconductor component having a semiconductor chip, which is arranged on a substrate, in one embodiment on a chip carrier, and an encapsulation material, which at least partially surrounds the semiconductor chip. The chip carrier is at least partly provided with a layer of polymer foam. | 09-06-2012 |
20130062781 | CHIP ARRANGEMENT AND METHOD FOR PRODUCING A CHIP ARRANGEMENT - A chip arrangement includes semiconductor chips coupled to opposing sides of an insulating layer. The arrangement includes a first semiconductor chip having a first chip surface presenting a first chip conductive region. An electrically insulating layer includes a first layer surface presenting a first layer conductive region, and a second, opposing surface presenting a second layer conductive region. The electrically insulating layer is coupled to the first semiconductor chip by applying the first layer conductive region to the first chip conductive region. The electrically insulating layer is then coupled to the second chip conductive region by applying the second layer conductive region to the second chip conductive region. | 03-14-2013 |
20130105992 | SEMICONDUCTOR COMPONENT HAVING A STACK OF SEMICONDUCTOR CHIPS AND METHOD FOR PRODUCING THE SAME | 05-02-2013 |
20130256922 | Method for Fabricating a Semiconductor Device - In a method for fabricating a semiconductor device, a carrier and at least one semiconductor chip are provided. | 10-03-2013 |
20130328206 | CHIP ARRANGEMENT AND METHOD FOR PRODUCING A CHIP ARRANGEMENT - A chip arrangement includes semiconductor chips coupled to opposing sides of an insulating layer. The arrangement includes a first semiconductor chip having a first chip surface presenting a first chip conductive region. An electrically insulating layer includes a first layer surface presenting a first layer conductive region, and a second, opposing surface presenting a second layer conductive region. The electrically insulating layer is coupled to the first semiconductor chip by applying the first layer conductive region to the first chip conductive region. The electrically insulating layer is then coupled to the second chip conductive region by applying the second layer conductive region to the second chip conductive region. | 12-12-2013 |
20140001622 | CHIP PACKAGES, CHIP ARRANGEMENTS, A CIRCUIT BOARD, AND METHODS FOR MANUFACTURING CHIP PACKAGES | 01-02-2014 |