Patent application number | Description | Published |
20080220425 | Methods and Compositions for Detecting Target Sequences - The present invention relates to compositions and methods for the detection and characterization of nucleic acid sequences and variations in nucleic acid sequences. The present invention relates to methods for amplifying a synthetic DNA from a target nucleic acid, forming a nucleic acid cleavage structure on the synthetic DNA, and detecting cleavage of the nucleic acid cleavage structure as an indicator of the preset of the target nucleic acid. | 09-11-2008 |
20080293046 | RNA detection assays - The present invention provides novel cleavage agents and polymerases for the cleavage and modification of nucleic acid. The cleavage agents and polymerases find use, for example, for the detection and characterization of nucleic acid sequences and variations in nucleic acid sequences. In some embodiments, the 5′ nuclease activity of a variety of enzymes is used to cleave a target-dependent cleavage structure, thereby indicating the presence of specific nucleic acid sequences or specific variations thereof. | 11-27-2008 |
20090142754 | RNA Detection Assays - The present invention provides novel cleavage agents and polymerases for the cleavage and modification of nucleic acid. The cleavage agents and polymerases find use, for example, for the detection and characterization of nucleic acid sequences and variations in nucleic acid sequences. In some embodiments, the 5′ nuclease activity of a variety of enzymes is used to cleave a target-dependent cleavage structure, thereby indicating the presence of specific nucleic acid sequences or specific variations thereof. | 06-04-2009 |
20110104682 | RNA DETECTION ASSAYS - The present invention provides novel cleavage agents and polymerases for the cleavage and modification of nucleic acid. The cleavage agents and polymerases find use, for example, for the detection and characterization of nucleic acid sequences and variations in nucleic acid sequences. In some embodiments, the 5′ nuclease activity of a variety of enzymes is used to cleave a target-dependent cleavage structure, thereby indicating the presence of specific nucleic acid sequences or specific variations thereof. | 05-05-2011 |
Patent application number | Description | Published |
20100067535 | Packet Router Having Improved Packet Classification - A computer-implemented method for classifying received packets using a hardware cache of evolving rules and a software cache having an original rule set. The method including receiving a packet, processing the received packet through a hardware-based packet classifier having at least one evolving rule to identify at least one cache miss packet, and processing the cache miss packet through a software based packet classifier including an original rule set. Processing the cache miss packet includes determining whether to expand at least one of the at least one evolving rules in the hardware-based packet classifier based on the cache miss packet. The determination includes determining whether an evolving rule has both the same action and lies entirely within one of the rule of the original rule set. | 03-18-2010 |
20130179490 | Reducing Latency and Cost in Resilient Cloud File Systems - Various exemplary embodiments relate to a method of storing a file block in a cloud system including a plurality of data centers. The method may include; receiving the file block from a client; generating a plurality of chunks from the file block, wherein each chunk is smaller than the file block and the file block may be reconstructed from a subset of the chunks; distributing each chunk to one of the plurality of data centers; and storing the file block in a cache. Various exemplary embodiments relate to a cloud system for storing files. The system may include a plurality of data centers including a primary data center. The primary data center may include: a cache configured to store at least one complete file block; a chunk storage configured to store a chunk for each of a plurality of file blocks; a file encoder; and a file decoder. | 07-11-2013 |
20130185257 | CLOUD DATA RESILIENCY SYSTEM AND METHOD - An exemplary cloud data system includes a primary datacenter device that maintains a complete copy of a file. A plurality of secondary datacenter devices maintain respective encoded, partial copies of the file. At least some of the encoded partial copies are sufficient to recreate the complete copy of the file. The primary datacenter device makes any changes to the complete copy of the file responsive to any write operation on the file. The primary datacenter device provides correspondingly changed encoded partial copies to the respective secondary datacenter devices. | 07-18-2013 |
20140269307 | Content Addressable Memory with Reduced Power Consumption - A ternary content addressable memory (TCAM) provides a pre-classifier section which analyzes a subset of received data values to forward the entire received data values only to selected portions of a TCAM likely holding that data value to substantially reduce power consumption required for classification. | 09-18-2014 |
Patent application number | Description | Published |
20080315253 | FRONT AND BACKSIDE PROCESSED THIN FILM ELECTRONIC DEVICES - This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits. | 12-25-2008 |
20100078722 | Method for fabricating high-speed thin-film transistors - This invention provides methods for fabricating high speed TFTs from silicon-on-insulator and bulk single crystal semiconductor substrates, such as Si(100) and Si(110) substrates. The TFTs may be designed to have a maximum frequency of oscillation of 3 GHz, or better. | 04-01-2010 |
20100243986 | HYBRID VERTICAL CAVITY LIGHT EMITTING SOURCES AND PROCESSES FOR FORMING THE SAME - Vertical cavity light emitting sources that utilize patterned membranes as reflectors are provided. The vertical cavity light emitting sources have a stacked structure that includes an active region disposed between an upper reflector and a lower reflector. The active region, upper reflector and lower reflector can be fabricated from single or multi-layered thin films of solid states materials (“membranes”) that can be separately processed and then stacked to form a vertical cavity light emitting source. | 09-30-2010 |
20100308429 | FLEXIBLE LATERAL PIN DIODES AND THREE-DIMENSIONAL ARRAYS AND IMAGING DEVICES MADE THEREFROM - Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device. | 12-09-2010 |
20100327355 | FRONT AND BACKSIDE PROCESSED THIN FILM ELECTRONIC DEVICES - This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits. | 12-30-2010 |
20120228582 | HYBRID VERTICAL CAVITY LIGHT EMITTING SOURCES - Vertical cavity light emitting sources that utilize patterned membranes as reflectors are provided. The vertical cavity light emitting sources have a stacked structure that includes an active region disposed between an upper reflector and a lower reflector. The active region, upper reflector and lower reflector can be fabricated from single or multi-layered thin films of solid states materials (“membranes”) that can be separately processed and then stacked to form a vertical cavity light emitting source. | 09-13-2012 |
20120273913 | FLEXIBLE LATERAL PIN DIODES AND THREE-DIMENSIONAL ARRAYS AND IMAGING DEVICES MADE THEREFROM - Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device. | 11-01-2012 |
20130229776 | HIGH-SPEED, FLEXIBLE INTEGRATED CIRCUITS AND METHODS FOR MAKING HIGH-SPEED, FLEXIBLE INTEGRATED CIRCUITS - The present invention provides flexible devices, such as integrated circuits, having a multilevel electronic device structure including two or more electronic components. The electronic components within the structure are electrically connected by an interconnect structure having multiple interconnect levels. In addition to the multilevel electronic device structure, the flexible devices include an elastomeric material disposed around the interconnect levels, including within the spaces between the interconnect levels. | 09-05-2013 |
20140134793 | METHODS FOR MAKING LARGE-AREA, FREE-STANDING METAL OXIDE FILMS - The present invention provides continuous, free-standing metal oxide films and methods for making said films. The methods are able to produce large-area, flexible, thin films having one or more continuous, single-crystalline metal oxide domains. The methods include the steps of forming a surfactant monolayer at the surface of an aqueous solution, wherein the headgroups of the surfactant molecules provide a metal oxide film growth template. When metal ions in the aqueous solution are exposed to the metal oxide film growth template in the presence of hydroxide ions under suitable conditions, a continuous, free-standing metal oxide film can be grown from the film growth template downward into the aqueous solution. | 05-15-2014 |
20140209977 | DOPED AND STRAINED FLEXIBLE THIN-FILM TRANSISTORS - Semiconductor trilayer structures that are doped and strained are provided. Also provided are mechanically flexible transistors, including radiofrequency transistors, incorporating the trilayer structures and methods for fabricating the trilayer structures and transistors. The trilayer structures comprise a first layer of single-crystalline semiconductor material, a second layer of single-crystalline semiconductor material and a third layer of single-crystalline semiconductor material. In the structures, the second layer is in contact with and sandwiched between the first and third layers and the first layer is selectively doped to provide one or more doped regions in the layer. | 07-31-2014 |
20140264375 | LATTICE MISMATCHED HETEROJUNCTION STRUCTURES AND DEVICES MADE THEREFROM - Semiconductor heterojunction structures comprising lattice mismatched, single-crystalline semiconductor materials and methods of fabricating the heterojunction structures are provided. The heterojunction structures comprise at least one three-layer junction comprising two layers of single-crystalline semiconductor and a current tunneling layer sandwiched between and separating the two layers of single-crystalline semiconductor material. Also provided are devices incorporating the heterojunction structures, methods of making the devices and method of using the devices. | 09-18-2014 |
Patent application number | Description | Published |
20120303910 | Detecting Potential Access Errors In A Multi-Threaded Application - In one embodiment, a method includes maintaining thread analysis metadata for a multi-threaded application. The metadata may include a thread vector clock for threads of the application and a synchronization vector clock for synchronization objects of the application. In addition, an initialization log and an access log can be generated and maintained for memory accesses occurring during execution of the application. From this metadata, it may be determined if an access to a memory element by a thread is a potential invalid access for a different scheduling of the application. Other embodiments are described and claimed. | 11-29-2012 |
20130290975 | METHOD AND DEVICE FOR DETERMINING PARALLELISM OF TASKS OF A PROGRAM - A method and device for determining parallelism of tasks of a program comprises generating a task data structure to track the tasks and assigning a node of the task data structure to each executing task. Each node includes a task identification number and a wait number. The task identification number uniquely identifies the corresponding task from other currently executing tasks and the wait number corresponds to the task identification number of a node corresponding to the last descendant task of the corresponding task that was executed prior to a wait command. The parallelism of the tasks is determined by comparing the relationship between the tasks. | 10-31-2013 |
20140207632 | BUDGET-AWARE EVENT INFORMATION COLLECTION DURING PROGRAM EXECUTION - Embodiments of techniques and systems for slowdown-budget-aware event information collection are described. In various embodiments, a system may be configured to control collection of information for events associated with execution of a program during execution of the program based on a slowdown cost budget. In various embodiments, the slowdown cost budget may be set in order to help keep slowdown experienced due to associated event information collection within a range around the budget. In embodiments, this may provide a user with greater control over the effects of the associated event information collection and instrumentation than would be available due to simple sampling rate control. Other embodiments may be described and claimed. | 07-24-2014 |
20140331211 | METHOD AND SYSTEM FOR DETECTING CONCURRENCY PROGRAMMING ERRORS IN KERNEL MODULES AND DEVICE DRIVERS - The existence of errors and bugs in device drivers and other software operating in kernel space may be difficult to find and eliminate. A system and method for debugging computer programs may involve the use of several different modules. Running in the kernel space is an event monitor. Running in the user space is an event collector, an event player, and a concurrency error detector. This setup allows one to debug device driver software and other software that executes in kernel space using existing user space error detectors. | 11-06-2014 |