Patent application number | Description | Published |
20090143033 | GAIN CONTROL USING A DYNAMICALLY CONFIGURABLE TRANSFORMER - An apparatus comprising: a baseband filter configured to produce a baseband signal utilizing an input signal; a mixer unit configured to produce an intermediate signal utilizing the baseband signal and a local oscillator signal; and a dynamically configurable transformer configured to provide a gain to the intermediate signal, wherein the gain is dynamically configurable. | 06-04-2009 |
20090181631 | METHOD AND SYSTEM FOR A SYNTHESIZER/LOCAL OSCILLATOR GENERATOR (LOGEN) ARCHITECTURE FOR A QUAD-BAND GSM/GPRS RADIO - A method for processing signals is disclosed and may include performing using one or more circuits in a multiband radio, functions including receiving an input signal from an oscillator that generates signals for each of a plurality of bands handled by the multiband radio. The received input signal may be divided. A feedback loop reference signal may be generated from the input signal. A coarse calibration signal and/or a fine calibration signal may be generated from the generated feedback loop reference signal. The oscillator may be calibrated utilizing the coarse calibration signal and/or the fine calibration signal. The input signal generated by the oscillator may be between about 3.4 GHz and 4 GHz. The receive input signal may be buffered. The generated feedback loop reference signal may also be buffered. | 07-16-2009 |
20100267354 | Frequency Translated Filter - Embodiments of a frequency translated filter (FTF) are presented. An FTF includes a passive mixer and a baseband impedance. The baseband impedance includes a network of one or more passive components (e.g., resistors, inductors, and capacitors) that form a low-Q filter. The passive mixer is configured to translate the baseband impedance to a higher frequency. The translated baseband impedance forms a high-Q filter and is presented at the input of the FTF. The FTF can be fully integrated in CMOS IC technology (or others, e.g., Bipolar, BiCMOS, and SiGe) and applied in wireless receiver systems including GSM, Wideband Code Division Multiple Access (WCDMA), Bluetooth, and wireless LANs (e.g., IEEE 802.11). | 10-21-2010 |
20110018604 | Configurable Clock Signal Generator - A method to provide a low-power clock signal or a low-noise clock signal is described herein. It is determined whether a low-power mode or a low-noise mode is in use. A voltage reference input of a low-dropout voltage regulator (LDO) is switched to a low-power voltage reference for low-power mode and to a low-noise voltage reference for low-noise mode. The LDO provides a constant voltage output to a crystal oscillator. A clock signal is generated using the crystal oscillator. The clock signal is limited using a low-power limiter to generate a low-power output clock signal and/or is limited using a low-noise limiter to generate a low-noise clock signal. The low-power output clock signal or the low-noise output clock signal is selected using a mux. | 01-27-2011 |
20110092180 | Transconductance Enhanced RF Front-End - Embodiments of an RF receiver front-end are presented herein. In an embodiment, the RF receiver front-end comprises a transconductance LNA, a passive mixer, and a g | 04-21-2011 |
20120068780 | Systems and Methods for Reducing Frequency Pulling in an Oscillator Circuit - Methods and systems are provided to calibrate an oscillator circuit to reduce frequency pulling as a result of a change in power to a portion of the oscillator circuit. In an embodiment, an oscillator is coupled to a clock buffer circuit and a tuning capacitor configured to tune a frequency of the oscillator to a baseline frequency required for cellular communications. A change in power to the clock buffer circuit initiates a change in an amount of capacitance seen by the oscillator, which negatively impacts the tuning of the oscillator. A register stores a frequency offset caused by the change in power, and the tuning capacitor is adjusted, using the frequency offset, in response to the change in power, such that the total amount of capacitance seen by the oscillator is not changed when the change in power occurs. | 03-22-2012 |
20130127555 | Systems and Methods for Reducing Frequency Pulling in an Oscillator Circuit - Methods and systems are provided to calibrate an oscillator circuit to reduce frequency pulling as a result of a change in power to a portion of the oscillator circuit. In an embodiment, an oscillator is coupled to a clock buffer circuit and a tuning capacitor configured to tune a frequency of the oscillator to a baseline frequency required for cellular communications. A change in power to the clock buffer circuit initiates a change in an amount of capacitance seen by the oscillator, which negatively impacts the tuning of the oscillator. A register stores a frequency offset caused by the change in power, and the tuning capacitor is adjusted, using the frequency offset, in response to the change in power, such that the total amount of capacitance seen by the oscillator is not changed when the change in power occurs. | 05-23-2013 |
20130303095 | GAIN CONTROL USING A DYNAMICALLY CONFIGURABLE TRANSFORMER - An apparatus includes a dynamically configurable transformer configured to provide a gain to a target signal. The gain is dynamically configurable. The dynamically configurable transformer includes at least one parallel resistive element configured to be dynamically activated in parallel with a load. | 11-14-2013 |