Patent application number | Description | Published |
20090140295 | GaN-based semiconductor device and method of manufacturing the same - A GaN-based semiconductor device includes a silicon substrate; an active layer of a GaN-based semiconductor formed on the silicon substrate; a trench formed in the active layer and extending from a top surface of the active layer to the silicon substrate; a first electrode formed on an internal wall surface of the trench so that the first electrode extends from the top surface of the active layer to the silicon substrate; a second electrode formed on the active layer so that a current flows between the first electrode and the second electrode via the active layer; and a bottom electrode formed on a bottom surface of the silicon substrate. The first electrode is formed of a metal capable of being in ohmic contact with the silicon substrate and the active layer. | 06-04-2009 |
20090189191 | SEMICONDUCTOR DEVICE - A semiconductor device includes a field effect transistor formed of a GaN-based compound semiconductor and having a source electrode, a drain electrode, and a gate electrode, and a diode formed of a semiconductor material having a gandgap energy smaller than a bandgap energy of the GaN-based compound semiconductor. A cathode electrode and an anode electrode of the diode are electrically connected to the source electrode and the gate electrode of the field effect transistor, respectively. | 07-30-2009 |
20090194790 | Field effect transister and process for producing the same - A field effect transistor has an MOS structure and is formed of a nitride based compound semiconductor. The field effect transistor includes a substrate; a semiconductor operating layer having a recess part and formed on the substrate; an insulating layer formed on the semiconductor operating layer including the recess part; a gate electrode formed on the insulating layer at the recess part; and a source electrode and a drain electrode formed on the semiconductor operating layer with the recess part in between and electrically connected to the semiconductor operating layer. The recess part includes a side wall protruding and inclined relative to the semiconductor operating layer. | 08-06-2009 |
20090200645 | SEMICONDUCTOR ELECTRONIC DEVICE - A semiconductor electronic device comprises a substrate; a buffer layer formed on the substrate, the buffer layer including not less than two layers of composite layer in which a first semiconductor layer formed of a nitride-based compound semiconductor layer having a lattice constant smaller than a lattice constant of the substrate and a thermal expansion coefficient larger than a thermal expansion coefficient of the substrate and a second semiconductor layer formed of a nitride-based compound semiconductor having a lattice constant smaller than a lattice constant of the first semiconductor layer and a thermal expansion coefficient larger than a thermal expansion coefficient of the substrate are alternately laminated; an intermediate layer provided between the substrate and the buffer layer, the intermediate layer being formed of a nitride-based compound semiconductor having a lattice constant smaller than a lattice constant of the first semiconductor layer and a thermal expansion coefficient larger than a thermal expansion coefficient of the substrate; and a semiconductor active layer formed on the buffer layer, the semiconductor active layer being formed of a nitride-based compound semiconductor, wherein: thicknesses of the first semiconductor layers in the buffer layer are non-uniform thereamong, and at least one of the first semiconductor layer has a thickness greater than a critical thickness, the critical thickness being a thickness above which a direction of warp caused by the first semiconductor layer to the substrate is inverted. | 08-13-2009 |
20090202839 | ADHESIVE AND LAMINATE FOR PACKAGING USING THE SAME - Provided is an adhesive giving a laminate for packaging that favorably withstands retort processing even when the period for curing reaction (aging period) is shortened. The adhesive conysind: a partially acid-modified polyester alcohol composition (A), prepared by esterifying a part of the hydroxyl groups in a polyester alcohol composition produced by condensation of a polyvalent alcohol and a polyvalent alcohol containing at least one of a monocarboxylic acid and a monovalent alcohol, with anhydrotrimellitic acid and a anhydrotrimellitate ester at an anhydrotrimellitic acid/anhydrotrimellitate ester ratio of 10/90 to 70/30 (by mass); and a polyisocyanate (B). Also provided is a laminate for packaging of a plurality of sheet-shaped base materials bonded to each other with the adhesive. | 08-13-2009 |
20090278172 | GaN based semiconductor element - The field effect transistor includes a laminated structure in which a buffer layer, and an electron transporting layer (undoped GaN layer), and an electron supplying layer (undoped AlGaN layer) are laminated in sequence on a sapphire substrate. An npn laminated structure is formed on a source region of the electron supplying layer, and a source electrode is formed on the npn laminated structure. A drain electrode is formed in a drain region of the electron supplying layer, and an insulating film is formed in an opening region formed in the gate region. When a forward voltage greater than a threshold is applied to the gate electrode, an inversion layer is formed and the drain current flows. By changing a thickness and an impurity concentration of the p-type GaN layer, the threshold voltage can be controlled. The electrical field concentration between the gate electrode and the drain electrode is relaxed due to the drift layer, and voltage resistance improves. | 11-12-2009 |
20090278236 | SEMICONDUCTOR DEVICE, WAFER STRUCTURE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A photo-resist used in photolithography in a microfabrication process may be formed uniformly even if trenches for separating semiconductor devices are formed before the microfabrication process. The two parallel trenches are formed between neighboring element forming regions in a p-type semiconductor layer containing a plurality of arrayed element forming regions and a convex portion formed between the two trenches is cut in separating the semiconductor devices. It becomes unnecessary to form a trench across a whole scribing region by this structure, so that a width of the trench may be reduced to be smaller than a thickness of a dicing blade or a diameter of a laser spot for example. As a result, it becomes possible to uniformly form the photo-resist used in the photolithography in the microfabrication process even if the trenches for separation are formed before the microfabrication process. | 11-12-2009 |
20100032716 | SEMICONDUCTOR DEVICE - A semiconductor device includes a substrate; a buffer layer; and a compound semiconductor layer laminated on the substrate with the buffer layer in between. The buffer layer has a dislocation density in a plane in parallel to an in-plane direction thereof, so that a volume resistivity of the buffer layer becomes a substantially maximum value. | 02-11-2010 |
20100078678 | SEMICONDUCTOR ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor electronic device comprises a substrate; a buffer layer formed on said substrate, having two or more layers of composite layers in which a first semiconductor layer comprising nitride based compound semiconductor having smaller lattice constant and greater coefficient of thermal expansion than the substrate and a second semiconductor layer comprising nitride based compound semiconductor having smaller lattice constant and greater coefficient of thermal expansion than the first semiconductor layer are alternately laminated; a semiconductor operating layer comprising nitride based compound semiconductor formed on said buffer layer; a dislocation reducing layer comprising nitride based compound semiconductor, formed in a location between a location directly under said buffer layer and inner area of said semiconductor operating layer, and comprising a lower layer area and an upper layer area each having an uneven boundary surface, wherein threading dislocation extending from the lower layer area to the upper layer area is bent at said boundary surface. | 04-01-2010 |
20100213577 | SEMICONDUCTOR ELECTRONIC DEVICE AND PROCESS OF MANUFACTURING THE SAME - A semiconductor electronic device comprises a substrate; a buffer layer that comprises composite laminations of which a first semiconductor layer, that is formed of a compound semiconductor of a nitride system, that has a lattice constant to be as smaller than that of such the substrate, and that has a coefficient of thermal expansion to be as larger than that of such the substrate, and a second semiconductor layer that is formed of a compound semiconductor of a nitride system are formed as alternately on to such the substrate; a semiconductor operation layer that is formed of a compound semiconductor of a nitride system and that is formed on to such the buffer layer; and a dislocation reduction layer, which comprises a lower layer region and an upper layer region that are formed at any location at an inner side of such the buffer layer and that comprise an interface of a concave and convex shape therebetween, at which a threading dislocation that draws from such the lower layer region toward such the upper layer region is bending at such the interface, wherein such the second semiconductor layer is comprised of a laminated layers as alternately of a third semiconductor layer that has a lattice constant to be as smaller than that of such the substrate and that has a coefficient of thermal expansion to be as larger than that of such the substrate, and of a fourth semiconductor layer that has a lattice constant to be as smaller than that of such the third semiconductor layer and that has a coefficient of thermal expansion to be as larger than that of such the substrate, and an average of such the lattice constants in the second semiconductor layer is to be smaller than that of such the first semiconductor layer, and an average of such the coefficients of thermal expansion in the second semiconductor layer is to be as larger than that of such the substrate. | 08-26-2010 |
20110049529 | GaN-BASED SEMICONDUCTOR ELEMENT AND METHOD OF MANUFACTURING THE SAME - Provided is a GaN series semiconductor element, which is capable of obtaining an adequate normally-off characteristic, and a manufacturing method thereof. | 03-03-2011 |
20110241088 | FIELD EFFECT TRANSISTOR, METHOD OF MANUFACTURING FIELD EFFECT TRANSISTOR, AND METHOD OF FORMING GROOVE - A field effect transistor includes a high resistance layer on a substrate, a semiconductor operation layer that is formed on the high resistance layer and includes a channel layer that has the carbon concentration of not more than 1×10 | 10-06-2011 |
20110293956 | DRY LAMINATION METHOD AND LAMINATE OBTAINED BY USING THE SAME - Provided is a dry lamination method, and a laminate having superior appearance obtained by the method. The method in which an adhesive having a solid matter content of 35 wt % or more diluted in a solvent is applied onto a film according to a gravure process, the solvent is volatilized, and the resulting film is adhered with another film to obtain a laminate, wherein the adhesive is applied by: a gravure cylinder in which the screen number of gravure cylinder is 135 to 270 lines/inch and cell volume is 10 to 30 cc/m | 12-01-2011 |
20130149828 | GaN-based Semiconductor Element and Method of Manufacturing the Same - Provided is a GaN series semiconductor element, which is capable of obtaining an adequate normally-off characteristic, and a manufacturing method thereof. | 06-13-2013 |