Patent application number | Description | Published |
20100165970 | APPARATUS AND METHOD FOR FAST SYNCHRONIZATION IN A DUAL MODE SYSTEM - A method and apparatus is provided for reducing network synchronization time in a dual-mode access terminal. The dual-mode access terminal supports a first and a second network. The method includes determining if CDMA system time is available within the dual-mode access terminal. In response to determining that CDMA system time is available, the method includes forgoing acquiring the CDMA system time through a pilot acquisition procedure, reading the CDMA system time from a memory, and programming the CDMA system time into a system time unit. In response to determining that CDMA system time is not available, the method includes acquiring the CDMA system time through the pilot acquisition procedure and programming the CDMA system time into the system time unit. | 07-01-2010 |
20100279683 | WIRELESS COMMUNICATION BETWEEN A BASE STATION AND A MOBILE DEVICE - System and method for wirelessly communicating between a base station and a mobile device. The base station wirelessly sends a first one or more overhead messages to the mobile device. The first one or more overhead messages may include at least one parameter. The mobile device may wirelessly receive the first one or more overhead messages from the base station, including the at least one parameter. The base station may wirelessly send a second one or more messages to the mobile device according to a schedule based on the at least one parameter. The mobile device may wirelessly receive the second one or more messages according to the schedule based on the at least one parameter. The mobile device may schedule a sleep cycle based on the at least one parameter, which may reduce battery consumption in the mobile device. The second one or more messages may be sent less frequently than the first one or more overhead messages. | 11-04-2010 |
20110164609 | 1X MESSAGE PROCESSING - An apparatus for notifying of a circuit switched event over a packetized data network. The apparatus includes a packetized data modem and an internetworking interface. The packetized data modem is configured to transmit and receive packetized data over a packetized data radio link. The packetized data modem has a tunneling link access control processor that is configured to encapsulate/decapsulate data for a subset of sub-layers corresponding to a link access control layer of a circuit switched network model. The internetwork interface is operatively coupled to the packetized data modem via the packetized data network, and is configured to notify the packetized data modem of the circuit switched event. The internetworking interface has a link access control/tunneling link access control processor that is configured to encapsulate/decapsulate the data when performing notification of the circuit switched event. | 07-07-2011 |
20110222509 | FAST RESELECTION TO OTHER RAT AFTER CSFB - A wireless apparatus having one or more first radios, one or more second radios, interface control, and a processor. The one or more first radios are coupled to one or more first communication links. The one or more second radios are coupled to one or more second communication links. The interface control is coupled to the radios, and selects and executes communications over a specific one of the one or more second communication links following termination of a fallback session over one of the one or more first communication links, where RAT information is employed by the interface control to select the specific one of the one or more second communication links. The processor receives, processes, and provides to the interface control the RAT information, where the RAT information is received prior to termination of the fallback session or as part of termination of the fallback session. | 09-15-2011 |
20130250854 | UE BASED CSFB ENHANCEMENT - A mobile station for notification of a circuit switched event. The mobile station includes a circuit switched modem, a packetized data modem, a radio, and a tune away controller. The circuit switched communicates circuit switched data over a circuit switched network. The packetized data modem communicates packetized data over a packetized data network. The radio couples the packetized data modem to the packetized data network via a packetized data radio link, and couples the circuit switched modem to the circuit switched network via a circuit switched radio link. Only one of the links may be active at a time. The tune away controller is coupled to the circuit switched modem and to the packetized data modem, and indicates tune away events over the packetized data network so that the circuit switched event is processed by the mobile station. The tune away controller directs switching between the links. | 09-26-2013 |
20130324122 | DEEP SLEEP IN 1X M2M DEVICES - A wireless apparatus including a machine-to-machine (M2M) device. The M2M device has an applications processing element, RF transceive elements, and a deep sleep controller. The applications processing element executes one or more functions corresponding to an M2M processing environment, and directs the transmission and reception of radio frequency (RF) messages. The RF transceive elements are operationally coupled to the applications processing elements and transmit and receive the RF messages over the one or more wireless communications links. The deep sleep controller is coupled to the applications processing element and the RF transceive elements, and directs the applications processing element to request a sleep time from a corresponding base station, and causes the M2M device to enter a deep sleep mode upon acceptance of the sleep time by the corresponding base station, where the deep sleep mode is entered by removing power from the RF transceive elements. | 12-05-2013 |
20140022992 | APPARATUS AND METHOD FOR TUNNELED GPM - An apparatus provides notification of a circuit switched event over a packetized data network. The apparatus includes a packetized data modem that is configured to receive lower level packetized data over the packetized data network that comprises the notification. The packetized data modem has a first service-oriented tunneling link access control processor that is configured to decapsulate an Improved 1x Layer 3 General Page Message (IGPM) from the lower level packetized data, where the IGPM comprises a service option corresponding to the circuit switched event. | 01-23-2014 |
20140219247 | LTE+CDMA 1X HYBRID - An apparatus for communicating over a circuit switched network and a packetized data network. The apparatus includes a packetized data modem, a circuit switched modem, and a hybrid processor. The packetized data modem is configured to communicate with the packetized data network over a packetized data radio link via a radio. The circuit switched modem is configured to communicate with the circuit switched network over a circuit switched radio link via the radio. The hybrid processor is configured to monitor a circuit switched sleep cycle and a packetized data sleep cycle, and is configured to direct the packetized data modem and the circuit switched modem to switch between the networks according to the sleep cycles by prioritizing communications with the circuit switched network above communications with the packetized data network. | 08-07-2014 |
Patent application number | Description | Published |
20110001442 | Electric bicycle drive system with regenerative charging - Methods and apparatus for reconfiguring a battery and/or an electric motor assembly for an electric bicycle drive system are provided. A battery having a plurality of battery cells in a first configuration adapted to provide a first battery voltage can be reconfigured into a second configuration adapted to provide a second battery voltage. The second battery voltage may be lower than the first battery voltage. The battery can be charged when in the second configuration. Similarly, an arrangement of two or more electric motors can be provided in a first configuration adapted to provide at least one of a first torque output during a driving action and a first regenerative voltage output during a braking action. The motors can be reconfigured into a second configuration adapted to provide at least one of a second torque output during the driving action and a second regenerative voltage output during the braking action. | 01-06-2011 |
20110255781 | EFFICIENT DESCRIPTOR EXTRACTION OVER MULTIPLE LEVELS OF AN IMAGE SCALE SPACE - A local feature descriptor for a point in an image is generated over multiple levels of an image scale space. The image is gradually smoothened to obtain a plurality of scale spaces. A point may be identified as the point of interest within a first scale space from the plurality of scale spaces. A plurality of image derivatives is obtained for each of the plurality of scale spaces. A plurality of orientation maps is obtained (from the plurality of image derivatives) for each scale space in the plurality of scale spaces. Each of the plurality of orientation maps is then smoothened (e.g., convolved) to obtain a corresponding plurality of smoothed orientation maps. Therefore, a local feature descriptor for the point may be generated by sparsely sampling a plurality of smoothed orientation maps corresponding to two or more scale spaces from the plurality of scale spaces. | 10-20-2011 |
20120027290 | OBJECT RECOGNITION USING INCREMENTAL FEATURE EXTRACTION - In one example, an apparatus includes a processor configured to extract a first set of one or more keypoints from a first set of blurred images of a first octave of a received image, calculate a first set of one or more descriptors for the first set of keypoints, receive a confidence value for a result produced by querying a feature descriptor database with the first set of descriptors, wherein the result comprises information describing an identity of an object in the received image, and extract a second set of one or more keypoints from a second set of blurred images of a second octave of the received image when the confidence value does not exceed a confidence threshold. In this manner, the processor may perform incremental feature descriptor extraction, which may improve computational efficiency of object recognition in digital images. | 02-02-2012 |
20120133310 | RECONFIGURABLE BATTERY - A reconfigurable battery has at least one bank of statically joined series connected battery cells, each cell including a positive and a negative pole. The poles connect through switches to respective output connections. Activating a set of processor controlled switches reconfigures at least some of the battery cells into a configuration to provide a voltage across the output connections. The output battery voltage may vary intermediately between open circuit voltage and the maximum voltage produced by the series connected battery cells. An alternative configuration of switches divides groups of series connected battery cells into separate battery banks that permit other battery cell configurations. Duty cycle modulation of the switches allows intermediate control of output voltage with reduced switching transients. Reconfigurable battery cells used in combination with an electric motor permit selectable speed control and battery regeneration schemes matched to motor output. | 05-31-2012 |
20120256568 | MULTI-PORT RECONFIGURABLE BATTERY - A multi-port reconfigurable battery has at least one bank of statically joined series connected battery cells, each including a positive and negative pole connected through switches to respective output connections on at least one port. Processor controlled switches reconfigure the cells to provide power for electrical loads on one or more ports and simultaneously provide charging on one or more other ports. An alternative configuration divides groups of series connected cells into separate battery banks that permit other configurations. Ports are configurable to share one electrically common connection with other ports providing a simplified configuration (multi-tap reconfigurable battery). Applications include selectable motor speed control and battery regeneration schemes matched to motor output, and single or multiphase AC power output at selectable frequencies for use as an Uninterruptible Power Supply. The battery is also described as a power source for a forced-air induction system (e.g. electric supercharger) for a combustion engine. | 10-11-2012 |
20130002141 | LED DRIVING SYSTEM AND METHOD FOR VARIABLE VOLTAGE INPUT - A plurality of light emitting diodes (LEDs) is driven based on the voltage and current requirements of the LEDs at any given time. The driving of the LEDs is adapted to the input voltage provided. A series of switches (e.g. MOSFETS) is used to selectively illuminate the LEDs according to the input voltage and current, with more LEDs being lit as the input voltage or current increases. In one configuration, the switches are driven to provide a light dimming function. The LEDs can be controlled remotely using, e.g. an X | 01-03-2013 |
20130114121 | MATCHING LAYER THIN-FILMS FOR AN ELECTROMECHANICAL SYSTEMS REFLECTIVE DISPLAY DEVICE - This disclosure provides systems, methods and apparatus for an electromechanical systems reflective display device. In one aspect, an electromechanical systems display device includes a reflective layer and an absorber layer. The absorber layer is spaced apart from the reflective layer to define a cavity between the absorber layer and the reflective layer. The absorber layer is capable of transmitting light into the cavity, absorbing light, and reflecting light, and includes a metal layer. A plurality of matching layers are on a surface of the absorber layer facing away from the cavity, the plurality of matching layers including a first matching layer disposed on the absorber layer and a second matching layer disposed on the first matching layer. | 05-09-2013 |
20130265216 | MULTI-STATE IMOD WITH RGB ABSORBERS - A display apparatus may include a multi-state IMOD, such as an analog IMOD (AIMOD), a 3-state IMOD (such as having a white state, a black state and one colored state) or a 5-state IMOD (such as having a white state, a black state and three colored states). The multi-state IMOD may include a movable reflective layer and an absorber stack. The absorber stack may include a first absorber layer having a first absorption coefficient and a first absorption peak at a first wavelength, a second absorber layer having a second absorption coefficient and a second absorption peak at a second wavelength, and a third absorber layer having a third absorption coefficient and a third absorption peak at a third wavelength. The first, second and third absorption layers may have absorption levels that drop to nearly zero at the center of each neighboring absorber layer's absorption peak. | 10-10-2013 |
20130308852 | SYSTEM AND METHOD FOR ROBUST ESTIMATION OF COLOR DEPENDENT MEASUREMENTS - Methods, devices, and computer program products for robust estimation of color-dependent measurements are described herein. In one aspect, a method for generating a reference color grid that may be placed beside a color-dependent measuring device is disclosed. The reference color grid may contain a number of colors which enable a mapping from the color space of a testing device to a reference color space. This mapping may allow a function that is able to determine an estimate of a color-dependent measurement based on a color in the reference color space to be used. In another aspect, a method for robust estimation of color-dependent measurement using a reference color guide is disclosed. | 11-21-2013 |
20140036340 | THIN FILM STACK WITH SURFACE-CONDITIONING BUFFER LAYERS AND RELATED METHODS - This disclosure provides systems, methods and apparatus for a thin film stack with surface-conditioning buffer layers. In one aspect, the thin film stack includes a plurality of thin film layers each having a thickness greater than about 10 nm and a plurality of surface-conditioning buffer layers each having a thickness between about 1 nm and about 10 nm. The surface-conditioning buffer layers are alternatingly disposed between the thin film layers. Each of the surface-conditioning buffer layers are formed with the same or substantially the same thickness and composition. In some implementations, the surface-conditioning buffer layers are formed by atomic layer deposition. | 02-06-2014 |
20140092110 | ELECTROMECHANICAL SYSTEMS DEVICE WITH PROTRUSIONS TO PROVIDE ADDITIONAL STABLE STATES - This disclosure provides systems, methods, and apparatus for an electromechanical systems (EMS) device with one or more protrusions connected to a surface of the EMS device. In one aspect, the EMS device includes a substrate, a stationary electrode over the substrate, and a movable electrode over the stationary electrode. The movable electrode is configured to move to three or more positions across a gap by electrostatic actuation between the movable electrode and the stationary electrode. When the protrusions contact any surface of the EMS device at one of the positions across the gap, the protrusions change the stiffness of the EMS device. At least one of the surfaces in contact with the one or more protrusions is non-rigid. In some implementations, the protrusions have a height greater than about 20 nm. | 04-03-2014 |
20140132756 | REAL-TIME COMPENSATION FOR BLUE SHIFT OF ELECTROMECHANICAL SYSTEMS DISPLAY DEVICES - This disclosure provides systems, methods, and apparatus related to electromechanical systems display devices. In one aspect, an apparatus includes a display assembly, a sensor, and a processor. The display assembly may include an array of electromechanical systems display devices. The sensor may be configured to provide a signal indicative of an illumination angle, a viewing angle, or both, with respect to a line perpendicular to the display assembly. The processor may be configured to receive the signal from the sensor, to determine the illumination angle and/or viewing angle, and to process image data to compensate for the determined illumination angle and/or viewing angle. In one implementation, the image data is processed to compensate for a shift in a wavelength of light reflected from at least one of the electromechanical systems display devices that would have occurred as a result of a non-normal illumination and/or viewing angle. | 05-15-2014 |
20140218784 | MATCHING LAYER THIN-FILMS FOR AN ELECTROMECHANICAL SYSTEMS REFLECTIVE DISPLAY DEVICE - This disclosure provides systems, methods and apparatus for an electromechanical systems reflective display device. In one aspect, an electromechanical systems display device includes a reflective layer and an absorber layer. The absorber layer is spaced apart from the reflective layer to define a cavity between the absorber layer and the reflective layer. The absorber layer is capable of transmitting light into the cavity, absorbing light, and reflecting light, and includes a metal layer. A plurality of matching layers are on a surface of the absorber layer facing away from the cavity, the plurality of matching layers including a first matching layer disposed on the absorber layer and a second matching layer disposed on the first matching layer. | 08-07-2014 |
Patent application number | Description | Published |
20090002027 | LEVEL SHIFTER HAVING LOW DUTY CYCLE DISTORTION - A level shifter includes an inverting circuit, a cross-coupled level shifting latch, and a SR logic gate latch. The first and second outputs of the level shifting latch are coupled to the set (S) and reset (R) inputs of the SR latch. The inverting circuit, that is powered by a first supply voltage VDDL, supplies a noninverted version of an input signal onto a first input of the level shifting latch and supplies an inverted version of the input signal onto a second input of the level shifting latch. A low-to-high transition of the input signal resets the SR latch, whereas a high-to-low transition sets the SR latch. Duty cycle distortion skew of the level shifter is less than fifty picoseconds over voltage, process and temperature corners, and the level shifter has a supply voltage margin of more than one quarter of a nominal value of VDDL. | 01-01-2009 |
20090225873 | Multiple Transmitter System and Method - Systems and methods of data transmission are disclosed. In an embodiment, at least two transmitters are selectively activated and at least one transmitter is deactivated at a serial interface to transmit data via at least two distinct lines. | 09-10-2009 |
20090323731 | LOW POWER DESERIALIZER AND DEMULTIPLEXING METHOD - A deserializer circuit and method convert a serial bit stream into a parallel bit stream according to a parallel grouping. The deserializer and method include alternatingly demultiplexing a serial data stream into first and second bit streams. The first and second bit streams are respectively serially shifted along a first plurality of shift registers and a second plurality of shift registers. A first portion of the first bit stream in the first plurality of shift registers is selected and a second portion of the second bit stream in the second plurality of shift registers is also selected. A parallel group of data in a parallel data stream is formed from the first and second portions. | 12-31-2009 |
20110291703 | Method and Apparatus to Sterialize Parallel Data Input Values - A method and apparatus to serialize parallel data input values is disclosed. In a particular embodiment, a method of serializing parallel data input values includes receiving multiple data input values in parallel at an input tier of a selection circuit, where the input tier includes multiple combinatorial gate multiplexers. The method further includes selecting an output value at an output tier of the selection circuit, where the output tier includes at least one combinatorial gate multiplexer. | 12-01-2011 |
20130181742 | METHOD AND APPARATUS TO SERIALIZE PARALLEL DATA INPUT VALUES - A method includes applying a clock signal having an uneven duty cycle to a control input of at least one selection element of a selection circuit having a tree structure that includes multiple selection elements. The tree structure includes a data input tier and a data output tier. | 07-18-2013 |
20140003543 | N-PHASE POLARITY OUTPUT PIN MODE MULTIPLEXER | 01-02-2014 |
20140006649 | N-PHASE POLARITY OUTPUT PIN MODE MULTIPLEXER | 01-02-2014 |
20140153665 | N-PHASE PHASE AND POLARITY ENCODED SERIAL INTERFACE - System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Information is transmitted in N-phase polarity encoded symbols. Data is encoded in multi-bit symbols, and the multi-bit symbols are transmitted on a plurality of connectors. The multi-bit symbols may be transmitted by mapping the symbols to a sequence of states of the plurality of connectors, and driving the connectors in accordance with the sequence of states. The timing of the sequence of states is determinable at a receiver at each transition between sequential states. The state of each connector may be defined by polarity and direction of rotation of a multi-phase signal transmitted on the each connector. | 06-05-2014 |
20140254711 | EFFICIENT N-FACTORIAL DIFFERENTIAL SIGNALING TERMINATION NETWORK - A termination network circuit for a differential signal transmitter comprises a plurality of n resistance elements and a plurality of differential signal drivers. A first end of each of the resistance elements is coupled at a common node, where n is an integer value and is the number of conductors used to transmit a plurality of differential signals. Each differential signal driver may include a positive terminal driver and a negative terminal driver. The positive terminal driver is coupled to a second end of a first resistance element while the negative terminal driver is coupled to a second end of a second resistance element. The positive terminal driver and the negative terminal driver are separately and independently switchable to provide a current having a magnitude and direction. During a transmission cycle each of the resistance elements has a current of a different magnitude and/or direction than the other resistance elements. | 09-11-2014 |
20140254712 | VOLTAGE MODE DRIVER CIRCUIT FOR N-PHASE SYSTEMS - System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. Transmission lines are selectively terminated in an N-phase polarity encoded transmitter when the transmission lines would otherwise be undriven. Data is mapped to a sequence of symbols to be transmitted on a plurality of wires. The sequence of symbols is encoded in three signals. Each of the three terminals may be driven such that transistors are activated to couple a terminal to first and second voltage levels through a pair of impedances when the terminal would otherwise be undriven. The terminal is then pulled toward an intermediate voltage level while the terminal presents a desired impedance level to a transmission line. | 09-11-2014 |
20140254732 | TRANSCODING METHOD FOR MULTI-WIRE SIGNALING THAT EMBEDS CLOCK INFORMATION IN TRANSITION OF SIGNAL STATE - A method for performing multi-wire signaling encoding is provided in which a clock signal is encoded within symbol transitions. A sequence of data bits is converted into a plurality of m transition numbers. Each transition number is converted into a sequential symbol number from a set of sequential symbol numbers. The sequential symbol number is converted into a raw symbol that can be transmitted over a plurality of differential drivers. The raw symbol is transmitted spread over a plurality of n wires, wherein the clock signal is effectively embedded in the transmission of raw symbols since the conversion from transition number into a sequential symbol number guarantees that no two consecutive raw symbols are the same. The raw symbol is guaranteed to have a non-zero differential voltage across all pairs of the plurality of n wires. | 09-11-2014 |
20140254733 | CIRCUIT TO RECOVER A CLOCK SIGNAL FROM MULTIPLE WIRE DATA SIGNALS THAT CHANGES STATE EVERY STATE CYCLE AND IS IMMUNE TO DATA INTER-LANE SKEW AS WELL AS DATA STATE TRANSITION GLITCHES - A clock recovery circuit is provided comprising a receiver circuit and a clock extraction circuit. The receiver circuit may be adapted to decode a differentially encoded signal on a plurality of data lines, where at least one data symbol is differentially encoded in state transitions of the differentially encoded signal. The clock extraction circuit may be adapted to obtain a clock signal from state transition signals derived from the state transitions while compensating for skew in the different data lines, and masking data state transition glitches. | 09-11-2014 |
20140270005 | SHARING HARDWARE RESOURCES BETWEEN D-PHY AND N-FACTORIAL TERMINATION NETWORKS - A termination network for a receiver device is provided to support both D-PHY signaling and N-factorial signaling. The first end of each of a plurality dynamically configurable switches is coupled to a common node. A first end of each of a plurality of resistances is coupled to a second end of a corresponding switch. A plurality of terminals receive differential signals and each terminal is coupled to a corresponding second end of a resistance. Each of a plurality differential receivers is coupled between two terminals of the termination network, wherein a first differential receiver and a second differential receiver are coupled to the same two terminals, the first differential receiver is used when the differential signals use a first type of differential signal encoding, the second differential receiver is used when the differential signals use a second type of differential signal encoding. | 09-18-2014 |
20140348214 | COMPACT AND FAST N-FACTORIAL SINGLE DATA RATE CLOCK AND DATA RECOVERY CIRCUITS - A plurality of line interfaces is configured to receive a spread signal over the plurality of line interface. The spread signal carrying symbols with guaranteed symbol-to-symbol state transitions between consecutive symbols. The spread signal is defined by a plurality of transition signals including a first signal over a first line interface. A clock signal is extracted based on a comparison between a first instance of the first signal and a delayed second instance of the first signal. The delayed second instance of the first signal is sampled based on the clock signal to provide a symbol output. The clock extraction circuit is further adapted to generate the clock signal based on additional comparisons between a first instance of a second signal, within the plurality of transition signals, and a delayed second instance of the second signal, where the first and second signals are concurrent signals received over different line interfaces. | 11-27-2014 |
20150023454 | MULTI-PHASE CLOCK GENERATION METHOD - Systems and methods for multi-phase signaling are described herein. In one embodiment, a method for receiving data comprises receiving a sequence of symbols from a plurality of conductors, and generating a clock signal by detecting transitions in the received sequence of symbols. The method also comprises delaying the received sequence of symbols, and capturing one or more symbols in the delayed sequence of symbols using the clock signal, wherein a previous symbol in the delayed sequence of symbols is captured using a clock pulse in the clock signal generated based on a detected transition to a current symbol in the received sequence of symbols. | 01-22-2015 |
20150030112 | THREE PHASE CLOCK RECOVERY DELAY CALIBRATION - System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Information is transmitted in N-phase polarity encoded symbols. A clock recovery circuit may be calibrated based on state transitions in a preamble transmitted on two or more connectors. A calibration method is described. The method includes detecting a plurality of transitions in a preamble of a multiphase signal and calibrating a delay element to provide a delay that matches a clocking period of the multiphase signal. Each transition may be detected by only one of a plurality of detectors. The delay element may be calibrated based on time intervals between detections of successive ones of the plurality of transitions. | 01-29-2015 |
20150043358 | RUN-LENGTH DETECTION AND CORRECTION - System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. The apparatus may determine whether a run-length violation will occur or is likely to occur if a first sequence of symbols provided by a mapper of an M-Wire N-Phase encoder is transmitted on a plurality of wires. A second sequence of symbols may be substituted for the first sequence of symbols. The second sequence of symbols may comprise a surplus sequence of symbols that is not used for mapping data in the mapper. | 02-12-2015 |
20150043693 | N-PHASE SIGNAL TRANSITION ALIGNMENT - System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Information is transmitted in N-phase polarity encoded symbols. Drivers may be adapted or configured to align state transitions on two or more connectors in order to minimize a transition period between consecutive symbols. The drivers may include circuits that advance or delay certain transitions. The drivers may include pre-emphasis circuits that operate to drive the state of a connector for a portion of the transition period, even when the connector is transitioned to an undriven state. | 02-12-2015 |
Patent application number | Description | Published |
20080254525 | DNA Polymerase Blends and Mutant DNA Polymerases - A thermostable DNA polymerase composition comprising at least two DNA polymerases, one of which is substantially reduced in 5′-exonuclease activity and one of which has 5′-exonuclease activity. This polymerase may be used in methods including, but not limited to, nucleic acid synthesis, DNA sequencing, nucleic acid amplification and cDNA synthesis, | 10-16-2008 |
20100068767 | MULTI-COMPONENT INHIBITORS OF NUCLEIC ACID POLYMERASES - The present invention provides multi-component inhibitors of nucleic acid polymerases, methods of making, and methods of using same. One component of the multi-component inhibitor is a molecule that binds to a polymerase (i.e., a polymerase-binding molecule (PBM)), but does not thereby substantially inhibit its polymerase activity. Another component is a molecule or complex of molecules that binds to a PBM (i.e., a PBM-binding molecule). The combination of the PBM and PBM-binding molecule/complex substantially inhibits polymerase activity. The disclosed multi-component inhibitors are useful for DNA sequencing, nucleic acid amplification, cloning and synthesis, and the like. | 03-18-2010 |
20100075382 | SSB-POLYMERASE FUSION PROTEINS - Fusion proteins comprising a single strand DNA binding protein and a nucleic acid polymerase (e.g. DNA polymerase or reverse transcriptase). These high fidelity proteins are suitable for use in nucleic acid amplification methods, including the polymerase chain reaction (PCR). | 03-25-2010 |
20100209975 | Multi-Component Inhibitors of Nucleic Acid Polymerases - The present invention provides multi-component inhibitors of nucleic acid polymerases, methods of making, and methods of using same. One component of the multi-component inhibitor is a molecule that binds to a polymerase (i.e., a polymerase-binding molecule (PBM)), but does not thereby substantially inhibit its polymerase activity. Another component is a molecule or complex of molecules that binds to a PBM (i.e., a PBM-binding molecule). The combination of the PBM and PBM-binding molecule/complex substantially inhibits polymerase activity. | 08-19-2010 |
20110217735 | COMPOSITIONS AND METHODS FOR REVERSE TRANSCRIPTASE-POLYMERASE CHAIN REACTION (RT-PCR) - The present invention is directed to compositions and methods useful for the amplification of nucleic acid molecules by reverse transcriptase-polymerase chain reaction (RT-PCR). Specifically, the invention provides compositions and methods for the amplification of nucleic acid molecules in a simplified one- or two-step RT-PCR procedure using combinations of reverse transcriptase and thermostable DNA polymerase enzymes in conjunction with sulfur-containing molecules or acetate-containing molecules (or combinations of such sulfur-containing molecules and acetate-containing molecules), and optionally bovine serum albumin. The invention thus facilitates the rapid and efficient amplification of nucleic acid molecules and the detection and quantitation of RNA molecules. The invention also is useful in the rapid production and amplification of cDNAs which may be used for a variety of industrial, medical and forensic purposes. | 09-08-2011 |
20120021464 | THERMOSTABLE REVERSE TRANSCRIPTASES AND USES THEREOF - The present invention is in the fields of molecular and cellular biology. The invention is generally related to reverse transcriptase enzymes and methods for the reverse transcription of nucleic acid molecules, especially messenger RNA molecules. Specifically, the invention relates to reverse transcriptase enzymes which have been mutated or modified to increase thermostability, decrease terminal deoxynucleotidyl transferase activity, and/or increase fidelity, and to methods of producing, amplifying or sequencing nucleic acid molecules (particularly cDNA molecules) using these reverse transcriptase enzymes or compositions. The invention also relates to nucleic acid molecules produced by these methods and to the use of such nucleic acid molecules to produce desired polypeptides. The invention also concerns kits comprising such enzymes or compositions. | 01-26-2012 |
20120225431 | METHODS OF SYNTHESIZING AND LABELING NUCLEIC ACID MOLECULES - The present invention is generally related to composition, kits and methods for synthesizing nucleic acid molecules and particularly for synthesizing labeled nucleic acid molecules. Specifically, the invention relates to methods, kits and compositions for synthesizing indirectly labeled nucleic acid molecules. The labeled nucleic acid molecules produced in accordance with the invention are particularly suited as labeled probes for nucleic acid detection, diagnostics, and array analysis. | 09-06-2012 |
20140363854 | THERMOSTABLE REVERSE TRANSCRIPTASES AND USES THEREOF - The present invention is in the fields of molecular and cellular biology. The invention is generally related to reverse transcriptase enzymes and methods for the reverse transcription of nucleic acid molecules, especially messenger RNA molecules. Specifically, the invention relates to reverse transcriptase enzymes which have been mutated or modified to increase thermostability, decrease terminal deoxynucleotidyl transferase activity, and/or increase fidelity, and to methods of producing, amplifying or sequencing nucleic acid molecules (particularly cDNA molecules) using these reverse transcriptase enzymes or compositions. The invention also relates to nucleic acid molecules produced by these methods and to the use of such nucleic acid molecules to produce desired polypeptides. The invention also concerns kits comprising such enzymes or compositions. | 12-11-2014 |
Patent application number | Description | Published |
20090261433 | One-Mask MTJ Integration for STT MRAM - A method for integrating a magnetic tunnel junction (MTJ) device into an integrated circuit includes providing in a semiconductor back-end-of-line (BEOL) process flow a substrate having a first interlevel dielectric layer and at least a first metal interconnect. Over the first interlevel dielectric layer and the first metal interconnect, magnetic tunnel junction material layers are deposited. From the material layers a magnetic tunnel junction stack, coupled to the first metal interconnect, is defined using a single mask process. The magnetic tunnel junction stack is integrated into the integrated circuit. | 10-22-2009 |
20090261434 | STT MRAM Magnetic Tunnel Junction Architecture and Integration - A magnetic tunnel junction (MTJ) device for a magnetic random access memory (MRAM) in a semiconductor back-end-of-line (BEOL) process flow includes a first metal interconnect for communicating with at least one control device and a first electrode for coupling to the first metal interconnect through a via formed in a dielectric passivation barrier using a first mask. The device also includes an MTJ stack for storing data coupled to the first electrode, a portion of the MTJ stack having lateral dimensions based upon a second mask. The portion defined by the second mask is over the contact via. A second electrode is coupled to the MTJ stack and also has a same lateral dimension as defined by the second mask. The first electrode and a portion of the MTJ stack are defined by a third mask. A second metal interconnect is coupled to the second electrode and at least one other control device. | 10-22-2009 |
20100102404 | Magnetic Tunnel Junction and Method of Fabrication - In a particular embodiment, a method of forming a magnetic tunnel junction (MTJ) device includes applying a dielectric layer to a surface, applying a metal layer to the dielectric layer, and adding a cap layer on the dielectric layer. The method also includes forming a magnetic tunnel junction (MTJ) stack such that an electrode of the MTJ stack is disposed on the metal layer and the cap layer contacts a side portion of the metal layer. An adjustable depth to via may connect a top electrode of the MTJ stack to a top metal. | 04-29-2010 |
20100219491 | Magnetic Tunnel Junction Device and Fabrication - A magnetic tunneling junction device and fabrication method is disclosed. In a particular embodiment, the method includes depositing a capping material on a free layer of a magnetic tunneling junction structure to form the capping layer and oxidizing a portion of the capping material to form a layer of oxidized material. | 09-02-2010 |
20100220516 | Reducing Source Loading Effect in Spin Torque Transfer Magnetoresisitive Random Access Memory (STT-MRAM) - Systems and methods to reduce source loading effects in STT-MRAM are disclosed. In a particular embodiment, a method includes determining a switching current ratio of a magnetic tunnel junction (MTJ) structure that enables stable operation of a memory cell. The memory cell includes the MTJ structure serially coupled to an access transistor. The method also includes modifying an offset magnetic field that is incident to a free layer of the MTJ structure. The modified offset magnetic field causes the MTJ structure to exhibit the switching current ratio. | 09-02-2010 |
20100302843 | Spin Transfer Torque - Magnetic Tunnel Junction Device and Method of Operation - A method is disclosed that includes controlling current flow direction for current sent over a source line or a bit line of a magnetic memory device. A current generated magnetic field assists switching of a direction of a magnetic field of a free layer of a magnetic element within a spin transfer torque magnetic tunnel junction (STT-MTJ) device. | 12-02-2010 |
20110133299 | Magnetic Tunnel Junction Device - A system and method of manufacturing and using a magnetic tunnel junction device is disclosed. In a particular embodiment, a magnetic tunnel junction device includes a first free layer and second free layer. The magnetic tunnel junction also includes a spin torque enhancement layer. The magnetic tunnel junction device further includes a spacer layer between the first and second free layers that includes a material and has a thickness that substantially inhibits exchange coupling between the first and second free layers. The first and second free layers are magneto-statically coupled. | 06-09-2011 |
20110141796 | Magnetic Tunnel Junction Device and Fabrication - A magnetic tunneling junction (MTJ) device and fabrication method is disclosed. In a particular embodiment, an apparatus is disclosed that includes an MTJ device. The MTJ device includes a barrier layer, a free layer, and a magnesium (Mg) capping layer. The free layer is positioned between the barrier layer and the magnesium (Mg) capping layer. | 06-16-2011 |
20110170338 | System and Method to Control A Direction of a Current Applied to a Magnetic Tunnel Junction - A system and method to control a direction of a current applied to a magnetic tunnel junction is disclosed. In a particular embodiment, an apparatus comprises a magnetic tunnel junction (MTJ) storage element and a sense amplifier. The sense amplifier is coupled to a first path and to a second path. The first path includes a first current direction selecting transistor and the second path includes a second current direction selecting transistor. The first path is coupled to a bit line of the MTJ storage element and the second path is coupled to a source line of the MTJ storage element. | 07-14-2011 |
20110175181 | Magnetic Tunnel Junction (MTJ) on Planarized Electrode - A magnetic tunnel junction (MTJ) with direct contact is manufactured having lower resistances, improved yield, and simpler fabrication. The lower resistances improve both read and write processes in the MTJ. The MTJ layers are deposited on a bottom electrode aligned with the bottom metal. An etch stop layer may be deposited adjacent to the bottom metal to prevent overetch of an insulator surrounding the bottom metal. The bottom electrode is planarized before deposition of the MTJ layers to provide a substantially flat surface. Additionally, an underlayer may be deposited on the bottom electrode before the MTJ layers to promote desired characteristics of the MTJ. | 07-21-2011 |
20110233695 | Magnetoresistive Random Access Memory (MRAM) With Integrated Magnetic Film Enhanced Circuit Elements - A Magnetoresistive Random Access Memory (MRAM) integrated circuit includes a substrate, a magnetic tunnel junction region, a magnetic circuit element, and an integrated magnetic material. The magnetic tunnel junction region is disposed on the substrate, and includes a first magnetic layer and a second magnetic layer separated by a tunnel barrier insulating layer. The magnetic circuit element region is disposed on the substrate, and includes a plurality of interconnected metal portions. The integrated magnetic material is disposed on the substrate adjacent to the plurality of interconnected metal portions. | 09-29-2011 |
20110280065 | Write Energy Conservation In Memory - A method writes data to a resistive memory, such as spin torque transfer magnetic random access memory (STT-MRAM). The method writes received bits of data to a memory cell array, in response to a first write signal. The method also reads stored data from the memory cell array, after the first write signal is generated, and then compares the stored data with the received bits of data to determine whether each of the received bits of data was written to the memory. In response to a second write signal, received bits of data determined not to have been written during the first write signal, are written. | 11-17-2011 |
20120014174 | Programmable Write Driver For STT-MRAM - A non-volatile memory structure comprises programmable write drivers for controlling drive strengths of write operations to storage elements. The memory structure comprises a storage element coupled to a bit line, a switching element coupled to the storage element, a source line and a word line, wherein the switching element is configured to change a logic state of the storage element. A first and a second write driver with programmable drive strengths are coupled to the bit line and source line respectively to enable control of drive strengths of write operations to the storage element. | 01-19-2012 |
20120033490 | Generating a Non-Reversible State at a Bitcell Having a First Magnetic Tunnel Junction and a Second Magnetic Tunnel Junction - A method of generating a non-reversible state at a bitcell having a first magnetic tunnel junction (MTJ) and a second MTJ includes applying a program voltage to the first MTJ of the bitcell without applying the program voltage to the second MTJ of the bitcell. A memory device includes a bitcell having a first MTJ and a second MTJ and programming circuitry configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell. | 02-09-2012 |
20120075906 | Resistance Based Memory Having Two-Diode Access Device - A resistance-based memory has a two-diode access device. In a particular embodiment, a method includes biasing a bit line and a sense line to generate a current through a resistance-based memory element via a first diode or a second diode. A cathode of the first diode is coupled to the bit line and an anode of the second diode is coupled to the sense line. | 03-29-2012 |
20120087184 | Magnetic Random Access Memory (MRAM) Layout with Uniform Pattern - A large scale memory array includes a uniform pattern of uniformly sized dummy bit cells and active bit cells. Sub-arrays within the large scale memory array are separated by the dummy bit cells. Signal distribution circuitry is formed with a width or height corresponding to the width or height of the dummy bit cells so that the signal distribution circuitry occupies the same footprint as the dummy bit cells without disrupting the uniform pattern across the large scale array. Edge dummy cells of a similar size or larger than the standard size bit cells may be placed around the edge of the large scale array to further reduce pattern loading affects. | 04-12-2012 |
20120107966 | MAGNETIC TUNNEL JUNCTION DEVICE AND FABRICATION - A magnetic tunneling junction device and fabrication method is disclosed. In a particular embodiment, the method includes depositing a capping material on a free layer of a magnetic tunneling junction structure to form the capping layer and oxidizing a portion of the capping material to form a layer of oxidized material. | 05-03-2012 |
20120218815 | Magnetic Random Access Memory (MRAM) Read With Reduced Disburb Failure - Magnetic tunnel junctions (MTJs) in magnetic random access memory (MRAM) are subject to read disturb events when the current passing through the MTJ causes a spontaneous switching of the MTJ due to spin transfer torque (STT) from a parallel state to an anti-parallel state or from an anti-parallel state to a parallel state. Because the state of the MTJ corresponds to stored data, a read disturb event may cause data loss in MRAM devices. Read disturb events may be reduced by controlling the direction of current flow through the MTJ. For example, the current direction through a reference MTJ may be selected based on the state of the reference MTJ. In another example, the current direction through a data or reference MTJ may be alternated such that the MTJ is only subject to read disturb events during approximately half the read operations on the MTJ. | 08-30-2012 |
20130062715 | SYMMETRICALLY SWITCHABLE SPIN-TRANSFER-TORQUE MAGNETORESISTIVE DEVICE - A spin transfer torque magnetic random access memory (STT-MRAM) device includes magnetic tunnel junctions (MTJs) with reduced switching current asymmetry. At least one switching asymmetry balance layer (SABL) near the free layer of the MTJ reduces a first switching current Ic(p-ap) causing the value of the first switching current to be nearly equal to the value of a second switching current Ic(ap-p) without increasing the average switching current of the device. The SABL may be a non-magnetic switching asymmetry balance layer (NM-SABL) and/or a magnetic switching asymmetry balance layer (M-SABL). | 03-14-2013 |
20130075845 | THERMALLY TOLERANT PERPENDICULAR MAGNETIC ANISOTROPY COUPLED ELEMENTS FOR SPIN-TRANSFER TORQUE SWITCHING DEVICE - Perpendicular magnetic anisotropy (PMA) type magnetic random access memory cells are constructed with a composite PMA layer to provide a magnetic tunnel junction (MTJ) with an acceptable thermal barrier, A PMA coupling layer is deposited between a first PMA layer and a second PMA layer to form the composite PMA layer. The composite PMA layer may be incorporated in PMA type MRAM cells or in-plane type MRAM cells. | 03-28-2013 |
20130114336 | THREE PORT MTJ STRUCTURE AND INTEGRATION - A two-transistor one-MTJ (2T1MTJ) three port structure includes two separate pin layer structures coupled to one free layer structure. The pin layer structures may include an anti-ferromagnetic layer (AFM) layer coupled to a pin layer. The free layer structure includes free layer coupled to a barrier layer and a cap layer. The free layer structure may include a thin barrier layer coupled to each of the pin layer stacks. The three port MTJ structure provides separate write and read paths which improve read sensing margin without increasing write voltage or current. The three port MTJ structure may be fabricated with a simple two step MTJ etch process. | 05-09-2013 |
20130161771 | REDUCING SOURCE LOADING EFFECT IN SPIN TORQUE TRANSFER MAGNETORESISTIVE RANDOM ACCESS MEMORY (STT-MRAM) - An apparatus includes a memory cell including a magnetic tunnel junction (MTJ) structure coupled between a bit line and a source line. The MTJ structure includes a free layer coupled to the bit line and a pinned layer. A magnetic moment of the free layer is substantially parallel to a magnetic moment of the pinned layer in a first state and substantially antiparallel to the magnetic moment of the pinned layer in a second state. A physical dimension of the pinned layer produces an unbalanced offset magnetic field which corresponds to a first switching current of the MTJ structure that enables switching from the first state to the second state when a first voltage is applied to the bit line and corresponds to a second switching current that enables switching from the second state to the first state when the first voltage is applied to the source line. | 06-27-2013 |
20130235639 | MAGNETIC RANDOM ACCESS MEMORY (MRAM)LAYOUT WITH UNIFORM PATTERN - A large scale memory array includes a. uniform pattern of uniformly sized dummy bit cells and active bit cells. Sub-arrays within the large scale memory array are separated by the dummy bit cells. Signal distribution circuitry is formed with a width or height corresponding to the width or height of the dummy bit cells so that the signal distribution circuitry occupies the same footprint as the dummy bit cells without disrupting the uniform pattern across the large scale array. Edge dummy cells of a similar size or larger than the standard size bit cells may be placed around the edge of the large scale array to further reduce pattern loading affects. | 09-12-2013 |
20140010006 | NON-REVERSIBLE STATE AT A BITCELL HAVING A FIRST MAGNETIC TUNNEL JUNCTION AND A SECOND MAGNETIC TUNNEL JUNCTION - A memory device includes a magnetic tunnel junction (MTJ) bitcell. The MTJ bitcell includes a first MTJ and a second MTJ. The memory device further includes programming circuitry configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell. The non-reversible state corresponds to a value of the MTJ bitcell that is determined by comparing a first value read at the first MTJ and a second value read at the second MTJ. | 01-09-2014 |
20140015077 | REDUCING SOURCE LOADING EFFECT IN SPIN TORQUE TRANSFER MAGNETORESISTIVE RANDOM ACCESS MEMORY (STT-MRAM) - A memory cell comprises a magnetic tunnel junction (MTJ) structure that includes a free layer coupled to a bit line and a pinned layer. A magnetic moment of the free layer is substantially parallel to a magnetic moment of the pinned layer in a first state and substantially antiparallel to the magnetic moment of the pinned layer in a second state. The pinned layer has a physical dimension to produce an offset magnetic field corresponding to a first switching current of the MTJ structure to enable switching between the first state and the second state when a first voltage is applied from the bit line to a source line coupled to an access transistor and a second switching current to enable switching between the second state and the first state when the first voltage is applied from the source line to the bit line. | 01-16-2014 |
20140015080 | STT MRAM MAGNETIC TUNNEL JUNCTION ARCHITECTURE AND INTEGRATION - A magnetic tunnel junction (MTJ) device for a magnetic random access memory (MRAM) includes a first conductive interconnect communicating with at least one control device and a first electrode coupling to the first conductive interconnect through a via opening formed in a dielectric passivation barrier using a first mask. The device has an MTJ stack for storing data, coupled to the first electrode. A portion of the MTJ stack has lateral dimensions based upon a second mask. The portion defined by the second mask is over the contact via. A second electrode is coupled to the MTJ stack and also has a lateral dimension defined by the second mask. The first electrode and a portion of the MTJ stack are defined by a third mask. A second conductive interconnect is coupled to the second electrode and at least one other control device. | 01-16-2014 |
20140027869 | AMORPHOUS ALLOY SPACER FOR PERPENDICULAR MTJs - A perpendicular magnetic tunnel junction (MTJ) apparatus includes a tunnel magnetoresistance (TMR) enhancement buffer layer deposited between the tunnel barrier layer and the reference layers An amorphous alloy spacer is deposited between the TMR enhancement buffer layer and the reference layers to enhance TMR The amorphous alloy spacer blocks template effects of face centered cubic (fcc) oriented pinned layers and provides strong coupling between the pinned layers and the TMR enhancement buffer layer to ensure full perpendicular magnetization. | 01-30-2014 |
20140035075 | MAGNETIC TUNNEL JUNCTION DEVICE - A magnetic tunnel junction device includes a Synthetic Anti-Ferromagnetic (SAF) layer, a first free layer, and second free layer. The magnetic tunnel junction device further includes a spacer layer between the first and second free layers. The first free layer is magneto-statically coupled to the second free layer. A thickness of the spacer layer is at least 4 Angstroms. | 02-06-2014 |
20140038312 | FABRICATION OF A MAGNETIC TUNNEL JUNCTION DEVICE - A magnetic tunneling junction device and fabrication method is disclosed. In a particular embodiment, a non-transitory computer-readable medium includes processor executable instructions. The instructions, when executed by a processor, cause the processor to initiate deposition of a capping material on a free layer of a magnetic tunneling junction structure to form a capping layer. The instructions, when executed by the processor, cause the processor to initiate oxidization of a first layer of the capping material to form a first oxidized layer of oxidized material. | 02-06-2014 |
20140048894 | MTP MTJ DEVICE - Systems and methods for multiple-time programmable (MTP) devices. An MTP device includes a magnetic tunnel junction (MTJ) device programmable to a plurality of states based on voltage applied across the MTJ device. The plurality of states include a first resistance state corresponding to a first binary value stored in the MTJ device based on a first voltage, a second resistance state corresponding to a second binary value stored in the MTJ device based on a second voltage, a third resistance state corresponding to a breakdown of a barrier layer of the MTJ device based on a third voltage, and a fourth resistance state corresponding to an open fuse based on a fourth voltage. | 02-20-2014 |
20140050019 | MULTI-LEVEL MEMORY CELL USING MULTIPLE MAGNETIC TUNNEL JUNCTIONS WITH VARYING MGO THICKNESS - A Multi-Level Memory Cell (MLC) using multiple Magnetic Tunnel Junction (MTJ) structures having one or more layers with varying thickness is disclosed. The multiple MTJ structures, which are vertically stacked and arranged in series, may have substantially identical area dimensions to minimize fabrication costs because one mask can be used to pattern the multiple MTJ structures. Further, varying the thicknesses associated with the one or more layers may provide the multiple MTJ structures with different switching current densities and thereby increase memory density and improve read and write operations. In one embodiment, the layers with the varying thicknesses may include tunnel barriers or magnesium oxide layers associated with the multiple MTJ structures and/or free layers associated with the multiple MTJ structures. | 02-20-2014 |
20140071740 | OTP SCHEME WITH MULTIPLE MAGNETIC TUNNEL JUNCTION DEVICES IN A CELL - A one time programming (OTP) apparatus unit cell includes multiple magnetic tunnel junctions (MTJs) and a shared access transistor coupled between the multiple MTJs and a fixed potential. Each of the multiple MTJs in a unit cell can be coupled to separate programming circuitry and/or separate sense amplifier circuitry so that they can be individually programmed and/or individually sensed. A logical combination from the separate sense amplifiers can be generated as an output of the unit cell. | 03-13-2014 |
20140071741 | OTP CELL WITH REVERSED MTJ CONNECTION - A one time programming (OTP) apparatus unit cell includes magnetic tunnel junctions (MTJs) with reversed connections for placing the MTJ in an anti-parallel resistance state during programming. Increased MTJ resistance in its anti-parallel resistance state causes a higher programming voltage which reduces programming time and programming current. | 03-13-2014 |
20140073064 | MAGNETIC TUNNEL JUNCTION (MTJ) ON PLANARIZED ELECTRODE - A magnetic tunnel junction (MTJ) with direct contact is manufactured having lower resistances, improved yield, and simpler fabrication. The lower resistances improve both read and write processes in the MTJ. The MTJ layers are deposited on a bottom electrode aligned with the bottom metal. An etch stop layer may be deposited adjacent to the bottom metal to prevent overetch of an insulator surrounding the bottom metal. The bottom electrode is planarized before deposition of the MTJ layers to provide a substantially flat surface. Additionally, an underlayer may be deposited on the bottom electrode before the MTJ layers to promote desired characteristics of the MTJ. | 03-13-2014 |
20140108478 | MAGNETIC TUNNEL JUNCTION BASED RANDOM NUMBER GENERATOR - A random number generator system that utilizes a magnetic tunnel junction (MTJ) that is controlled by an STT-MTJ entropy controller that determines whether to proceed with generating random numbers or not by monitoring the health of the MTJ-based random number generator is illustrated. If the health of the random number generation is above a threshold, the STT-MTJ entropy controller shuts down the MTJ-based random number generator and sends a message to a requesting chipset that a secure key generation is not possible. If the health of the random number generation is below a threshold, the entropy controller allows the MTJ-based random number generator to generate random numbers based on a specified algorithm, the output of which is post processed and used by a cryptographic-quality deterministic random bit generator to generate a security key for a requesting chipset. | 04-17-2014 |
20140119097 | RESISTANCE-BASED MEMORY HAVING TWO-DIODE ACCESS DEVICE - A resistance-based memory includes a two-diode access device. In a particular embodiment, a method includes biasing a bit line with a first voltage. The method further includes biasing the sense line with a second voltage. Biasing the bit line and biasing the sense line generates a current through a resistance-based memory element and through one of a first diode and a second diode. A cathode of the first diode is coupled to the bit line and an anode of the second diode is coupled to the sense line. | 05-01-2014 |
20140139209 | MAGNETIC AUTOMATIC TESTING EQUIPMENT (ATE) MEMORY TESTER - Several novel features pertain to an automatic testing equipment (ATE) memory tester that includes a load board, a projected-field electromagnet, a positioning mechanism and a memory tester. The load board is for coupling to a die package that includes a magnetoresistive random access memory (MRAM) having several cells, where each cell includes a magnetic tunnel junction (MTJ). The projected-field electromagnet is for applying a portion of a magnetic field across the MRAM. The portion of the magnetic field may be substantially uniform. The positioning mechanism is coupled to the electromagnet and the load board, and is configured to position the electromagnet vertically about (above/below) the die package when the die package is coupled to the load board. The memory tester is coupled to the load board. The memory tester is for testing the MRAM when the substantially uniform portion of the magnetic field is applied across the MRAM. | 05-22-2014 |
20140254251 | MAGNETIC AUTOMATIC TEST EQUIPMENT (ATE) MEMORY TESTER DEVICE AND METHOD EMPLOYING TEMPERATURE CONTROL - In a particular embodiment, a method includes controlling a temperature within a chamber while applying a magnetic field. A device including a memory array is located in the chamber. The method includes applying a magnetic field to the memory array and testing the memory array during application of the magnetic field to the memory array at a target temperature. | 09-11-2014 |
20140327508 | INDUCTOR TUNABLE BY A VARIABLE MAGNETIC FLUX DENSITY COMPONENT - An inductor tunable by a variable magnetic flux density component is disclosed. A particular device includes an inductor. The device further includes a variable magnetic flux density component (VMFDC) positioned to influence a magnetic field of the inductor when a current is applied to the inductor. | 11-06-2014 |
20150070979 | PHYSICALLY UNCLONABLE FUNCTION BASED ON PROGRAMMING VOLTAGE OF MAGNETORESISTIVE RANDOM-ACCESS MEMORY - One feature pertains to a method of implementing a physically unclonable function. The method includes initializing an array of magnetoresistive random-access memory (MRAM) cells to a first logical state, where each of the MRAM cells have a random transition voltage that is greater than a first voltage and less than a second voltage. The transition voltage represents a voltage level that causes the MRAM cells to transition from the first logical state to a second logical state. The method further includes applying a programming signal voltage to each of the MRAM cells of the array to cause at least a portion of the MRAM cells of the array to randomly change state from the first logical state to the second logical state, where the programming signal voltage is greater than the first voltage and less than the second voltage. | 03-12-2015 |
20150071430 | PHYSICALLY UNCLONABLE FUNCTION BASED ON THE INITIAL LOGICAL STATE OF MAGNETORESISTIVE RANDOM-ACCESS MEMORY - One feature pertains to a method for implementing a physically unclonable function (PUF). The method includes providing an array of magnetoresistive random access memory (MRAM) cells, where the MRAM cells are each configured to represent one of a first logical state and a second logical state. The array of MRAM cells are un-annealed and free from exposure to an external magnetic field oriented in a direction configured to initialize the MRAM cells to a single logical state of the first and second logical states. Consequently, each MRAM cell has a random initial logical state of the first and second logical states. The method further includes sending a challenge to the MRAM cell array that reads logical states of select MRAM cells of the array, and obtaining a response to the challenge from the MRAM cell array that includes the logical states of the selected MRAM cells of the array. | 03-12-2015 |
20150071431 | PHYSICALLY UNCLONABLE FUNCTION BASED ON THE RANDOM LOGICAL STATE OF MAGNETORESISTIVE RANDOM-ACCESS MEMORY - One feature pertains to a method of implementing a physically unclonable function (PUF). The method includes exposing an array of magnetoresistive random access memory (MRAM) cells to an orthogonal external magnetic field. The MRAM cells are each configured to represent one of a first logical state and a second logical state, and the orthogonal external magnetic field is oriented in an orthogonal direction to an easy axis of a free layer of the MRAM cells to place the MRAM cells in a neutral logical state that is not the first logical state or the second logical state. The method further includes removing the orthogonal external magnetic field to place each of the MRAM cells of the array randomly in either the first logical state or the second logical state. | 03-12-2015 |
20150071432 | PHYSICALLY UNCLONABLE FUNCTION BASED ON RESISTIVITY OF MAGNETORESISTIVE RANDOM-ACCESS MEMORY MAGNETIC TUNNEL JUNCTIONS - One feature pertains to least one physically unclonable function based on an array of magnetoresistive random-access memory (MRAM) cells. A challenge to the array of MRAM cells may identify some of the cells to be used for the physically unclonable function. Each MRAM cell may include a plurality of magnetic tunnel junctions (MTJs), where the MTJs may exhibit distinct resistances due to manufacturing or fabrication variations. A response to the challenge may be obtained for each cell by using the resistance(s) of one or both of the MTJs for a cell to obtain a value that serves as the response for that cell. The responses for a plurality of cells may be at least partially mapped to provide a unique identifier for the array. The responses generated from the array of cells may serve as a physically unclonable function that may be used to uniquely identify an electronic device. | 03-12-2015 |
20150074433 | PHYSICALLY UNCLONABLE FUNCTION BASED ON BREAKDOWN VOLTAGE OF METAL- INSULATOR-METAL DEVICE - One feature pertains to a method of implementing a physically unclonable function that includes providing an array of metal-insulator-metal (MIM) devices, where the MIM devices are configured to represent a first resistance state or a second resistance state and a plurality of the MIM devices are initially at the first resistance state. The MIM devices have a random breakdown voltage that is greater than a first voltage and less than a second voltage, where the breakdown voltage represents a voltage that causes the MIM devices to transition from the first resistance state to the second resistance state. The method further includes applying a signal line voltage to the MIM devices to cause a portion of the MIM devices to randomly breakdown and transition from the first resistance state to the second resistance state, the signal line voltage greater than the first voltage and less than the second voltage. | 03-12-2015 |
Patent application number | Description | Published |
20090293820 | Two-cycle, opposed-piston internal combustion engine - In a two-cycle, opposed-piston internal combustion engine, opposed pistons disposed in a cylinder are coupled to a pair of side-mounted crankshafts by connecting rods that are subject to substantially tensile forces acting between the pistons and the crankshafts. This geometry reduces or eliminates side forces between the pistons and the bore of the cylinder. The cylinder and the pistons are independently cooled to reduce cylindrical deformation caused by thermal expansion during engine operation. | 12-03-2009 |
20100012055 | Cylinder and piston assemblies for opposed piston engines - In an opposed piston engine, a pair of pistons are disposed in opposition in the bore of a cylinder. The cylinder includes first liquid coolant grooves having a first cooling capacity to cool a portion of the cylinder extending from a central portion toward an exhaust port, and second liquid coolant grooves having a second cooling capacity, less than the first cooling capacity, to cool a portion of the cylinder extending from the central portion toward an inlet port. Each piston includes a cylindrical skirt with a crown and an open end opposite the crown, a piston rod with a bore, a first end attached to a back surface of the crown, and a second end extending through the open end of the skirt, a radial array of liquid coolant flow passages in communication with the bore and disposed between the first end and the back surface of the crown, and a single wristpin retained on the second end section of the piston rod and positioned externally to the piston. | 01-21-2010 |
20100212613 | Multi-Cylinder opposed piston engines - Integrated, multi-cylinder opposed engine constructions include a unitary support structure to which cylinder liners are removeably mounted and sealed and on which crankshafts are rotatably supported. The unitary support structure includes cooling manifolds that provide liquid coolant to the cylinder liners. Exhaust and intake manifolds attached to the support structure to serve respective ports in the cylinder liner. The engine constructions may also include certain improvements in the construction of cooled pistons with flexible skirts, and in the construction of cylinders with sealing structures mounted outside of exhaust and inlet ports to control lubricant in the cylindrical interstice between the through bore and the pistons. | 08-26-2010 |
20100212637 | Cylinder and piston assemblies for opposed piston engines - Integrated, multi-cylinder opposed engine constructions include a unitary support structure to which cylinder liners are removeably mounted and sealed and on which crankshafts are rotatably supported. The engine constructions include a cooled piston with a resiliently deformable joint connecting crown and skirt and a cooled cylinder liner with wipers to manage lubricant in the cylindrical interstice between the cylinder bore and the piston skirts. | 08-26-2010 |
20110094223 | Auxiliary systems for opposed piston engines - An opposed piston engine includes at least one cylinder with inlet and exhaust ports and opposed pistons disposed in the cylinder for reciprocating opposed motion toward and away from each other. An auxiliary system pumps liquid coolant separately to the cylinder and pistons. Another auxiliary system controls the flow of intake and exhaust gas in the engine. | 04-28-2011 |
20110186005 | Rolling thrust bearing constructions - A piston rolling thrust bearing construction is constituted of a pair of bearing plates with opposing faces disposed in a spaced alignment with a rolling ball assembly positioned between the opposing faces to support relative movement between the bearing plates. The piston rolling thrust bearing is mounted to the open end of the skirt of a piston disposed in a cylinder to compensate for non-axial motion relative to the cylinder axis due to the articulating motions of connecting elements or any structural misalignments within an engine drive train assembly. | 08-04-2011 |
20110186017 | Single-crankshaft, opposed-piston engine constructions - Ported engines with opposed pistons are coupled to a single crankshaft through rocker arm linkages. Each pair of opposed pistons is coupled to a single crankpin of the crankshaft. Each piston is coupled to a respective rocker arm linkage by a rolling thrust bearing which prevents linkage movement that is transverse to the axis of the piston from being transferred to the piston. Each piston of a pair of opposed pistons is coupled to the same crankpin by respective rocker arm linkages in which connecting rods run between the crankpin and respective rocker arms. One connecting rod is connected to first rocker arm below the rocker arm's pivot point and another connecting rod is connected to a second rocker arm above the rocker arm's pivot point. | 08-04-2011 |
20120152185 | Two-cycle, opposed-piston internal combustion engine - In a two-cycle, opposed-piston internal combustion engine, opposed pistons disposed in a cylinder are coupled to a pair of side-mounted crankshafts by connecting rods that are subject to substantially tensile forces acting between the pistons and the crankshafts. This geometry reduces or eliminates side forces between the pistons and the bore of the cylinder. The cylinder and the pistons are independently cooled to reduce cylindrical deformation caused by thermal expansion during engine operation. | 06-21-2012 |
20130025548 | Impingement cooling of cylinders in opposed-piston engines - A cylinder cooling construction includes a cylinder liner with a sidewall, exhaust and intake ports opening through the sidewall, a bore, and a plurality of feed channels that are formed with and extend along the sidewall from a central band of the cylinder toward the exhaust and intake ports. A sleeve covering the sidewall includes a plurality of impingement jet ports that are arranged in at least one sequence extending around the central band and that are in liquid communication with the plurality of feed channels. An annular member disposed between the liner and the sleeve reinforces the central band. The sleeve further includes an inside surface with spaced-apart annular recesses that with the sidewall define liquid coolant reservoirs in the vicinity of the ports that are in liquid communication with the feed channels. Channels through bridges of exhaust port have first ends in liquid communication with the coolant reservoir in the vicinity of the exhaust port and second ends that open through a portion of an exhaust end of the cylinder. | 01-31-2013 |
20130298853 | Impingement Cooling of Cylinders in Opposed-Piston Engines - A cylinder cooling construction includes a cylinder liner with a sidewall, exhaust and intake ports opening through the sidewall, a bore, and a plurality of feed channels that are formed with and extend along the sidewall from a central band of the cylinder toward the exhaust and intake ports. A sleeve covering the sidewall includes a plurality of impingement jet ports that are arranged in at least one sequence extending around the central band and that are in liquid communication with the plurality of feed channels. An annular member disposed between the liner and the sleeve reinforces the central band. The sleeve further includes an inside surface with spaced-apart annular recesses that with the sidewall define liquid coolant reservoirs in the vicinity of the ports that are in liquid communication with the feed channels. Channels through bridges of exhaust port have first ends in liquid communication with the coolant reservoir in the vicinity of the exhaust port and second ends that open through a portion of an exhaust end of the cylinder. | 11-14-2013 |
20140026864 | Cylinder and Piston Assemblies for Opposed Piston Engines - Integrated, multi-cylinder opposed engine constructions include a unitary support structure to which cylinder liners are removeably mounted and sealed and on which crankshafts are rotatably supported. The engine constructions include a cooled piston with a resiliently deformable joint connecting crown and skirt and a cooled cylinder liner with wipers to manage lubricant in the cylindrical interstice between the cylinder bore and the piston skirts. | 01-30-2014 |
Patent application number | Description | Published |
20090222262 | Systems And Methods For Blind Source Signal Separation - Signal separation techniques based on frequency dependency are described. In one implementation, a blind signal separation process is provided that avoids the permutation problem of previous signal separation processes. In the process, two or more signal sources are provided, with each signal source having recognized frequency dependencies. The process uses these inter-frequency dependencies to more robustly separate the source signals. The process receives a set of mixed signal input signals, and samples each input signal using a rolling window process. The sampled data is transformed into the frequency domain, which provides channel inputs to the inter-frequency dependent separation process. Since frequency dependencies have been defined for each source, the process is able to use the frequency dependency to more accurately separate the signals. The process can use a learning algorithm that preserves frequency dependencies within each source signal, and can remove dependencies between or among the signal sources. | 09-03-2009 |
20100296668 | SYSTEMS, METHODS, APPARATUS, AND COMPUTER-READABLE MEDIA FOR AUTOMATIC CONTROL OF ACTIVE NOISE CANCELLATION - Active noise cancellation is combined with spectrum modification of a reproduced audio signal to enhance intelligibility. | 11-25-2010 |
20110208520 | VOICE ACTIVITY DETECTION BASED ON PLURAL VOICE ACTIVITY DETECTORS - A voice activity detection (VAD) system includes a first voice activity detector, a second voice activity detector and control logic. The first voice activity detector is included in a device and produces a first VAD signal. The second voice activity detector is located externally to the device and produces a second VAD signal. The control logic combines the first and second VAD signals into a VAD output signal. Voice activity may be detected based on the VAD output signal. The second VAD signal can be represented as a flag included in a packet containing digitized audio. The packet can be transmitted to the device from the externally located VAD over a wireless link. | 08-25-2011 |
20120001875 | TOUCHLESS SENSING AND GESTURE RECOGNITION USING CONTINUOUS WAVE ULTRASOUND SIGNALS - The embodiments provide systems and methods for touchless sensing and gesture recognition using continuous wave sound signals. Continuous wave sound, such as ultrasound, emitted by a transmitter may reflect from an object, and be received by one or more sound receivers. Sound signals may be temporally encoded. Received sound signals may be processed to determine a channel impulse response or calculate time of flight. Determined channel impulse responses may be processed to extract recognizable features or angles. Extracted features may be compared to a database of features to identify a user input gesture associated with the matched feature. Angles of channel impulse response curves may be associated with an input gesture. Time of flight values from each receiver may be used to determine coordinates of the reflecting object. Embodiments may be implemented as part of a graphical user interface. Embodiments may be used to determine a location of an emitter. | 01-05-2012 |
20120078397 | SYSTEM AND METHOD OF SMART AUDIO LOGGING FOR MOBILE DEVICES - A mobile device that is capable of automatically starting and ending the recording of an audio signal captured by at least one microphone is presented. The mobile device is capable of adjusting a number of parameters related with audio logging based on the context information of the audio input signal. | 03-29-2012 |
20120083286 | MOBILE DEVICE LOCATION ESTIMATION USING ENVIRONMENTAL INFORMATION - Estimating a location of a mobile device is performed by comparing environmental information, such as environmental sound, associated with the mobile device with that of other devices to determine if the environmental information is similar enough to conclude that the mobile device is in a comparable location as another device. The devices may be in comparable locations in that they are in geographically similar locations (e.g., same store, same street, same city, etc.). The devices may be in comparable locations even though they are located in geographically dissimilar locations because the environmental information of the two locations demonstrates that the devices are in the same perceived location. With knowledge that the devices are in comparable locations, and with knowledge of the location of one of the devices, certain actions, such as targeted advertising, may be taken with respect to another device that is within a comparable location. | 04-05-2012 |
20120092171 | MOBILE DEVICE SLEEP MONITORING USING ENVIRONMENTAL SOUND - A sleep monitoring application is installed on a mobile device. The mobile device is placed in a location when a user sleeps and records environmental sound. The sleep monitoring application determines indicators of sleep activity such as breathing sounds made by the user, and determines a sleep state of the user based on the indicators of sleep activity. Sleep disorders can be detected from the indicators of sleep activity. The sleep monitoring application may generate a report that summarizes the user's sleep states and alerts the user to any sleep disorders. The sleep monitoring application can use the environmental sound and the determined sleep states to determine ambient sound that is associated with good sleep. Later, if the sleep application determines the user is having problems sleeping, the sleep monitoring application can play the determined ambient sound to help the user sleep. | 04-19-2012 |
20120142324 | SYSTEM AND METHOD FOR PROVIDING CONFERENCE INFORMATION - A method for providing information for a conference at one or more locations is disclosed. One or more mobile devices monitor one or more starting requirements of the conference and transmit input sound information to a server when the one or more starting requirements of the conference is detected. The one or more starting requirements may include a starting time of the conference, a location of the conference, and/or acoustic characteristics of a conference environment. The server generates conference information based on the input sound information from each mobile device and transmits the conference information to each mobile device. The conference information may include information on attendees, a current speaker among the attendees, an arrangement of the attendees, and/or a meeting log of attendee participation at the conference. | 06-07-2012 |
20120142378 | METHOD AND APPARATUS FOR DETERMINING LOCATION OF MOBILE DEVICE - A method for determining a location of a mobile device with reference to locations of a plurality of reference devices is disclosed. The mobile device receives ambient sound and provides ambient sound information to a server. Each reference device receives ambient sound and provides ambient sound information to the server. The ambient sound information includes a sound signature extracted from the ambient sound. The server determines a degree of similarity of the ambient sound information between the mobile device and each of the plurality of reference devices. The server determines the location of the mobile device to be a location of a reference device having the greatest degree of similarity. | 06-07-2012 |
20120224707 | METHOD AND APPARATUS FOR IDENTIFYING MOBILE DEVICES IN SIMILAR SOUND ENVIRONMENT - A method for identifying mobile devices in a similar sound environment is disclosed. Each of at least two mobile devices captures an input sound and extracts a sound signature from the input sound. Further, the mobile device extracts a sound feature from the input sound and determines a reliability value based on the sound feature. The reliability value may refer to a probability of a normal sound class given the sound feature. A server receives a packet including the sound signatures and reliability values from the mobile devices. A similarity value between sound signatures from a pair of the mobile devices is determined based on corresponding reliability values from the pair of mobile devices. Specifically, the sound signatures are weighted by the corresponding reliability values. The server identifies mobile devices in a similar sound environment based on the similarity values. | 09-06-2012 |
20130079033 | POSITION ESTIMATION VIA PROXIMATE FINGERPRINTS - Example methods, apparatuses, or articles of manufacture are disclosed herein that may be utilized, in whole or in part, to facilitate or support one or more operations or techniques for position estimation via one or more proximate fingerprints for use in or with a mobile communication device. | 03-28-2013 |
20130182858 | AUGMENTED REALITY WITH SOUND AND GEOMETRIC ANALYSIS - A method for responding in an augmented reality (AR) application of a mobile device to an external sound is disclosed. The mobile device detects a target. A virtual object is initiated in the AR application. Further, the external sound is received, by at least one sound sensor of the mobile device, from a sound source. Geometric information between the sound source and the target is determined, and at least one response for the virtual object to perform in the AR application is generated based on the geometric information. | 07-18-2013 |
20140324591 | SELECTIVELY AUTHENTICATING A GROUP OF DEVICES AS BEING IN A SHARED ENVIRONMENT BASED ON LOCALLY CAPTURED AMBIENT SOUND - In an embodiment, two or more local wireless peer-to-peer connected user equipments (UEs) capture local ambient sound, and report information associated with the captured local ambient sound to an authentication device. The authentication device compares the reported information to determine a degree of environmental similarity for the UEs, and selectively authenticates the UEs as being in a shared environment based on the determined degree of environmental similarity. A given UE among the two or more UEs selects a target UE for performing a given action based on whether the authentication device authenticates the UEs as being in the shared environment. | 10-30-2014 |
Patent application number | Description | Published |
20090034610 | Video rate adaptation to reverse link conditions - The disclosure relates to video rate adaptation techniques that may use information from a medium access control (MAC) layer and radio link protocol (RLP) layer. The techniques may greatly reduce video delay by adjusting video encoding rate. For real-time video telephony (VT) applications, these techniques may provide graceful quality degradation and improve user experience, especially when the channel conditions degrade. | 02-05-2009 |
20090213938 | VIDEO DECODER ERROR HANDLING - A video decoder performs a sequential error handling process to detect and conceal errors within a corrupted data segment of video data units. The decoder sequentially decodes a current data unit. Upon detecting an error, the decoder sets an error flag and resynchronizes decoding at the start of the next unit. If the error flag is set, the video decoder identifies the end of the corrupted data segment based on the start of the later unit. The decoder conceals data between the start of the current unit and the end of the corrupted data segment. If the error flag is not set, the decoder may decode the remainder of the current unit and proceed to decode the next available unit without performing error handling and concealment for the current unit. The decoder also may address reference unit mismatches caused by lost video data units. | 08-27-2009 |
20100080284 | RESOLVING GEOMETRIC RELATIONSHIPS AMONG VIDEO DATA UNITS - An apparatus performs efficient coding techniques to more efficiently resolve geometric relationships between video data units and thereby determine neighboring video data units for a current video data unit. The apparatus comprises a geometric resolution unit that obtains video data defining a plurality of video data units, and determines, for the current one of the plurality of video data units to be processed, a partition width and a video unit number of the current video data unit. The geometric resolution unit accesses, using the determined partition width and video unit number, a plurality of look-up tables (LUTs) to output one or more indices identifying one or more of the plurality of video data units that neighbor the current video data unit. | 04-01-2010 |
20100080285 | DETERMINING AVAILABILITY OF VIDEO DATA UNITS - An apparatus performs efficient coding techniques to more efficiently determine an availability of neighboring video data units determined for the current video data unit. The apparatus comprises an availability determination unit that maintains an availability counter. The availability determination unit determination unit increments the availability counter after each of the plurality of video data units are processed and determines, based on the availability counter, whether one or more of the plurality of video data units (i) have been previously processed and (ii) are available for use as neighboring video data units in the processing of a current one of the plurality of video data units video data units. The apparatus further processes the current video data unit based on the determination of whether one or more of the neighboring video data units are available. | 04-01-2010 |
20100080296 | LOCATING MOTION VECTORS FOR VIDEO DATA UNITS - An apparatus performs efficient coding techniques to more efficiently locate motion vector data within neighboring video data units. The apparatus comprises a motion vector (MV) location unit that includes a look-up table (LUT), where the MV location unit obtains video data defining a plurality of video data units and processes the plurality of video data units. The apparatus further includes a geometric resolution unit that determines, while processing a current one of the plurality of video data units, which of the plurality of video data units neighbor the current video data unit. The MV location unit then accesses, for each of the neighboring video data units, the LUT to determine a location of a motion vector within a section of the video data to which the neighboring video data unit is associated. | 04-01-2010 |
20120287221 | PICTURE-IN-PICTURE PROCESSING FOR VIDEO TELEPHONY - The disclosure is directed to techniques for picture-in-picture (PIP) processing for video telephony (VT). According to the disclosed techniques, a local video communication device transmits PIP information to a remote video communication device. Using the PIP information, the remote video communication device applies preferential encoding to non-PIP regions of video transmitted to the local video communication device. | 11-15-2012 |
20130033564 | PICTURE-IN-PICTURE PROCESSING FOR VIDEO TELEPHONY - The disclosure is directed to techniques for picture-in-picture (PIP) processing for video telephony (VT). According to the disclosed techniques, a local video communication device transmits PIP information to a remote video communication device. Using the PIP information, the remote video communication device applies preferential encoding to non-PIP regions of video transmitted to the local video communication device. | 02-07-2013 |
20140376637 | ENCODER-ASSISTED ADAPTIVE VIDEO FRAME INTERPOLATION - The disclosure is directed to techniques for encoder-assisted adaptive interpolation of video frames. According to the disclosed techniques, an encoder generates information to assist a decoder in interpolation of a skipped video frame, i.e., an S frame. The information permits the decoder to reduce visual artifacts in the interpolated frame and thereby achieve improved visual quality. The information may include interpolation equation labels that identify selected interpolation equations to be used by the decoder for individual video blocks. As an option, to conserve bandwidth, the equation labels may be transmitted for only selected video blocks that meet a criterion for encoder-assisted interpolation. Other video blocks without equation labels may be interpolated according to a default interpolation technique. | 12-25-2014 |
Patent application number | Description | Published |
20090180440 | Client-Based Multimode Handover in Communication Systems - A communication system having a first communication device being in communication with a second communication device via a communication connectivity to a first communication network. The first communication device having a first handover module operable to handover communication connectivity from the first communication network to a second communication network. The second communication device having a second handover module cooperatively operable with the first handover module to maintain communication between the second communication device and the first communication device while the first handover module operates to handover communication connectivity from the first communication network to the second communication network. | 07-16-2009 |
20130229270 | PROVIDING DATA TO A MOBILE APPLICATION ACCESSIBLE AT A MOBILE DEVICE VIA DIFFERENT NETWORK CONNECTIONS WITHOUT INTERRUPTION - System and method of providing data to a mobile application accessible at a mobile device via different network connections without interruption are disclosed. The method, which may be implemented on a system includes, receiving data for the mobile application over a network connection different from a first network connection, and/or providing the data received over the network connection including any other data received from the first network connection, to the mobile application in a manner that is without interruption in data flow. The data is provided to the mobile application without interruption even when connections to the different network connections require change in IP addresses. | 09-05-2013 |
20130229976 | MOBILE DEVICE WHICH HANDS OVER CONNECTIVITY FROM ONE NETWORK CONNECTION TO ANOTHER NETWORK CONNECTION WITHOUT INTERRUPTION IN APPLICATION DATA FLOW AND METHODS THEREFOR - Mobile devices which hand over connectivity from one network connection to another network connection without interruption in application data flow and methods therefor are disclosed. One embodiment further includes, a system for managing handover from a first wireless connection to a second wireless connection for applications, the system including, a network interface operable to communicate with the first wireless network and the second wireless network, wherein the network interface is operable to receive first data from a first wireless network and receive second data for the application from a second wireless network and generate a continuous data flow for applications when handover from the first wireless network to the second wireless network occurs. | 09-05-2013 |
20140310386 | ADAPTIVE DOWNLOADING OR STREAMING TO CONSERVE MOBILE DEVICE OR NETWORK RESOURCES - Embodiments of the present disclosure include techniques for optimization on downloading/streaming activities of media and/or other files (e.g., on a local client, or a local proxy on a mobile device). An example of such downloading/streaming is a user accessing media content including video and/or audio content using a mobile device such as a smart phone, a tablet, or a “phablet,” etc. | 10-16-2014 |
20140362712 | RADIO OR NETWORK EVALUATION FOR SELECTION BASED ON MEASUREMENTS USING APPLICATION LAYER PROTOCOLS AT A MOBILE DEVICE - In one embodiment, a method comprises measuring a set of parameters for each of the available networks using an application layer protocol (e.g., HTTP). The method further comprises determining an overall quality level for each of the available networks based on the parameters, and choosing the network based on the overall quality level. In some embodiments, the set of parameters are measured by communicating with each of a plurality of predetermined servers within a respective network. Among other advantages, embodiments disclosed herein enable a quantified approach to user experience estimation and application-level Quality of Experience (QoE) measurements, which can serve as bases for selection of radios for the applications. | 12-11-2014 |
20140362713 | QUALITY OF EXPERIENCE ENHANCEMENT FOR WIRELESS NETWORKS BASED ON RECEIVED SIGNAL STRENGTH AT A MOBILE DEVICE - Techniques are disclosed for network and/or evaluation and selection based on received signal strength at a device. For example, an received signal strength indicator (RSSI) can be measured (e.g., using Android API or other suitable methods). Then, the measured RSSI level can be compared against a threshold RSSI level, which can be determined on a device-by-device basis. In some embodiments, the RSSI values can assist the network evaluation and selection in certain situations, for example, where WiFi network quality is degraded because of locational movement and not backbone structure, and/or where there are multiple access points (APs) providing WiFi networks under the same SSID and each AP having different effective coverage. Further, in some embodiments, the RSSI values can provide the capabilities of WiFi AP suspension based on MAC addresses. In some embodiments, the RSSI values can be adopted to trigger QoE measurements. | 12-11-2014 |
20150023161 | MODIFYING SYSTEM TIMERS FOR OPTIMIZING MOBILE TRAFFIC MANAGEMENT - Systems and methods for optimizing mobile traffic management are disclosed. In a mobile device, network stack timers or protocol stack timers are modified to extend delay tolerance of applications for radio alignment. In an embodiment, using a variable gating delay, that takes into consideration the delay tolerance of applications that is extended and other information such as radio state information, are used to align and transfer outgoing traffic from multiple applications to one or more application servers, receive requests and/or responses from one or more application servers or a carrier-side proxy server to minimize the number of times the mobile device connects to the network, reducing the power consumption on the mobile device and unnecessary signaling in the network. | 01-22-2015 |
20150023162 | EXTENDING DELAY TOLERANCE OF MOBILE APPLICATIONS FOR OPTIMIZING MOBILE TRAFFIC MANAGEMENT - Systems and methods for extending delay tolerance of mobile applications to optimize mobile traffic management are disclosed. In a mobile device, network stack timers or protocol stack timers are modified to extend delay tolerance of applications for radio alignment. In an embodiment, tolerance of mobile applications on a mobile device to delay in establishing a connection to a wireless network is extended by an application or a local proxy on a mobile device. Based on the tolerance that is extended, requests intercepted from the mobile applications are aggregated, over a period of time, such that transfer of the requests intercepted during the period of time is delayed. This minimizes the number of times the mobile device connects to the network, reducing the power consumption on the mobile device and unnecessary signaling in the network. | 01-22-2015 |
20150065123 | System, Method, and Computer-Readable Medium for User Equipment Decision-Making Criteria for Connectivity and Handover - A method of selecting a network from a plurality of available access networks is provided. The method includes identifying, by using a wireless user equipment, the plurality of access networks and identifying, by using a wireless user equipment, an invoked application. The method includes selecting, by using a wireless user equipment, a first access network from the plurality of access networks based, at least in part, on the application. A connection is established to the first access network in response to an application requirement. A handover procedure is invoked from the first access network to a second access network of the plurality of access networks in response to application requirements. | 03-05-2015 |