Patent application number | Description | Published |
20090134906 | Resilient Integrated Circuit Architecture - The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation. | 05-28-2009 |
20090134907 | Fault Tolerant Integrated Circuit Architecture - The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation. | 05-28-2009 |
20100033207 | Fault Tolerant Integrated Circuit Architecture - The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation. | 02-11-2010 |
20100244889 | Resilient Integrated Circuit Architecture - The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation. | 09-30-2010 |
20100321058 | Fault Tolerant Integrated Circuit Architecture - The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation. | 12-23-2010 |
20110260750 | Fault Tolerant Integrated Circuit Architecture - The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation. | 10-27-2011 |
20120098565 | Resilient Integrated Circuit Architecture - The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation. | 04-26-2012 |
20120146685 | Fault Tolerant Integrated Circuit Architecture - The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function, providing for the IC to continue the same functioning despite defects which may arise during operation. | 06-14-2012 |
20130127491 | Fault Tolerant Integrated Circuit Architecture - The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation. | 05-23-2013 |
20130229204 | Resilient Integrated Circuit Architecture - The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation. | 09-05-2013 |
20140062526 | Fault Tolerant Integrated Circuit Architecture - The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation. | 03-06-2014 |
Patent application number | Description | Published |
20120151016 | Content delivery network (CDN) content server request handling mechanism with metadata framework support - To serve content through a content delivery network (CDN), the CDN must have some information about the identity, characteristics and state of its target objects. Such additional information is provided in the form of object metadata, which according to the invention can be located in the request string itself, in the response headers from the origin server, in a metadata configuration file distributed to CDN servers, or in a per-customer metadata configuration file. CDN content servers execute a request identification and parsing process to locate object metadata and to handle the request in accordance therewith. Where different types of metadata exist for a particular object, metadata in a configuration file is overridden by metadata in a response header or request string, with metadata in the request string taking precedence. | 06-14-2012 |
20130007228 | Method and system for purging content from a content delivery network - A content file purge mechanism for a content delivery network (CDN) is described. A Web-enabled portal is used by CDN customers to enter purge requests securely. A purge request identifies one or more content files to be purged. The purge request is pushed over a secure link from the portal to a purge server, which validates purge requests from multiple CDN customers and batches the requests into an aggregate purge request. The aggregate purge request is pushed from the purge server to a set of staging servers. Periodically, CDN content servers poll the staging servers to determine whether an aggregate purge request exists. If so, the CDN content servers obtain the aggregate purge request and process the request to remove the identified content files from their local storage. | 01-03-2013 |
20130297735 | Content delivery network (CDN) content server request handling mechanism with metadata framework support - To serve content through a content delivery network (CDN), the CDN must have some information about the identity, characteristics and state of its target objects. Such additional information is provided in the form of object metadata, which according to the invention can be located in the request string itself, in the response headers from the origin server, in a metadata configuration file distributed to CDN servers, or in a per-customer metadata configuration file. CDN content servers execute a request identification and parsing process to locate object metadata and to handle the request in accordance therewith. Where different types of metadata exist for a particular object, metadata in a configuration file is overridden by metadata in a response header or request string, with metadata in the request string taking precedence. | 11-07-2013 |
20160036765 | Content delivery network (CDN) content server request handling mechanism with metadata framework support - To serve content through a content delivery network (CDN), the CDN must have some information about the identity, characteristics and state of its target objects. Such additional information is provided in the form of object metadata, which according to the invention can be located in the request string itself, in the response headers from the origin server, in a metadata configuration file distributed to CDN servers, or in a per-customer metadata configuration file. CDN content servers execute a request identification and parsing process to locate object metadata and to handle the request in accordance therewith. Where different types of metadata exist for a particular object, metadata in a configuration file is overridden by metadata in a response header or request string, with metadata in the request string taking precedence. | 02-04-2016 |
Patent application number | Description | Published |
20120271937 | AUTOMATED TOPOLOGY CHANGE DETECTION AND POLICY BASED PROVISIONING AND REMEDIATION IN INFORMATION TECHNOLOGY SYSTEMS - Aspects of the present disclosure involve systems, methods, computer program products, and the like, that provide automated topology change detection and policy based provisioning and remediation in information technology systems, among other functions and advantages. | 10-25-2012 |
20130246588 | SYSTEMS AND METHODS FOR DATA MOBILITY WITH A CLOUD ARCHITECTURE - Aspects of the present disclosure describe systems and corresponding methods for storing and/or redistributing data within a network. In various aspects, data and/or sets of data stored in a database, data store, or other type of database storage system may be pulled, pushed, distributed, redistributed, or otherwise positioned at one or more data caches and/or servers strategically located across an enterprise network, a content delivery network (“CDN”), etc., and may be accessible over such networks, other networks, and/or the Internet. | 09-19-2013 |
20130346617 | METHODS AND SYSTEMS FOR ALLOCATING AND PROVISIONING COMPUTING RESOURCES - Aspects of the present disclosure include systems and methods for the automatic allocation and/or provisioning of various infrastructural computing resources upon which networks, such as telecommunication networks operate. In various aspects, data identifying one or more computing resources needed to implement, support, and/or otherwise facilitate the execution and/or development of a particular computing process, application, software, process, and/or service may be received via one or more interfaces, such as a graphical user-interface (“GUI”). The data may be processed to automatically provision the require resource. | 12-26-2013 |
Patent application number | Description | Published |
20100220390 | High accuracy optical pointing apparatus - In the subject three-axis pointing system, the elevation and tip mirror axes are permanently mounted with their rotation axes orthogonal to each other to eliminate gimbal lock over the hemisphere, to avoid high accelerations as the zenith or nadir pointing directions are approached, and to provide optimal two-axis beam pointing control. | 09-02-2010 |
20100296091 | Optical Multiplexer/Demultiplexer - An apparatus for optical spectrometry utilizes a simplified construction, reducing the number of independent optical elements needed while providing a sizeable dispersed spectrum. The apparatus provides a spectral intensity distribution of an input source wherein individual spectral components in the source can be measured and, in some embodiments, can be manipulated or filtered. | 11-25-2010 |
20110261153 | MOMENTUM BALANCE OPTICAL SCANNING FOR WIDE FIELD OF VIEW OPTICAL SENSORS - A compact momentum-balanced internal optical scanning mechanism is provided for a wide angle camera used in photo reconnaissance and the like, in which a large high resolution but not fully populated array is used to provide full scene coverage with high pixel densities, in which sharpness is maintained and in which the image can be scanned without vibration due to momentum compensation so that the image may be shifted on the focal plane array in such a manner that images focused on a dark portion of the array will move to an active portion of the array, with the sequential read out of the information concatenated into high resolution full scene image data. | 10-27-2011 |
20130063552 | MULTI FIELD OF VIEW IMAGING SYSTEM - A multi field of view (FOV) imaging system is disclosed. In one embodiment, a dual FOV imaging system includes a composite lens array including a first lens set positioned to focus a first type of FOV and a second lens set positioned to focus a second type of FOV and a composite focal plane array (FPA) including multiple focal plane arrays (FPAs). Further, the composite FPA is disposed at the first type of FOV and the second type of FOV for producing a seamless mosaic dual FOV image of a target region. | 03-14-2013 |
20130188183 | Optical Multiplexer/Demultiplexer - An apparatus for optical spectrometry utilizes a simplified construction, reducing the number of independent optical elements needed while providing a sizeable dispersed spectrum. The apparatus provides a spectral intensity distribution of an input source wherein individual spectral components in the source can be measured and, in some embodiments, can be manipulated or filtered. | 07-25-2013 |
20140072260 | Optical Multiplexer/Demultiplexer - An apparatus for optical spectrometry utilizes a simplified construction, reducing the number of independent optical elements needed while providing a sizeable dispersed spectrum. The apparatus provides a spectral intensity distribution of an input source wherein individual spectral components in the source can be measured and, in some embodiments, can be manipulated or filtered. | 03-13-2014 |
20150136954 | Apparatus and Methods for Hyperspectral Imaging with Parallax Measurement - An apparatus and corresponding method for line-scan imaging includes a 2D array of light-sensitive detector elements divided into a plurality of sub-arrays. An electrical circuit can be configured to determine a correction for parallax based on detector element values from at least two rows of parallax detecting elements to enable images captured by the sub-arrays to be co-aligned with each other. The 2D array and parallax detecting elements can be located on the same substrate chip. Image data from sub-arrays can be co-aligned with each other based on parallax data from the parallax detecting elements and used to produce hyperspectral images corrected for parallax. | 05-21-2015 |
20150136955 | Apparatus and Methods for Hyperspectral Imaging with On-Chip Digital Time Delay and Integration - An apparatus and corresponding method for line-scan imaging can include a 2D array of light-sensitive detector elements that detect light from a target scene. The 2D array can be divided into a plurality of sub-arrays and supported by an analog amplification and signal conditioning module portion of a read-out integrated circuit (ROIC), the analog module having one or more replicated amplification and signal conditioning circuits in communication with the 2D array detector elements. An analog-to-digital (A/D) conversion electrical circuit module and one or more digital time-delay and integration (TDI) modules can be situated in a portion of the ROIC not supporting the 2D array. The TDI modules can perform TDI of the detector sub-arrays. Embodiments enable hyperspectral images to be obtained with greater imaging range and higher signal-to-noise ratios. | 05-21-2015 |