Patent application number | Description | Published |
20090125717 | Methods and Apparatus for Secure Data Processing and Transmission - Methods and apparatus provide for placing an apparatus into at least one of a plurality of operational modes, wherein: the apparatus includes a local memory, a bus operable to carry information to and from the local memory, one or more arithmetic processing units operable to process data and operatively coupled to the local memory, and a security circuit operable to place the apparatus into the operational modes; and the plurality of operational modes includes: (i) a first mode whereby the apparatus and an external device are operable to initiate a transfer of information into or out of the memory over the bus, (ii) a second mode whereby neither the apparatus nor the external device are operable to initiate a transfer of information into or out of the memory over the bus, and (iii) a third mode whereby the apparatus is operable to initiate a transfer of information into or out of the local memory over the bus, but the external device is not operable to initiate a transfer of information into or out of the local memory over the bus. | 05-14-2009 |
20090313456 | METHODS AND APPARATUS FOR DYNAMIC PREDICTION BY SOFTWARE - A method, storage medium, processor instruction and processor to for specifying a value in a first portion of a conditional pre-fetch instruction associated with a branch instruction used for effectuating a branch operation, specifying a target instruction address in a second portion of the instruction, evaluating the value to determine whether a condition is met, and pre-fetching one or more instructions starting at the target instruction address into an instruction buffer of the processor when the condition is met, is provided. | 12-17-2009 |
Patent application number | Description | Published |
20080279370 | METHODS AND APPARATUS FOR GENERATING A RANDOM NUMBER IN ONE OR MORE ISOLATED PROCESSORS - A system and method is disclosed which may include providing at least one processor with an integrally disposed random number generator (RNG) therein; entering a protected mode by said at least one processor; and generating a random number using said RNG in said at least one processor after entering said protected mode. | 11-13-2008 |
20080282063 | METHODS AND APPARATUS FOR LATENCY CONTROL IN A MULTIPROCESSOR SYSTEM - Methods and apparatus provide for a multiprocessor system including: a plurality of sub-processors operatively coupled to one another over a ring bus, whereby data may be transmitted over one or more paths on the ring bus between pairs of the sub-processors; and a plurality of programmable delay circuits, each associated with at least one of the sub-processors, and each being operable to alter a delay of data transfer at least one of into and out of its associated sub-processor in order to alter one or more latencies associated with the paths on the ring bus between pairs of the sub-processors. | 11-13-2008 |
20080282084 | METHODS AND APPARATUS FOR SECURE OPERATING SYSTEM DISTRIBUTION IN A MULTIPROCESSOR SYSTEM - Methods and apparatus provide for: decrypting a first of a plurality of operating systems (OSs) within a first processor of a multiprocessing system using a private key thereof, the plurality of OSs having been encrypted by a trusted third party, other than a manufacturer of the multiprocessing system, using respective public keys, each paired with the private key; executing an authentication program using the first processor to verify that the first OS is valid; and executing the first OS on the first processor. | 11-13-2008 |
20080282093 | METHODS AND APPARATUS FOR SECURE PROGRAMMING AND STORAGE OF DATA USING A MULTIPROCESSOR IN A TRUSTED MODE - Methods and apparatus provide for: entering a secure mode in which a given processor may initiate a transfer of information into or out of said processor, but no external device may initiate a transfer of information into or out of said processor; and programming at least one trusted data storage location using a direct memory access (DMA) command to be one of read-only, write-only, readable and writeable, limited access, and reset, where said at least one trusted data storage location is located external to said processor. | 11-13-2008 |
20080282341 | METHODS AND APPARATUS FOR RANDOM NUMBER GENERATION IN A MULTIPROCESSOR SYSTEM - Methods and apparatus include: providing each of a plurality of processors of a multiprocessing system with an integrally disposed random number generator (RNG); and permitting one or more of the processors to enter into a secure mode using one or more random numbers generated by one or more of the RNGs. | 11-13-2008 |
20080282342 | METHODS AND APPARATUS FOR ACCESSING RESOURCES USING A MULTIPROCESSOR IN A TRUSTED MODE - A system and method are disclosed which may include entering a secure mode by a processor, whereby the processor may initiate a transfer of information into or out of the processor, but no external device may initiate a transfer of information into or out of the processor; sending a DMA (direct memory access) command including at least one authorization code from the processor to at least one trusted data storage region external to the processor; evaluating the authorization code; and enabling the processor to access at least one trusted data storage location within the trusted data storage region if the authorization code is valid. | 11-13-2008 |
20120191765 | Information Processing Apparatus - A game recording medium records game files each containing at least a game program and configuration information with which to identify a data file usable by the game program. A recording medium records data files. An acquisition unit acquires the configuration information from the game recording medium, and a search unit searches the recording medium for the data file usable by the game program, based on the acquired configuration information. When a data file is detected, a copying unit copies the detected data file to the game recording medium. | 07-26-2012 |