Patent application number | Description | Published |
20080218936 | Analog capacitor - Analog capacitors, and methods of fabricating the same, include a lower electrode having a lower conductive layer, a capacitor dielectric layer on the lower conductive layer, and an upper electrode on the capacitor dielectric layer to be opposite to the lower electrode, wherein the upper electrode includes at least an upper conductive layer in contact with the capacitor dielectric layer, wherein the upper conductive layer has a resistivity higher than that of the lower conductive layer. | 09-11-2008 |
20080265371 | Capacitor Unit and Method of Forming the Same - A capacitor unit includes a first capacitor and a second capacitor. The first capacitor includes a first lower electrode, a first dielectric layer pattern and a first upper electrode sequentially stacked. The first capacitor includes a first control layer pattern for controlling a voltage coefficient of capacitance (VCC) of the first capacitor between the first lower electrode and the first dielectric layer pattern. The second capacitor includes a second lower electrode, a second dielectric layer pattern and a second upper electrode sequentially stacked. The second lower electrode is electrically connected to the first upper electrode, and the second upper electrode is electrically connected to the second lower electrode. The second capacitor includes a second control layer pattern for controlling a VCC of the second capacitor between the second lower electrode and the second dielectric layer pattern. | 10-30-2008 |
20080283905 | Nonvolatile memory devices and methods of fabricating the same - Provided are nonvolatile memory devices and methods of fabricating the same which may prevent or reduce deterioration of device characteristics and deterioration of a breakdown voltage. The nonvolatile memory device may include a semiconductor substrate, a charge-trap insulation layer on the semiconductor substrate and having a first region and second regions having a lower density of charge-trap sites than the first region, and a gate electrode on the charge-trap insulation layer, wherein the first region is overlapped by the gate electrode and the second regions are outside of the first region. | 11-20-2008 |
20090001437 | Integrated Circuit Devices Including Recessed Conductive Layers and Related Methods - An integrated circuit device may include a first insulating layer on a substrate with an opening through the first insulating layer. A conductive layer may be on the first insulating layer with the first insulating layer between the conductive layer and the substrate and with the conductive layer set back from the opening. A second insulating layer may be on the conductive layer with the conductive layer between the first and second insulating layers. The second insulating layer may be set back from the opening, and a sidewall of the conductive layer adjacent the opening may be recessed relative to a sidewall of the second insulating layer adjacent the opening. An insulating spacer on portions of the first insulating layer may surround the opening, and the insulating spacer may be on the sidewall of the second insulating layer adjacent the opening so that the insulating spacer is between the sidewall of the second conductive layer and the opening. A conductive contact may be in the opening through the first insulating layer and on portions of the insulating spacer so that the insulating spacer is between the conductive contact and the conductive layer. Related methods are also discussed. | 01-01-2009 |
20090045391 | Switch Device and Method of Fabricating the Same - Provided is a switch device that can be reliably turned on or off using a nanostructure that includes a nanotube and/or a nanowire. The switch device includes a lower conductive film formed on a substrate, a first insulating film formed on the lower conductive film and having a first hole that exposes at least a portion of the first lower conductive film, and a conductive film spacer formed on an inner wall of the first hole of the first insulating film. A switch device may include a nanostructure having an end electrically connected to the lower conductive film, including a nanotube and/or a nanowire, extending substantially vertically from the lower conductive film and penetrating through the first hole, and separated from the conductive film spacer with a working gap interposed therebetween. | 02-19-2009 |
20100170441 | Method of Forming Metal Oxide and Apparatus for Performing the Same - In a method and an apparatus for forming metal oxide on a substrate, a source gas including metal precursor flows along a surface of the substrate to form a metal precursor layer on the substrate. An oxidizing gas including ozone flows along a surface of the metal precursor layer to oxidize the metal precursor layer so that the metal oxide is formed on the substrate. A radio frequency power is applied to the oxidizing gas flowing along the surface of the metal precursor layer to accelerate a reaction between the metal precursor layer and the oxidizing gas. Acceleration of the oxidation reaction may improve electrical characteristics and uniformity of the metal oxide. | 07-08-2010 |
20110097869 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING MIM CAPACITOR AND METHOD OF FABRICATING THE SAME - In a semiconductor integrated circuit device and a method of formation thereof, a semiconductor device comprises: a semiconductor substrate; an insulator at a top portion of the substrate, defining an insulator region; a conductive layer pattern on the substrate, the conductive layer pattern being patterned from a common conductive layer, the conductive layer pattern including a first pattern portion on the insulator in the insulator region and a second pattern portion on the substrate in an active region of the substrate, wherein the second pattern portion comprises a gate of a transistor in the active region; and a capacitor on the insulator in the insulator region, the capacitor including: a lower electrode on the first pattern portion of the conductive layer pattern, a dielectric layer pattern on the lower electrode, and an upper electrode on the dielectric layer pattern. | 04-28-2011 |
20110097905 | APPARATUS INCLUDING 4-WAY VALVE FOR FABRICATING SEMICONDUCTOR DEVICE, METHOD OF CONTROLLING VALVE, AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE APPARATUS - An apparatus and method for fabricating a semiconductor device using a 4-way valve with improved purge efficiency by improving a gas valve system by preventing dead volume from occurring are provided. The apparatus includes a reaction chamber in which a substrate is processed to fabricate a semiconductor device; a first processing gas supply pipe supplying a first processing gas into the reaction chamber; a 4-way valve having a first inlet, a second inlet, a first outlet, and a second outlet and installed at the first processing gas supply pipe such that the first inlet and the first outlet are connected to the first processing gas supply pipe; a second processing gas supply pipe connected to the second inlet of the 4-way valve to supply a second processing gas; a bypass connected to the second outlet of the 4-way valve; and a gate valve installed at the bypass. | 04-28-2011 |
20110101492 | SEMICONDUCTOR DEVICE HAVING THERMALLY FORMED AIR GAP IN WIRING LAYER AND METHOD OF FABRICATING SAME - A semiconductor device is provided. A unit wiring level of the semiconductor device includes; first and second wiring layers spaced apart from each other on a support layer, a large space formed adjacent to the first wiring layer and including a first air gap of predetermined width as measured from a sidewall of the first wiring layer, and a portion of a thermally degradable material layer formed on the support layer, small space formed between the first and second wiring layers, wherein the small space is smaller than the large space, and a second air gap at least partially fills the small space, and a porous insulating layer formed on the first and second air gaps. | 05-05-2011 |
20130029477 | APPARATUS INCLUDING 4-WAY VALVE FOR FABRICATING SEMICONDUCTOR DEVICE, METHOD OF CONTROLLING VALVE, AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE APPARATUS - An apparatus and method for fabricating a semiconductor device using a 4-way valve with improved purge efficiency by improving a gas valve system by preventing dead volume from occurring are provided. The apparatus includes a reaction chamber in which a substrate is processed to fabricate a semiconductor device; a first processing gas supply pipe supplying a first processing gas into the reaction chamber; a 4-way valve having a first inlet, a second inlet, a first outlet, and a second outlet and installed at the first processing gas supply pipe such that the first inlet and the first outlet are connected to the first processing gas supply pipe; a second processing gas supply pipe connected to the second inlet of the 4-way valve to supply a second processing gas; a bypass connected to the second outlet of the 4-way valve; and a gate valve installed at the bypass. | 01-31-2013 |
20140070325 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a first interface film on a first area of a substrate, the first interface film including a first growth interface film and a second growth interface film on a lower portion of the first growth interface film, a first dielectric film on the first interface film, and a first gate electrode on the first dielectric film. | 03-13-2014 |
20140073103 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device includes providing a dummy gate insulation film formed on a substrate, the dummy gate insulation film including a first material and providing a spacer formed at least one side of the gate insulation film, the spacer including the first material, removing the first material included in the dummy gate insulation film by a first process, removing the dummy gate insulation film from which the first material has been removed by a second process different from the first process, and sequentially forming a gate insulation film and a gate electrode structure on the substrate. | 03-13-2014 |
20140077281 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device includes an interlayer insulating film on a substrate, the interlayer insulating film including a trench, a gate insulating film in the trench, a diffusion film on the gate insulating film, the diffusion film including a first diffusion material, a gate metal structure on the diffusion film, the gate metal structure including a second diffusion material, and a diffusion prevention film between the gate metal structure and the diffusion film, the diffusion prevention film being configured to prevent diffusion of the second diffusion material from the gate metal structure, the first diffusion material diffused from the diffusion film exists in the gate insulating film. | 03-20-2014 |
20140113443 | FABRICATING METHOD OF A SEMICONDUCTOR DEVICE - A fabricating method of a semiconductor device includes stacking a high-k dielectric film not containing silicon (Si) and an insulating film containing silicon (Si) on a substrate, and diffusing Si contained in the insulating film into the high-k dielectric film by annealing the substrate having the high-k dielectric film and the insulating film stacked thereon. | 04-24-2014 |
20140369115 | SEMICONDUCTOR DEVICE, METHOD FOR FABRICATING THE SAME, AND MEMORY SYSTEM INCLUDING THE SEMICONDUCTOR DEVICE - Semiconductor device, method for fabricating the same and electronic devices including the semiconductor device are provided. The semiconductor device comprises an interlayer insulating layer formed on a substrate and including a trench, a gate electrode formed in the trench, a first gate spacer formed on a side wall of the gate electrode to have an L shape, a second gate spacer formed on the first gate spacer to have an L shape and having a dielectric constant lower than that of silicon nitride, and a third spacer formed on the second gate spacer. | 12-18-2014 |