Joon-Yong Choi
Joon-Yong Choi, Seoul KR
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20090097304 | NONVOLATILE MEMORY USING RESISTANCE MATERIAL - Provided is a nonvolatile memory using a resistance material. In embodiments of the invention, a PRAM is configured to apply a step-down voltage to wordlines during a standby mode. Aspects of the present invention thus provide a nonvolatile memory with reduced standby current. Additionally, embodiments of the invention allow for faster transition from a standby state to an active state. | 04-16-2009 |
20090122600 | NONVOLATILE MEMORY USING RESISTANCE MATERIAL - A nonvolatile memory using a resistance material includes first and second memory-cell blocks having different block address information and each including a plurality of nonvolatile memory cells; a global bitline common to the first and second memory-cell blocks; first and second local bitlines corresponding to the first and second memory-cell blocks, respectively, and coupled to each other; and a common bitline selection circuit interposed between the first and second memory-cell blocks and coupled between the first and second local bitlines and the global bitline. | 05-14-2009 |
20100103725 | Resistance Variable Memory Device for Protecting Coupling Noise - The present invention relates to a resistance variable memory device, and more particularly, to a resistance variable memory device capable of preventing an effect of coupling noise. The resistance variable memory device includes: a memory cell connected to a bit line; a precharge circuit precharging the bit line in response to a precharge signal; a bias circuit providing a bias voltage to the bit line in response to,a bias signal; and a control logic controlling the precharge signal and the bias signal. The control logic provides the bias signal to the bias circuit at a precharge interval. Accordingly, the resistance variable memory device according to the present invention can prevent an effect coupling noise. | 04-29-2010 |
20100142254 | Nonvolatile Memory Device Using Variable Resistive Element - A nonvolatile memory device using a variable resistive element is provided. The nonvolatile memory device includes first and second nonvolatile memory cells. Word lines are coupled to the first and second nonvolatile memory cells. First and second bit lines are coupled to the first and second nonvolatile memory cells, respectively. A read circuit reads resistance levels of the first and second nonvolatile memory cells by providing first and second read bias currents of different levels to the first and second bit lines, respectively. | 06-10-2010 |
20100302884 | Method of preventing coupling noises for a non-volatile semiconductor memory device - Disclosed is a method of preventing coupling noises for a non-volatile semiconductor memory device. According to the method, if an edge of a write operation signal overlaps an activated period of a read operation signal a check result is generated. The write operation signal is modified based on the check result. | 12-02-2010 |
Joon-Yong Choi, Gwacheon-Si KR
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20100284221 | Nonvolatile memory device and method for controlling word line or bit line thereof - A nonvolatile memory device includes global selection lines, local selection lines, a first selection circuit, and a second selection circuit. The local lines correspond respectively to the global selection lines. The first selection circuit is configured to connect to the global selection lines to select the global selection lines. The second selection circuit is connected between the global selection lines and the local selection lines and is configured to select the local selection lines. The first selection circuit is configured to select at least one global selection line, and the second selection circuit is configured to select the local selection lines corresponding to the selected global selection line while the at least one global selection line is continuously activated. | 11-11-2010 |
20110261615 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM HAVING THE SAME, AND METHOD FOR OPERATING THE SEMICONDUCTOR DEVICE - A semiconductor device includes phase-change memory cells and an access circuit. The access circuit generates a plurality of bitwise comparison signals indicating different comparison events for respective write and read bit groups. At least a portion of the write data is then written to the phase-change memory cells according to a number of activated comparison signals for each comparison event, as well as according to a ratio of a set current pulse width and a reset current pulse width as applied to the of phase-change memory cells. | 10-27-2011 |
Joon-Yong Choi, Daejeon KR
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20100046079 | Polymer pattern and metal film pattern, metal pattern, plastic mold using thereof, and method of the forming the same - The present invention relates to polymer patterns of various shapes formed using modifications of means and methods used in the prior lithography process, and the metal film patterns, metal patterns and plastic molds using the polymer patterns, as well as methods of forming these patterns and molds. The method of forming the polymer patterns comprises the steps of: (a) depositing a photosensitive polymer on the substrate to form a polymer film; (b) placing a photomask on the polymer film; and (c) irradiating the polymer film with a light moving in random direction through the photomask, so as to form at least one pattern which is concave from the surface of the polymer film in a direction perpendicular to the substrate and extends in a direction parallel to the substrate. The inventive polymer patterns have at least one pattern which is concave from the surface of the polymer film in a direction perpendicular to the substrate and extends in a direction parallel to the substrate. The vertical cross-section of the concave patterns has at least one curved surface. | 02-25-2010 |
Joon-Yong Choi, Jinju-Si KR
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20090167963 | PROJECTION DISPLAY APPARATUS USING MICROLENS ARRAY AND MICROMIRROR ARRAY - A projection display apparatus using a microlens array and a micromirror array comprises a substrate, multiple micromirror arrays and multiple microlens arrays. The substrate is disposed apart with a predetermined distance from a light source. The multiple micromirror arrays are disposed over the substrate to be assembled together to have a predetermined incidence angle with respect to the incident rays. The multiple microlens arrays are configured to correspond to the micromirror arrays. More specifically, a first microlens array is disposed in a predetermined region between the light source and the substrate and comprises multiple microlenses. A second microlens array is disposed in a light path of reflection rays reflected from the micromirrors. | 07-02-2009 |