Patent application number | Description | Published |
20090117333 | METHOD OF MANUFACTURING DISPLAY DEVICE AND DISPLAY DEVICE THEREFROM - A method of manufacturing a display device includes: forming an auxiliary layer including at least one of metal and a metal oxide on an insulating substrate; forming a photoresist layer pattern partially exposing the auxiliary layer on the auxiliary layer; forming a trench on the insulating substrate by etching the exposed auxiliary layer and the insulating substrate under the exposed auxiliary layer; forming a seed layer including a first seed layer disposed on the photoresist layer pattern and a second seed layer disposed in the trench; removing the photoresist layer pattern and the first seed layer by lifting off the photoresist layer pattern; removing the auxiliary layer remaining on the insulating substrate after lifting off the photoresist layer pattern; and forming a main wiring layer on the second seed layer by electroless plating. | 05-07-2009 |
20090121228 | ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed. | 05-14-2009 |
20090130789 | SIGNAL LINE FOR DISPLAY DEVICE AND THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SIGNAL LINE - A thin film transistor (TFT) array panel with signal lines that have low resistivity is presented. The TFT array panel includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode facing the source electrode with a gap, and a pixel electrode connected to the drain electrode. In one embodiment, at least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a Mo-containing conductor, a second conductive layer made of a Cu-containing conductor, and a third conductive layer made of a MoN-containing conductor. | 05-21-2009 |
20100261322 | ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed. | 10-14-2010 |
20110256485 | ETCHANT COMPOSITION, PATTERNING CONDUCTIVE LAYER AND MANUFACTURING FLAT PANEL, DISPLAY DEVICE USING THE SAME - An etchant composition that allows simplification and optimization of semiconductor manufacturing process is presented, along with a method of patterning a conductive layer using the etchant and a method of manufacturing a flat panel display using the etchant. The etchant includes nitric acid, phosphoric acid, acetic acid, and an acetate compound in addition to water. | 10-20-2011 |
20120132917 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate having a low resistance signal line and a method of manufacturing the display substrate are provided. The display substrate includes an insulation substrate, a gate line, a data line and a pixel electrode. The gate line gate line is formed through a sub-trench and an opening portion. The sub-trench is formed in the insulation substrate and the opening portion is formed through a planarization layer on the insulation substrate at a position corresponding to the position of the sub-trench. The data line crosses the gate line. The pixel electrode is electrically connected to the gate line and the data line through a switching element. Thus, a signal line is formed through a trench formed by using a planarization layer and an insulation substrate, so that a resistance of the signal line may be reduced. | 05-31-2012 |